Balanced Amplifier

in
Package on Board

Tony Donisi
Eldon Staggs
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2011 ANSYS, Inc.

September 26,
2011

Introduction
Demonstrate MMIC Balanced Amplifier design flow
Linear and Non-Linear Design
Amplifier incorporated into package
System in packages and board
Evaluate System performance
Non-linear circuit evaluation of Amplifiers
Linear evaluation of Hybrid combiners
Electromagnetic evaluation of packages on board
Co-simulation of entire system

2011 ANSYS, Inc.

September 26,
2011

Agenda
Design Environment
Design Technology and Management
Designer Links
HFSS Solver on Demand
System details
Balanced Amplifier overview
MMIC Amplifier design
Hybrid design
System on board design
Amplifier in Package
Entire design on board
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2011 ANSYS, Inc.

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Overview: Chip in Package

2011 ANSYS, Inc.

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2011

Overview: Package to Board

2011 ANSYS, Inc.

September 26,
2011

Design Environment

2011 ANSYS, Inc.

September 26,
2011

Ansoft Designer Overview

Design Technology

Circuit & System Analysis

Time and Frequency Domain
Electromagnetic Analysis
Solver on Demand
HFSS, PlanarEM, Nexxim and HSPICE

Design Management

Hierarchical Schematic and Layout (2D/3D)

Design Exploration
Parameterization, Optimization, Sensitivity & Statistical
Bi-directional Links to Field Solvers
HFSS, PlanarEM, SIwave, Q3D, 2D Extractor
3rd Party Links for Models and Geometry

High Performance Computing (Multi-core/GPU)

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2011 ANSYS, Inc.

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Ansoft Designer User Interface

Post-Processing

Design
Entry

Design
Management

Layout

Property
Management

2011 ANSYS, Inc.

September 26,
2011

Simulation
Management

Designer Links
Links for Cadence Allegro/APD/Virtuoso
Run from either Cadence or Designer (Allegro/APD)
Design cutouts and wirebonds for critical nets
Tightly couples ECAD, Circuits and HFSS

Links for ODB++

Common PCB Manufacturing format
Translation path for Mentor, Zuken, Cadence, Altium,

2011 ANSYS, Inc.

September 26,
2011

Ansoft Designer HFSS - Solver on Demand

HFSS - Solver on Demand

Intuitive PCB design entry alternative for HFSS

Chips, packages, channels, modules,
HFSS / PlanarEM engine selection at runtime
3D Full-wave FEM Technology

Designer layouts simulated with HFSS

Boundaries handled automatically
Excitations with a mouse click
Finite dielectrics and ground supported

Terminal Excitations (Wave and Lumped Gap Port)

Single ended and Differential
Vertical and Horizontal
Coaxial, CPW and Grounded CPW

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2011 ANSYS, Inc.

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2011

System Design Details

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2011 ANSYS, Inc.

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Balanced Amplifier
What is a Balanced Amplifier?
Two nearly identical amplifiers in parallel
Amplifiers between two 90 hybrids
Reflections cancel at I/O ports through hybrid
V0

VG

2 0

VG
VG
0
180 0
2
2
VG90
G
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2011 ANSYS, Inc.

September 26,
2011

VG

2 90

Balanced Amplifier
Why used a Balanced Amplifier?
Amplifiers optimized without concern of loading
Noise Figure, Flatness, etc.
Linear range and Max power increase by 3dB
Reflections absorbed by loads at isolation ports
V0

VG

2 0

VG
VG
0
180 0
2
2
VG90
G
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2011 ANSYS, Inc.

September 26,
2011

VG

2 90

Balanced Configuration Operation

A 0

.5A - f
.5A - f- 180
90- 90

.707A

90

- 90

90

.707A - 90

f- 90

.5A - f- 90180 90
.5A - f- 180
90- 90

A - f

A
2
45

A
2
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2011 ANSYS, Inc.

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2011

Design Description
Balanced Amplifier

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Combine two MMIC Amplifiers in parallel

Incorporate amplifiers in separate packages
Combine Amplifiers and 90 Hybrids on board
Include on-board biasing for amplifiers

2011 ANSYS, Inc.

September 26,
2011

MMIC Amplifier Design

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2011 ANSYS, Inc.

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2011

MMIC Amplifier Details

Power Amplifier

Modeled in Designer with UMS design kit

UMS pHEMT Process

10GHz center frequency

Multiple Gain stages for increased output

Wilkinson dividers to distribute power

Compression determined by final stage
Linear region and compression level increased

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Reactive matching
Transmission line sections designed for 10GHz

2011 ANSYS, Inc.

September 26,
2011

Amplifier Schematic
Three Gain stages separated by Wilkinson dividers
AMP
NL
AMP
NL

AMP
NL
AMP
NL

Port1

Port2

AMP
NL
AMP
NL

AMP
NL
AMP
NL

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2011 ANSYS, Inc.

September 26,
2011

Amplifier Response
Three amplification stages produce 22dB of gain
Input compression point around 11dBm

Gain = 22dB
Power = 30dBm
P1dB = 11dBm

F=10GHz
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2011

Amplifier Layout
1

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2011

Branchline Hybrid Design

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90 Hybrid Design Overview

Hybrid Applications
Power Splitter / Combiner
Load on one of the input / output ports, respectively

Sum and Difference outputs

Two inputs to hybrid

90 Hybrid Features
Power Splitter

Z Z0
L

Second input port is terminated

Quarter wavelength lines
Series lines have lower imedance

Output ports are 90 out of phase with each other

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2011 ANSYS, Inc.

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2011

Z Z0 / 2
L

90 Hybrid Design Overview

Physical Modeling
Implement with transmission lines
Conserve space by bending series lines
Parameterize lengths and widths

Analyze electromagnetically to account for all effects

Optimize and Tune to 10GHz
0.00

Ideal Linear Response

Branchline

ANSOFT

-5.00

-10.00

Y1

Curve Info
dB(S(Port1,Port1))
dB(S(Port1,Port2))
dB(S(Port1,Port3))
dB(S(Port1,Port4))

-15.00

-20.00

-25.00

-30.00
5.00

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2011 ANSYS, Inc.

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2011

7.50

10.00
F [GHz]

12.50

15.00

90 Hybrid Design Overview

Physical Modeling
Implement with transmission lines
Conserve space by bending series lines
Parameterize lengths and widths

Analyze electromagnetically to account for all effects

Optimize and Tune to 10GHz
0.00

Ideal Linear Response

Branchline

ANSOFT

-5.00

-10.00

Y1

Curve Info
dB(S(Port1,Port1))
dB(S(Port1,Port2))
dB(S(Port1,Port3))
dB(S(Port1,Port4))

-15.00

-20.00

-25.00

-30.00
5.00

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2011 ANSYS, Inc.

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2011

7.50

10.00
F [GHz]

12.50

15.00

90 Hybrid Design Setup

Hybrid Parameterization
Wavelength, width and feed length

Port2

Port1

HFSS Solver on Demand

HFSS analysis directly in Designer
View mesh, airbox and parameterization

Port4
Port3

Final HFSS Mesh

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2011 ANSYS, Inc.

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2011

Hybrid Parameterized Analysis

Build Model from parametric solutions
Coarse sweep over each parameter
Distributed solve for speed up

Circuit Model of HFSS solution

Circuit simulation interpolates solution space
EM accuracy at circuit speeds

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2011 ANSYS, Inc.

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Hybrid Real Time EM Tuning

Solved Parametrically

Tuned in real time

Tuned Response

0.00

Test Hybrid

ANSOFT

-5.00

-10.00

Y1

-15.00

Lambda/4 = 144mil
W35 = 6.7mil
Larm = 125mil

Curve Info
dB(S(Port1,Port1))
Lambda4='144mil' Larm='125mil' W35='6.7mil'
dB(S(Port1,Port2))
Lambda4='144mil' Larm='125mil' W35='6.7mil'
dB(S(Port1,Port3))
Lambda4='144mil' Larm='125mil' W35='6.7mil'
dB(S(Port1,Port4))
Lambda4='144mil' Larm='125mil' W35='6.7mil'

-20.00

-25.00

-30.00

-35.00

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2011 ANSYS, Inc.

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5.00

7.50

10.00
F [GHz]

12.50

15.00

Include Package Transition Effects

Additional effects

Wirebonds
Vias
Transitions
Package

Include "partial package" in hybrid analysis

Vary arm lengths to tune hybrids

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Package & Transition Parametric Sweep

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Parametric Analysis

2011 ANSYS, Inc.

September 26,
2011

Dual Hybrid Testing

Check parallel operation

Validate balanced amp configuration
Amplifiers added in at final testing
Tune parametric model
Test Hybrid

Demonstrates
Insertion and Return Loss
Isolation functionality
Design Integrity

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2011 ANSYS, Inc.

September 26,
2011

Test Hybrid
W=3.7mil
P=40mil

Port1

Port2

Port3
Port4

W=3.7mil
P=40mil

Dual Hybrid
Design in Design feature

Paste EM Designs into other EM Designs

Unlimited Hierarchy
Solve full model
Sub-Designs are fully parameterizable
Port3
Pin3

Port4
Port2
Pin2
Port4
Pin4

Port1
Pin1

Pin1
Port1

Pin4
Port4

Other Geometries
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2011 ANSYS, Inc.

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2011

Port2
Pin2

Port1
Port3
Pin3
U2

U1

Dual Hybrid Electromagnetic Results

RF In

Port3
Pin3

Port4
Port2
Pin2

Iso

Port4
Pin4

Port1
Pin1

Pin1
Port1

Pin4
Port4

Iso

Port2
Pin2
U2
Test Hybrid

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2011 ANSYS, Inc.

Port1
Port3
Pin3
U1
Test Hybrid

September 26,
2011

RF Out

Via Transition

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2011 ANSYS, Inc.

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2011

MMIC Amplifiers
in
Packages on Board

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2011 ANSYS, Inc.

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2011

Chip in Package on Board

MMIC Amplifier in Package

MMIC Chips in QFN Package
2 packaged amplifiers on FR-4 multi-layered board
Multiple wire bonds and vias in package

Balanced Amplifier on Board

Multiple SMT Components for bias
Branchline 90o hybrids in stripline layer
Vias, signal pads and interconnects

HFSS Solver on Demand

Board & package solved with HFSS in Designer
Combined with power amps and passives

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2011 ANSYS, Inc.

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2011

Chip in Package on Board

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2011 ANSYS, Inc.

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2011

Mesh View: HFSS in Designer

Without Bias For

clarity

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2011 ANSYS, Inc.

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2011

Mesh View: HFSS in Designer

With Bias
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2011 ANSYS, Inc.

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2011

Chip in Package On Board: Schematic

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2011 ANSYS, Inc.

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2011

Full Board and Package Layout

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2011 ANSYS, Inc.

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2011

Full board Linear Performance

System Gain very close to ideal: 21.9dB

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2011 ANSYS, Inc.

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2011

Power Comparison

BLUE Full Board

RED Single Amplifier

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2011 ANSYS, Inc.

September 26,
2011

Conclusion

An integrated Chip in Package on Board Design flow has been

presented
Balanced Amplifier
MMIC Amplifier
Branchline Hybrid

Electromagnetics and Circuits combined for entire solution

Non-linear amplifier handled at circuit level

Hybrids, Packaging and Board handled with Electromagnetics
Designer Links automates geometry transfer and setup
HFSS Solver on Demand integrates seamless with circuits

Balanced Amplifier Benefits

Amplifier design optimized independent of loading effects
Increased linear dynamic range and maximum power

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2011 ANSYS, Inc.

September 26,
2011