Chapter 6

Program Control Instructions

Dr. Hanal Abuzant

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

JMP

The JMP instruction is a GOTO that is

found in all computer languages. JMP
passes program flow to another part of the
program.
The JMP instruction comes in 3 forms,
short, near, and far.
Short jumps are within +127 and -128
bytes from the JMP instruction.
Near jumps are within 32K.
Far jumps are anywhere within the memory
system.

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

JMP stucture
Short

Near

Far

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

Short JMP

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

SATRT: MOV AX, 1

ADD AX, BX
JMP SHORT NEXT
.
.
.
.
NEXT:

Brey: The Intel Microprocessors, 7e

MOV BX,AX
JMP START
2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

Near JMP

0003H
0005H

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

SATRT: MOV AX, 1

ADD AX, BX
JMP NEXT
.
.
.
.
NEXT: MOV BX,AX
JMP START
Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

EB: opcode for short jumb

offset
Short jmp

0E:displacement
=14 steps

abel: rset

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

Far JMP

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

SATRT:

MOV AX, 1
ADD AX, BX
JMP NEXT
.
.
.
.

NEXT:

MOV BX,AX
JMP FAR PTR START
JMP UP

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

Conditional Jumps
There are many conditional jump
instructions.
Conditional jump instructions, for the
most part, test the flag bits.
Conditional jumps can be either short
or near.
In protected mode a conditional jump
can have a 32-bit displacement.
Some check a single flag bit, while
some check multiple flag bits.

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

One set of conditional jumps test

unsigned numbers (JZ, JNZ, JA, JB,
JAE, or JBE).

One set of conditional jumps test

signed number (JZ, JNZ, JG, JL, JGE,
and JLE).

Two sets of conditional jumps are

needed because the numeric order of
signed and unsigned numbers differ.
(see next slide)

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

Indirect Jumps

Indirect jumps take two forms. One

jumps to the offset location addressed
by a register and the other jumps to
the location addressed by a memory
pointer.
JMP CX
JMP EDX
JMP NEAR PTR [BX]
JMP FAR PTR [ECX]

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.

See page 185

Brey: The Intel Microprocessors, 7e

2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.