Sei sulla pagina 1di 4

The architectures are the specifications, i.e.

the set of registers, instructions


and operation modes that should be supported by implementations of the
architecture.

A family is a specific detailed implementation of an architecture, i.e. the


actual hardware details needed to create an ARM core. Finally a core is a
specific implementation of an architecture, i.e. the actual blue-print of the
transistors and other discrete parts needed to create a ARM CPU.

The ARM architectures are modular so families may implement only some
features of the architecture and not others. Families may also have
extensions not in the architecture and to make things even more interesting
cores in the same family will usually differ in the features they support.

The reason ARM cores are called cores and not chips is that the specific chips
may contain one or more cores (assuming the cores support it) or may have
cores integrated with other components (I/O controllers, Memory interfaces,
etc.) in the same chip.

ARM11 and ARM Cortex-M are different families implementing features in the
ARMv6 architecture with different markets in mind: ARM-11 smartphones and
tablets and Cortex-M micro-controllers AFAIK.
==============================================
=================================
ARM core licensees[edit]
Companies that are current licensees of the 64-bit ARMv8-A core designs
include AMD,[77] AppliedMicro (X-Gene),[78] Broadcom,[77] Calxeda,[77]
HiSilicon,[77] Rockchip,[79] Samsung,[77] and STMicroelectronics.[77]

Companies that are current or former licensees of 32-bit ARM core designs
include AMD,[80] Broadcom,[81] Freescale (now NXP Semiconductors),[82]
[83] Huawei (HiSilicon division),[84] IBM,[85] Infineon Technologies (Infineon
XMC 32-bit MCU families),[86] Intel (older "ARM11 MPCore"), LG,[87][88] NXP
Semiconductors,[89] Renesas,[90] Rockchip,[79] Samsung,[91][92]
STMicroelectronics,[93] and Texas Instruments.[94]

ARM architectural licensees[edit]


In 2013, ARM stated that there are around 15 architectural licensees, but the
full list is not yet public knowledge.[71][75]

Companies with a 64-bit ARMv8-A architectural license include Applied Micro,


[95][96] Broadcom,[76][97] Cavium,[98] Huawei,[99][100] Nvidia,[101][102]
AMD,[103][104] Samsung,[105] and Apple.[71]

Companies with a 32-bit ARM architectural license include Broadcom


(ARMv7),[97] Faraday Technology (ARMv4, ARMv5),[106] Marvell Technology
Group,[107] Microsoft,[108] Qualcomm,[109][110] Intel,[111] and Apple.[71

==============================================
==============================

Android supports 3 different processor architectures: ARM, Intel and MIPS.


The most popular and ubiquitous of these three is, without a doubt, ARM.
Intel is well known primarily because of its popularity in the desktop and
server markets, however on mobile it has had less of an impact. MIPS has a
long heritage, and lots of success, for both 32- and 64-bit solutions in a
variety of embedded spaces, however it is currently the least popular of the
three CPU designs for Android.

In short, ARM is the current winner and Intel is its big brand rival. So what is
the difference between an ARM processor and an Intel processor? Why is ARM
the more popular choice? And does it matter what CPU is in your smartphone
or tablet?

The CPU
The Central Processing Unit (CPU) is the brains of your device. Its job is to
execute a sequence of instructions to control the hardware on your device
(the display, the touch screen, the cellular modem etc.) to turn it from a lump
of plastic and metal into a vibrant smartphone or tablet. Mobile devices are

complex things and these CPUs need to execute millions of instructions to


make them behave as we expect. The speed and power efficiency of these
CPUs is critical. The speed affects the user experience, while the efficiency
affects the battery life. The perfect mobile device is one that has high
performance and low power usage.

Intel is the industry leader in desktops and servers.


This is why the choice of CPU is important. A power hungry, hog of a CPU will
drain your battery fast, however an elegant and efficient CPU will give you
both performance and battery life. At the highest level, the first difference
between an ARM CPU and an Intel CPU is that the former is RISC (Reduced
Instruction Set Computing) and the latter is CISC (Complex Instruction Set
Computing). In simplified (and I emphasize , simplified) laymans terms,
RISC instructions sets are smaller, more atomic, while CISC instruction sets
are larger, more complex. By atomic, I mean that each instruction roughly
translates to a single operation that the CPU can perform, e.g. add the
contents of two registers together. CISC instructions express a single idea,
but the CPU will need to execute 3 or 4 more simplified instructions to
perform it. For example a CISC CPU can be told to add together two numbers
stored in main memory. To do this, the CPU needs to fetch the number from
address-1 (one operation), fetch the number from address-2 (second
operation), add the two numbers (third operation) and so on.
Intel_CPU_Pentium_4_640_Prescott_bottom

All modern CPUs use a concept known as microcode, an internal instruction


set of the CPU that describes atomic operations that the CPU can perform. It
is these smaller (micro) operations that the CPU actually executes. On RISC
processors, the instruction set operations and the microcode operations are
very close. On CISC, the complex instructions need to be translated into
smaller microcode ops (as described above with the CISC add example). This
means that the instruction decoder (the bit that works out what the CPU
actually needs to do) is much simpler on a RISC processor, and simpler
means less power and greater efficiency.
==============================================
==============================================
==============================================
==============================================
==============================================
==============

<operation>{cond} Rn{!}, <reglist>


<operation>:

LDM
reglist := values at Rn
STM
values at Rn := reglist
<mode> controls how Rn is incremented:

<op>IA Increment after.


<op>IB Increment before.
<op>DA Decrement after.
<op>DB Decrement before.
<reglist> is the list of registers to load or store. It can be a comma-separated
list or an Rx-Ry style range.

Potrebbero piacerti anche