Engineering College Bikaner

Digital
Electronics

Assignment

Name- Shailesh Pal

Roll- 08/02/71
Batch- EC2(H1)
4 Semester
TH

Session- 2009-10
 Combinational Logic circuit
The term ”combinational” comes to us from mathematics. In
mathematics a combination is an

Unordered set, which is a formal way to say that nobody cares

which order the items came in.

Most games work this way, if your olleddice one at a time and get a
2 followed by a 3 it is the same as if you had rolled a 3 followed by
a 2. With combinational logic, the circuit produces the same output
regardless of the order the inputs are changed.

There are circuits which depend on the when the inputs change,
these circuits are called sequential logic.

Practical circuits will have a mix of combinational and sequential

logic, with sequential logic making sure everything happens in
order and combinational logic performing functions like arithmetic ,
logic , or conversion.

We begin with both inputs being 0.

We then set one input high.

We then set the other input high.

So NAND gates do not care about the order of the inputs , and we
will find the same true of fall the other gates covered up to this
point (AND,XOR,OR,NOR,XNOR,andNOT).
 Adder or Summer

In electronics, an adder or summer is a digital circuit that performs

addition of numbers. In modern computers adders reside in the
arithmetic logic unit (ALU) where other operations are performed.
Although adders can be constructed for many numerical
representations, such as Binary-coded decimal or excess-3, the most
common adders operate on binary numbers. In cases where two's
complement or one's complement is being used to represent
negative numbers, it is trivial to modify an adder into an adder-
subtractor. Other signed number representations require a more
complex adder.

Clearly adding using digital circuitry is possible. Addition is one of the

most fundamental operations that the computer you are reading this
on is based. This module discusses the required properties of half
and full adders then an implementation of them.

First a bit of revision of binary addition.

This means that if we add 1101101 to 0111010. It precedes exactly

like long arithmetic with a decimal radix. That is why we start at the
right and add the two digits, if there is a carry we write it above the
next digit, then we repeat the same thing this time including the
carry in the calculation. Below is an example of this. It is best to do
this on paper of your own until you understand.
 Half Adders

A half adder is a logical circuit that performs an addition operation

on two one-bit binary numbers often written as A and B. The half
adder output is a sum of the two inputs usually represented with the
signals Cout and S where . Following is the logic
table for a half adder:

Inputs Outputs
A B C S
0 0 0 0
0 1 0 1
1 0 0 1
1 1 1 0

Example half adder circuit diagram

As an example, a Half Adder can be built with an XOR gate and an

AND gate.
___________
A ------| |
| Half |-----
| Adder |
| |-----
B ------|___________|
 Truth
Half Adder Table
Outpu
Input
t
A B S C
0 0 0 0
0 1 1 0
1 0 1 0

1 1 0 1

The half adder is an example of a simple, functional digital circuit built from
two lClearly a half adder is the first step, the right most and first
addition, in the long addition. The truth table for the addition show

Half Adder
A B X

0 0 0

0 1 1

1 0 1

1 1 0
Table 1: The truth table of a Half adder.

This is this truth table is identical to an Exclusive OR between A and

B. (A xor B) ⇔ (A AND NOT B) OR (NOT A AND B) ⇔ (A OR B)
AND (NOT A OR NOT B) ⇔ (A OR B) AND NOT (A AND B) This
means the boolean Algebra representation of this is
 Or

But is generally just written as

In ladder logic:
 Full Adder
A full adder is a logical circuit that performs an addition operation on
three one-bit binary numbers often written as A, B, and Cin. The full
adder produces a two-bit output sum typically represented with the
signals Cout and S where . The full adder's truth
table is:
Inputs Outputs
A B Ci Co S
0 0 0 0 0
1 0 0 0 1
0 1 0 0 1
1 1 0 1 0
0 0 1 0 1
1 0 1 1 0
0 1 1 1 0
1 1 1 1 1

A full adder can be implemented in many different ways such as with

a custom transistor-level circuit or composed of other gates. One
example implementation is with and
.

In ladder logic:
Example full adder circuit diagram
Inputs: {A, B, Cin} → Outputs: {S, Cout}

Example full adder circuit diagram using only NAND and XOR gates
Inputs: {A, B, Cin} → Outputs: {S, Cout}
In this implementation, the final OR gate before the carry-out output
may be replaced by an XOR gate without altering the resulting logic.
Using only two types of gates is convenient if the circuit is being
implemented using simple IC chips which contain only one gate type
per chip.

A full adder can be constructed from two half adders by connecting A

and B to the input of one half adder, connecting the sum from that to
an input to the second adder, connecting Ci to the other input and OR
the two carry outputs. Equivalently, S could be made the three-bit
XOR of A, B, and Ci, and Co could be made the three-bit majority
function of A, B, and Ci.
Full Adder Circuit Truth Table

A Full Adder is a three way addition, i.e it is the addition of the carry
to the other two digits. But a carry result is also required. So firstly for
the carry the truth table is shown in Table 2.

Carry
A B D Carry

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1
Table 2: The truth table of the carry operation.

The carry operation is just A AND B OR A AND D OR D AND B.

Which is written in Boolean Algebra in one of the two below ways.
This is easily seen from a Karnaugh map. But it can also be seen from
the truth table. If two of the three inputs, A,B or D, are one then the
carry must be one. But there are three combinations of this. When A
and B are one; A and D are one; and B and D are one. These cases are
linked together with an three way OR because we want to combine all
of these cases.

Or

A.B + A.D + B.D

Addition
A B C Addition Carry

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1
Table 3: The truth of the Addition operation.

The addition operation is just an A XOR B XOR C. Which is written

as

This can also be expressed as fundamental boolean operator, as ORs,

ANDs and NOTs. If we take this all straight from the truth table. The
logic is

Or
 Subtractor
In electronics, a subtractor can be designed using the same approach
as that of an adder. The binary subtraction process is summarized
below. As with an adder, in the general case of calculations on multi-
bit numbers, three bits are involved in performing the subtraction for
each bit of the difference: the minuend (Xi), subtrahend (Yi), and a
borrow in from the previous (less significant) bit order position (Bi).

The outputs are the difference bit (Di) and borrow bit Bi + 1.

K-map Bi(1,2,3,7)

Subtractors are usually implemented within a binary adder for only a

small cost when using the standard two's complement notation, by
providing an addition/subtraction selector to the carry-in and to
invert the second operand.

(definition of two's complement negation)

 Half subtractor
The half-subtractor is a combinational circuit which is used to
perform subtraction of two bits. It has two inputs, X (minuend) and Y
(subtrahend) and two outputs D (difference) and B (borrow).

Truth table

The truth table for the half subtractor is given below.[1]

XYDB
000 0
011 1
101 0
110 0

From the above table one can draw the Karnaugh map for
"difference" and "borrow".

So, Logic equations are:

Logic diagram for a half subtractor

 Full subtractor

The Full_subtractor is a combinational circuit which is used to

perform subtraction of three bits. It has three inputs, X (minuend)
and Y (subtrahend) and Z (subtrahend) and two outputs D
(difference) and B (borrow).
Easy way to write truth table
D=X-Y-Z
B = 1 If X<(Y+Z)

Truth table

The truth table for the full subtractor is given below.

XYZDB
0000 0
0011 1
0101 1
0110 1
1001 0
1010 0
1100 0
1111 1

So, Logic equations are:

Circuit Diagram for Full Subtractor: