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SIMULATOR STUDY ON LINE FAULT CLEARING BY D.C. CIRCUIT BREAKERS IN A MESHED MTDC SYSTEM
K W
Kannqiesser
INTRODUCTION
HVDC multiterminal systems, here referred
to as MTDC systems, request increasinqly
interest after the first schemes of this
kind are in operation or under commissioning,
respectively. A variety of system configurations can be defined (1) whose properties
concerning
flexibility,
reliability
and
economics are significantly different. Amongst
them the meshed MTDC system offers the important advantage that an outage of a line
section - even a permanent one - does not
prevent the desired energy transfer amongst
all of the terminal stations.
It is an unavoidable consequence of a d.c.
side fault that the energy transfer in the
affected pole of the entire MTDC system
is interrupted until fault clearing. Fast
fault clearing is therefore an essential
requirement in MTDC systems. As will be
shown in this paper d.c. breakers can render
valuable services to fulfil this requirement.
WeSS
- The
Rinq,
In case of a
generates a
of a voltage
wave front -
103
22.
z*
- VDCOL
(voltage
dependent
current
order
limit1 .
These functions may be kept as back-up protection coming into force after a time delay
sufficient to allow d.c. breaker fault clearing.
We furthermore have to make certain assumptions concerning design and functions Of
the d.c. breaker. Figure 2 shows the basic
arrangement of a d.c. breaker. The main
104
(2)
with E
105
Switching off the circuit breakers approximately 75 ms after fault initiation creates
some damped surge voltages. To speed-up
the recovery of the d.c. system voltage
the voltage determining inverter 4 is forced
back into the inverter operation which is
initiated 3 ms after the neqative voltage
surge has occurred at this station.
The performance of the d.c. breakers is
shown in Figure 5 for the same test case
as before. When a breaker is opened, a surge
voltage is generated at both sides of the
breaker, with opposite sign. Ideally the
magnitude of both waves should be Id*Z.
with Z being the surge impedance. In the
example this will be approximately 1 p . u .
voltage which can be seen from the line
voltages U s 1 3 and Us2 3. The other pole-toground voltaies are smaller and more distorted
due to the influence of the d.c. filters,
d.c. reactors and the capacitor across the
breaker contacts in conjunction with the
different distances of the breakers from
the short-circuit location. So the maximum
voltages are still below the arrester level
of 1.6 p.u. The maximum voltage across the
breaker contacts, which should ideally be
2*1d*z, in our case 2 p.u. without surge
arresters, amounts to 1.6 p.u. and 1.2 p . u .
for S 1 and S 2 , respectively. The arrester
voltage of 1.6 p . u . may be reached for a
very short time. The breaker current goes
to zero very fast (time constant theoretically
0.7 ms). In our case with the relatively
low d.c. line current (0.6 p.u. = 1800 A )
the circuit breaker duties are very low.
As
already explained this fault clearing
method prevents overvoltages on the a.c.
converter buses, as can be seen in Figure 6.
With the exception of a single voltage peak
of 1.5 p.u. at rectifier 1 there was no
dynamic overvoltage observed. This should
be compared with the conventional method
of d.c. line fault clearing from which the
corresponding oscillogram is shown in Pigure 7. Here the currents of all stations
are forced to zero via converter control
for a de-ionization time of about 150 ms,
which may be regarded as a minimum. Neglecting
single voltage peaks the dynamic overvoltage
is now between 1.3 and 1.4 p.u. It should
be noted, however, that for a bipolar system
the overvoltages would be lower, since there
is only a 50% load rejection instead of
the 100% load rejection as shown in Figure 7.
the application of d . c .
great advantages.
4.
5.
6.
7.
REFERENCES
1.
2.
3.
Kanngiesser. K.-W.,
and Wolters, J.,
1987, "Comparative performance of an
HVDC transmission system with d.c. breakers for clearing d.c.
line faults",
CIGRE-Symposium, Boston, Report 200-05
4.
5.
6.
7.
8.
9.
CONLUSIONS
1.
Compared
to
other
HVDC
applications
MTDC systems offer technical and economical advantages: they are, however, very
sensitive to d.c. side faults.
2.
3.
Compared
to
the
conventional method
of fault clearing by setting a current
zero
through
the
converter
controls
breakers offers
106
Id14
300 krn
DCF = D.C.filters
SCR = sk/PdN (without B.C. filters)
= Line between nodes i and i
Lij
SCR3 = 2.5
SCR4=3.5
Id43
'641
1p.u
163
: :
+ .:
Y : . :
0.05
0.1
+ x ,-fc-+t----i+----
<:-,
0.15
0.2
0.25
0.35 s 0.4
0.3
-t
@
@
@
Main Contacts
Commutation Circuit
Energy Absorber
107
0.05
0.1
015
0.2
0.25
0.3
0.35 s 0.4
1-
Figure 5 D.C.
from station 2
1P.U
Val
1P.U.
Va 2
1P."
va 3
0.05
0.1
0.15
02
0 25
0.3
0.35 s 0.4
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
1-