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CONVERTER UNIT
2008
Abstract
Figure 1.
Dual module AC to DC electronic transformer 250 kW DC to DC Inverter with
regulated High Voltage DC.
For the ADT power supply, a dual-module approach was used that
would operate directly from a battery pack of the appropriate size. The
modified circuit with all of its components and their values identified is
shown in Figure 2. The system was designed to operate at 20 kHz in the
dual-module operation, producing a rectified output with a ripple of 40
kHz. In this application, 1700V IGBTs were used with series blocking
diodes to produce asymmetric switches.
Energy is extracted from the input filter capacitor bank (Cif) when
the charging switch C1 is triggered. This charges the central capacitor
(Co) to approximately twice the input voltage in a period dictated by
equation 1 or 21μsec. Following the charge cycle, the energy stored in the
central capacitor is discharged into the transformer primary in a similar
resonant discharge as the charge. Equation 1 holds for the discharge with
the modification that the charging inductor element is replaced with the
transformer leakage inductance and the inversion inductor is replaced
with the lead inductance between the discharge switch and the
transformer as depicted in Figure 2. The discharge period is approximately
17 μsec. Since the design incorporates the use of opening switches such
as IGBTs, the control system has to insure that the switches remain closed
until the current flowing through them becomes zero. Also, as the central
capacitor (Co) is discharged into the output, its voltage will reverse before
the discharge current goes to zero. This voltage reversal (Vr) is a function
of the output filter capacitor voltage.
Figure 2.
Dual module DC to XtrDC ADT power supply
On the next charge cycle, the central capacitor will start with a residual
voltage (- Vr) and charge to a final charge voltage as dictated by equation
2 below.
System Design
Since the transformer and its leakage inductance is a critical circuit
element, it was the first component that was designed. Once a good
estimate of the leakage inductance was obtained, the inverter frequency
was selected and the rest of the inverter was designed.
The transformer was designed and built by Jim O’Loughlin from
AFRL-DEHA. For 20 kHz operation, an amorphous nanocrystalline core was
selected to minimize losses. Each primary coil was wound using 8 turns of
bifilar Litz wires to yield a Q of over 100. One of the primary windings is
reverse-wound to simplify the electrical interconnections to the power
circuit. Each transformer leg contains two primary coils.
Figure 3.
Cross section construction of output transformer
Figure 5.
Layout of the ADT Power Supply
As part of the control and diagnostics, each module includes a high
frequency, compact current transformer made of 1000T wound on a
nanocrystalline toroid core. The current transformers are used to measure
both the charging and discharging currents on each module. The output
current is measured as the IR drop across the output current limiting 100
ohm resistor. All voltage measurements are made with appropriately sized
voltage dividers such that all signal levels are down to approximately 30V
before going into the control system EMI shielded enclosure on top of the
oil tank lid. Inside the control enclosure, these signals are further
processed such that the signal connected to the Princeton Power System
V2.0 control board receives a signal in the range of ±10V at full scale. All
signals are buffered and are available for diagnostics outside the shielded
enclosure. In future units, the shielded enclosure will be reduced in size,
since most of the diagnostic channels available in this prototype will be
removed.
Figure 6.
Assembled ADT power supply in an upside-down position
Figure 7.
IGBT Drivers, Signal Conditioning, and PPS V2.1 Control Board
The Princeton Power board also received the analog signals from the
voltage and current measurement that comes from the signal conditioning
board. For user interface, the control system has a RS-232 text-based
serial interface, sixteen discrete digital inputs and outputs, and four 0-10V
analog user inputs and outputs. It also has the upgrade option of a
dynamic, Java-based graphical user interface.
Control Loop
The Princeton Power control system controls inversion switching time
and pulse frequency to control the power supply. During a charge pulse,
the central capacitor starts at some negative voltage, and at a time t = 0
the inversion IGBT is fired, causing positive current to flow in the
capacitor, and the capacitor voltage rises. At the calculated inversion
triggering time, the charging IGBT is fired, which reverse biases the
inversion IGBT, and the central capacitor continues to charge, but now
with a the positive battery voltage in series with the LC circuit.
Reducing the inversion time causes the central capacitor to charge up
more (the full battery voltage is applied for a larger portion of the charge
pulse), which results in greater charge flow to the output, and in turn a
higher output voltage. Increasing the inversion time has the opposite
effect, and results in a lower output voltage. The control system runs a
proportional-integral loop on inversion triggering time with the error
between the target and measured output DC voltage as the feedback.
The pulse frequency is made to go as fast as possible, up to 20kHz.
For a given amount of current throughput in the system a lower pulse
frequency means that more charge must flow per pulse, and this produces
higher peak and rms currents in the IGBTs and higher voltages on the
central capacitor. The fastest pulse frequency possible is also necessary
for producing the lowest voltage ripple possible on the output.
Because pulses with significant values for inversion time can last
longer than their allotted ~25us, it is not always possible to set the pulse
frequency at 20kHz. The control system monitors the central capacitor
current. It uses this measurement, when the current reaches zero, to
detect the end of the charge pulse and record the duration of the pulse. It
uses this data to predict the duration of the next pulse and time the
triggering appropriately to avoid overlapping charge and discharge pulses.
This allows the pulse frequency to go as fast as possible, but without
overlapping when pulses last longer than the allotted 25us.
Figure 8. a) 384 V battery bank, b) test setup with air cooled load resistor
Figure 8 shows the time interleaved inverter operation of the two-module
power supply. The system startup is shown on the left. The startup
sequence requires that the pulse frequency is low and quickly raised to
20kHz. The right side shows the end of a long duration run and how
energy in the output section dissipates while the system had been
operating at 20 kHz before the system was shutdown. The green trace
shows the regulated output voltage. The upper traces are the central
capacitor voltages, while the lower traces are the corresponding currents.
The operation is in full agreement with the circuit modeling.