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A:
XOR GATE
4: Write the truth table of XOR gate. 5. Draw the symbol of XNOR gate.
6Write the Boolean expression for XNOR gate.
Input
A
B
0
0
1
1
0
1
0
1
Output
Y= A
0
1
1
0
7. Write the truth table of XNOR gate. 8. Name the Universal gates?
Ans. NAND gate and NOR gate are the Universal
Input
Output
gates
A
B
Y= A B
9. How many two input NAND gates must be
0
0
1
used to produce two input OR function?
0
1
0
Ans. 3 NAND gates are used to produce two input
1
0
0
OR gate
1
1
1
10. How many two input NOR gates must be used to produce two inputs OR
function?
Ans. 2 NOR gates are used to produce two input OR gate.
11. Why do we use digital codes?
Computers and electronic devices need a systematic and precise method to read
information. This system requires each character, letter or symbol to be unique
and easily distinguishable.
12.
Ans. BCD is a numeric code in which each digit of a decimal number is represented by a
group of four bits using 8-4-2-1 or 2-4-2-1 codes. It is expanded as Binary Coded
Decimal.
13. What is a gray code?
Ans. Gray code is a minimum change code belongs to non-weighted codes. There will be
only one bit change in gray code for the successive decimal number.
14. Which are weighted codes?
Ans. It is a code in which each bit has its own bit positional value or Weightage.
15. Which are the non-weighted codes?
Excess-3 code and Gray code.
16. Name the self-complementing code.
Excess-3 code.
17.
0
1
1
S=A
B
C = A.B
S = A B Cin
C = A.B + B.Cin
+ A.Cin
27.
Write the Boolean expression for sum of half adder
29: Write the Boolean expression
Ans:
=AB
for sum of full adder
28. DRAW THE BLOCK DIAGRAM OF HALF SUBTRACTOR.
Ans: S = A B Cin
30: write the Boolean expression
for the carry of half adder
Ans: C=A.B
31: Write the Boolean expression for the carry of full adder
Ans: C =AB+BCin+ACin
32: write the Boolean expression for the difference of half subtractor.
Answer: D = A B
33: write the Boolean expression for borrow of a half subtractor.
Ans: Bout = A B
34. Define Min Term.
Ans. Minterm is the product (AND) term in a Canonical SOP (CSOP) which contains all the
input variables present either in compliment or uncompliment form.
35. Define Max Term.
Ans. Maxterm is the Sum (OR) term in a Canonical POS (CPOS) which contains all the
input variables present either in compliment or uncompliment form.
36. Define SOP.
Ans. The Boolean expression consists of two or more logical product (AND) terms that are
combined with OR logic (sum) is known as SOP.
37. Define POS.
Ans. The Boolean expression consists of two or more logical sum (OR) terms that are
combined with AND logic (product) is known as POS.
38. Define CPOS.
Ans. If each OR term in the POS contains all the input variables either in complement or
uncomplemented form then that POS is called canonical POS.
39. Define CSOP.
Ans. If each AND term in the SOP contains all the input variables either in complement
or uncomplemented form then that SOP is called canonical SOP.
40. what is a karnaugh map?
Ans: Yes, a flip flop is a bi-stable multi vibrator which has two stable states. It can remain
in either one of the states indefinitely unless an external i/p is given to change its state.
56.Define a clock pulse?
Ans: A clock pulse is a periodic train of continuous rectangular or square pulses.
61. What is a register?
Ans: A register is a set of flip-flops used to store binary data. The storage capacity of a
register is the number of flip flops connected. I,e, for 4 bit storage we need 4 flip flops
connected together.
57 Draw the logic circuit of an unclocked SR flip-flop
58. Draw the logic
circuit of D-flip flop
Ans.
62. Which is the line used to transfer data in and out of a PISO shift register?
Ans: The shift/load input line is used to transfer the data bits in and out of a PSIO shift
register. If this line is high then the data is shifted out from one register to another
serially, if this line is low then the input data is loaded to all the flip flop.
63. What is a counter?
Ans: A group of flip flops arranged in such a way that they can be used to count the
binary numbers with the clock pulse applied is known as counter.
Output
Output
0
0
1
1
0
1
0
1
Y= A
0
1
1
0
3. Pin diagram of
4. Pin
Input
A
B
0
0
1
1
0
1
0
1
Y= A
1
0
0
1
IC7400
diagram of IC7402
Input
A
B
0
0
1
1
0
1
0
1
Output
C=
S= A
A.B
B
0
0
0
1
0
1
1
0
and timing diagram of full
adder.
13. Realize the full adder using two half adders and a OR gate.
18. Write the Truth Table for 3 variable i/p with minterm and maxterms
designation.
24 & 25. Draw the logic circuits for the expression AC+C USING BASIC GATES &
Input
output
B A
Y=
A.B+AB
1
A B
AB
27.
28.
flop.
JK FLIP FLOP
JK flip flop is known as universal flip
flop
It does not have an INVALID state
instead it has Toggling state. i.e. the
29.