8900 Product Description

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ZXR10 8900 Product

Description
ZXR10 8900 Product Description

Version
Date
Author
Approved By
Remarks
V1.0
2008-05-30
Mao yucheng
Gu chengyu
Not open to the Third Party
V2.0
2009-09-09
Mao yucheng
Gu chengyu
Updating format
2009 ZTE Corporation. All rights reserved.

ZTE CONFIDENTIAL: This document contains proprietary information of ZTE and is not to be
disclosed or used without the prior written permission of ZTE.
Due to update and improvement of ZTE products and technologies, information in this document
is subjected to change without notice.
ZTE Confidential Proprietary
TABLE OF CONTENTS
1
Overview ..................................................................................................................... 1
2
2.1
2.2
2.3
2.4
2.5
Highlight Features ...................................................................................................... 3

Advanced system architecture for high reliability ........................................................ 3
Powerful security function for Green network .............................................................. 3
Support of IPv6 for lower CAPEX ................................................................................ 3
Support for MPLS L2/L3 VPN for all services implementation .................................... 3
Unified network management for lower OPEX ............................................................ 4
3
3.1
3.1.1
3.1.2
3.2
Functionality ............................................................................................................... 5
Basic Function ............................................................................................................. 5
Layer 2 protocol supported .......................................................................................... 5
Layer 3 protocol supported .......................................................................................... 5
Service Functions ........................................................................................................ 5
4
4.1
4.2
4.2.1
4.2.2
4.2.3
4.2.4
4.2.5
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.3.5
4.3.6
4.3.7
4.3.8
4.3.9
4.3.10
4.3.11
4.3.12
4.3.13
4.3.14
4.3.15
4.3.16
4.3.17
4.3.18
4.3.19
System Architecture .................................................................................................. 7

Product Physical Structure .......................................................................................... 7
Hardware Architecture ................................................................................................. 7
System hardware architecture ..................................................................................... 8
Principle hardware system........................................................................................... 9
Control and Switching Module ................................................................................... 10
Power Module ............................................................................................................ 14
Interface Module ........................................................................................................ 15
Software Architecture ................................................................................................ 40
System software architecture .................................................................................... 40
Architecture of Layers and module discription........................................................... 44
ROS ........................................................................................................................... 45
SSP Switching Subsystem ........................................................................................ 46
Coprocessor Software Subsystem ............................................................................ 47
Software Forwarding Support Subsystem ................................................................. 47
L2 Management and Protocol Subsystem ................................................................. 47
IP Supporting Protocol Subsystem ............................................................................ 56
Unicast Routing Subsystem....................................................................................... 58
Multicast Routing Subsystem .................................................................................... 61
MPLS Protocol Subsystem ........................................................................................ 61
Application sub-system .............................................................................................. 68
DHCP ......................................................................................................................... 68
Statistics and Alarm Subsystem ................................................................................ 69
Security Subsystem ................................................................................................... 69
Maintenance and Management Subsystem .............................................................. 70
SNMP Subsystem ...................................................................................................... 70
Monitoring Subsystem ............................................................................................... 71
IPv6 Subsystem ......................................................................................................... 71
Technical Specifications ......................................................................................... 71
6
6.1
6.2
6.3
Networking ................................................................................................................ 75
Large scale MAN convergence layer networking application .................................... 75
Medium and small scale MAN core layer networking application ............................. 75
Campus Network Applications ................................................................................... 76
II
Acronyms and Abbreviations ................................................................................. 77
III
FIGURES
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Figure 9
Figure 10
Figure 11
Figure 12
Figure 13
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Figure 24
Figure 25
Figure 26
Figure 27
Figure 28
Figure 29
Figure 30
Figure 31
Figure 32
Figure 33
Figure 34
Figure 35
Figure 36
Figure 37
Figure 38
Figure 39
Figure 40
Figure 41
Figure 42
Figure 43
Figure 44
IV
Appearance of ZXR10 8902/8905/8908/8912 ............................................................... 7

Hardware Architecture of ZXR10 8912/8908/8905 ........................................................ 8
Hardware Architecture of ZXR10 8902 .......................................................................... 8
ZXR10 8905/8908/8912 System Hardware Schematic Drawing ................................. 10
ZXR10 8902 System Hardware Schematic Drawing ................................................... 10
ZXR10 8900 main control board Schematic Drawing.................................................. 11
8902 main control board Schematic Drawing .............................................................. 11
Back panel of 8912 main control card ......................................................................... 12
Back panel for 8908 main control card ........................................................................ 12
8912/8908/8905 DC Power Supply Board ................................................................... 14
8912/8908/8905 AC Power Supply Board ................................................................... 15
8902 DC Power Supply Board ..................................................................................... 15
8902 AC Power Supply Board ..................................................................................... 15
44+4 FE optical interface board panel ......................................................................... 16
44+4 FE electrical interface board panel ..................................................................... 16
12-port GE Electrical Interface Board Panel ................................................................ 17
12-port GE Optical Interface Board Panel ................................................................... 18
24-port GE Electrical +2-port 10G optical Ethernet Interface Board Panel ................. 24
24-port GE Optical interface +2-port 10G optical Ethernet Interface Board ................ 26
2-port 10G Ethernet Optical Interface Board Panel ..................................................... 27
24-port GE mpls Optical Interface Board Panel .......................................................... 31
48-port GE MPLS Electrical Interface Board Panel ..................................................... 32
48-port GE mpls Optical Interface Board Panel .......................................................... 33
24-port GE Optical interface +2-port 10G MPLS optical Ethernet Interface Board ..... 34
4-port 10G MPLS Ethernet Optical Interface Board Panel .......................................... 36
24-port GE OAM Optical Interface Board Panel .......................................................... 37
The Panel of DPI Service Module ................................................................................ 39
The Panel of FW board ................................................................................................ 40
Architecture of the Operation Support Subsystem ...................................................... 42
Architecture of the L2 Subsystem ................................................................................ 43
Architecture of the L3 Subsystem ................................................................................ 44
ZXR10 8900 software architecture .............................................................................. 45
ZESR link down alarm ................................................................................................. 53
PBT message format and service implementation ...................................................... 54
PBT CFM OAM link inspection and protection ............................................................ 55
PBT QoS service priority mapping ............................................................................... 56
Figure 45
Figure 46
Figure 47
Figure 48
Figure 49
Figure 50
Figure 51
Figure 52
Figure 53
Block Diagram of the Unicast Routing Protocol Subsystem ........................................ 58

MPLS Operating Principles .......................................................................................... 62
MPLS Header Structure ............................................................................................... 63
Basic Model of BGP MPLS VPN ................................................................................. 64
Basic VPWS network model ........................................................................................ 65
Basic VPLS network model ......................................................................................... 66
Large scale MAN convergence layer networking application ...................................... 75
Medium and small scale MAN core layer networking application ............................... 76
Campus Network Applications. .................................................................................... 76
TABLES
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Table 14
Table 15
Table 16
Table 17
Table 18
Table 19
Table 20
Table 21
Table 22
Table 23
Table 24
Table 25
Table 26
Table 27
Table 28
ZXR10 8902/8905/8908/8912 physical parameters ...................................................... 7

The features of the ports on the main control board .................................................... 13
The keys on the main control board ............................................................................ 13
The indicators on the panel of main control board ...................................................... 14
Specifications of the 12-port GE Electrical Interface Board......................................... 17
Specifications of the 12-port GE Optical Interface Board ............................................ 18
Specifications of the 24-port GE electrical Interface Board ......................................... 20
Functions of the Indicators on 24-port GE Optical Interface Board ............................. 21
Functions of the Indicators on 48-port GE Electrical Interface Board ......................... 22
Functions of the Indicators on 48-port GE Optical Interface Board ............................. 23
Specifications of the gigabit interfaces of the 24-port GE Electrical Interface+ 2-port
10G optical Ethernet Interface Board .......................................................................... 24
Specifications of the 10G interfaces of the 24-port GE Electrical Interface+ 2-port
Indicators on 24-port GE Electrical Interface+ 2-port 10G optical Ethernet Interface
Board............................................................................................................................ 25
Specifications of the gigabit interfaces of the 24-port GE Optical Interface+ 2-port
Specifications of the 10G interfaces of the 24-port GE Optical Interface+ 2-port
Functions of the Indicators on 24-port GE Optical Interface+ 2-port 10G Optical
Ethernet Interface Board .............................................................................................. 27
Specifications of the 2-port 10G Ethernet Optical Interface Board .............................. 28
Functions of the Indicators on 2-port 10G Ethernet optical interface board ................ 28
Specifications of the 24-port GE MPLS Optical Interface Board ................................. 31
Functions of the Indicators on 24-port GE MPLS Optical Interface Board .................. 31
Table 29
Table 30
Table 31
Table 32
Table 33
Table 34
Table 35
Table 36
Table 37
Table 38
Table 39
Table 40
Table 41
Table 42
Table 43
Table 44
Table 45
VI
Specifications of the 48-port GE MPLS Electrical Interface Board .............................. 32

Functions of the Indicators on 48-port GE mpls Electrical Interface Board ................. 32
Specifications of the 48-port GE mpls Optical Interface Board ................................... 33
Functions of the Indicators on 48-port GE mpls Optical Interface Board .................... 34
Specifications o the gigabit interfaces of the 24-port GE Optical Interface+ 2-port
10G MPLS optical Ethernet Interface Board ............................................................... 35
Specifications o the 10G interfaces of the 24-port GE Optical Interface+ 2-port
10G MPLS optical Ethernet Interface Board ............................................................... 35
Functions of the Indicators on 24-port GE Optical Interface+ 2-port 10G Optical
Ethernet Interface Board .............................................................................................. 36
Specifications of the 4-port 10G MPLS Ethernet Optical Interface Board ................... 36
Functions of the Indicators on 4-port 10G MPLS Ethernet optical interface board ..... 37
Specifications of the 24-port GE OAM Optical Interface Board ................................... 37
Functions of the Indicators on 24-port GE OAM Optical Interface Board.................... 38
Specifications of the DPI Board ................................................................................... 39
Functions of the Indicators DPI Board ......................................................................... 39
Specifications of the FWI Board .................................................................................. 40
Functions of the Indicators FW Board ......................................................................... 40
Basic features for ZXR10 8900 series ......................................................................... 71
Acronyms and Abbreviations ....................................................................................... 77
Overview
As Internet services are growing dramatically, IP has become the most widely used
transmission method for the new generation of network infrastructure in the world and
IP-based services will take the leading place in ISP networks. To be more competitive in
the transformation of communications networks, carriers are building broadband IP
networks to carry data, voice, and video services.
ZTE is an industry-leading data communication equipment provider. As one of the three
strategic products, data communication product line dedicates to advanced, stable and
reliable data products research and development, to provide operator, government, and
enterprise with full series of IP network data products and end-to-end individualized
solution.
ZXR10 8900 series Terabit MPLS routing switches are the latest introduced products by
ZTE with high capacity and performance for the core/aggregation layer of the network.
The series has the following models: ZXR10 8912, 8908, 8905, and 8902, among which
ZXR10 8912 reaches up to 2.88Tbps for the bandwidth of the backplane, 1152Gbps
switching capacity, 857Mpps packet forwarding rate. ZXR10 8900 family supports
L2/L3/L4 wire speed switching capability, mainly positioned at the core/aggregation layer
of carriers IP MAN, the campus, e-government and corporate network.
ZXR10 8900 series products adopt advanced modular design, a paralleling processing
mechanism based on multiple processors, and a CROSSBAR space-division switching
architecture. The key module adopts 1:1 redundancy backup. It support a wide variety of
interfaces, such as 10GE, GE and FE, providing multiple service functions such as ipv4,
ipv6, MPLS, NAT, multicast, QoS and broadband control. ZXR10 8900 Terabit routing
switch is applicable to the core layer and aggregation layer of various networks with its
high reliability, high scalability, and powerful service capabilities.
ZXR10 8900 series Terabit MPLS routing switch has the following features:
Supporting IPV4 and IPV6 dual protocol stacking: supporting IPv4/IPv6 dual
protocol stacking, supporting high-speed IPv4/v6 transition mechanism, manual
general tunnel and automatic 6To4 tunnel.
Hardware-based IP packet wire-speed forwarding: private ASIC design improves IP

packet processing and forwarding capability.
Supporting complete routing protocols: unicast supports mainstream routing

protocols such as RIP, OSPF, IS-IS, and BGP4/BGP4+.
Powerful MPLS support: adopting distributed hardware forwarding to fully satisfy

high performance and high reliability requirements of customers. Supporting MPLS
TE, MPLS VPN, FRR, VPLS, VPWS, and MCE.
Enhanced Ethernet support: supporting EAPS-based ZESR (ZTE Ethernet Smart

Ring), ZESS (ZTE Ethernet Smart Switch) dual uplink protection, and PBT/MPLSTP
Traffic control and bandwidth control: implementing port, user or application-based

bandwidth control via hardware.
Rich service functions: security,

management and online test.
Complete security measures: system management security, routing protocol

security authentication, packet filtering and traffic classification, QinQ, user
authentication, and fine user binding.
Complete network management: being able to implement the whole network

management during the whole course with ZTE NetNumen N31.
High performance price ratio: has more competitive price with the same
performance and configuration compared with equipment from other vendors.
multicast,
controllable
multicast,
cluster
Highlight Features
2.1
Advanced system architecture for high reliability

With a distributed and modular design, ZXR10 8900 adopts a parallel processing
mechanism based on multiple processors and Crossbar architecture in ZXR10
8912/8908/8905, to ensure excellent forwarding performance, powerful service capability
and outstanding scalability.
2.2
Powerful security function for Green network

ZXR10 8900 supports ACL security filtering mechanism and provides security control
functions based on user, address, application and port. Supports MPLS VPN, support
port based queues with different priorities, flow-based ingress and egress bandwidth
restriction, uRPF, guard DDOS attack, SSH2.0 security management, 802.1x access
authentication and transparent transmission, and security functions such as VLAN ID,
MAC address, port number, and IP address bundling. In addition, the system has a
perfect anti-virus mechanism, providing a full security guarantee for reliable network
operations.
2.3
Support of IPv6 for lower CAPEX

Support various IPV6 protocol technologies, including IPV4 and IPV6 dual protocol
stacks, with transition technology when moving form IPV4 to IPV6 such as manual or
automatic configuration tunneling, supports IPV6 static routing. Support dynamic routing
protocols such as BGP4/BPG+, RIPng, OSPFV3 and ISISv6.
Support various IPV6 protocols including IPV4 and IPV6 dual protocol stacks, with
transition technologies form IPV4 to IPV6 such as manual or automatic configuration
tunneling and 6to4 tunneling. It supports IPv6 static routing. Support dynamic routing
protocols such as BGP4/BPG+, RIPng, OSPFV3 and ISISv6, which facilitates carriers to
implement smooth transition and upgrade to future network and protects their prior
investment.
2.4
Support for MPLS L2/L3 VPN for all services

implementation
ZXR10 8900 L2 MPLS VPN supports VPWS (martini) and VPLS, while L3 VPN complies
with RFC2547bis. The product can interwork with MPLS VPN service of devices from
other mainstream vendors. It supports MPLS-TE to guarantee reliability of network and
nodes.
2.5
Unified network management for lower OPEX

ZXR10 8900 supports RFC1213 SNMP, with which the in-band NM can use Telnet (CLI)
or SNMP (GUI) to implement unified NM based on NetNumen platform.
NetNumen N31 is a data network management platform designed with the latest Internet
technology. As a highly customized carrier-class data network management platform, it
is designed with the bottom-up approach and spans various platforms. The platform
implements unified management and the control of all the data products of ZTE.
Functionality
ZXR10 8900 series Terabit MPLS routing switches are the latest introduced products by
ZTE with high capacity and performance for the core/aggregation layer of the network.
The series has the following models: ZXR10 8912, 8908,8905 and 8902 among which
ZXR10 8912 reaches up to 2.88Tbps for the bandwidth of the backplane, 1152Gbps
switching capacity, 857Mpps packet forwarding rate. ZXR10 8900 family supports
L2/L3/L4 wire speed switching capability, mainly positioned at the core/aggregation layer
of carriers IP MAN, campus, e-government and corporate network.
3.1
Basic Function
3.1.1
Layer 2 protocol supported
3.1.2
3.2
Supporting IEEE 802.3,IEEE 802.3u,IEEE 802.3z,IEEE 802.3x,IEEE 802.1p and

etc.
Supporting IEEE 802.1d STP(Spanning Tree Protocol),MSTP(Multiple Spanning

Tree Protocol),RSTP(Rapid Spanning Tree Protocol).
Supporting IEEE802.1q, number of VLAN 4096, support VLAN extension (QinQ).
Supporting ZESR(ZTE Ethernet Smart Ring) technology.
Layer 3 protocol supported
Supporting IPv4 routing protocols such as RIPv1/v2, OSPF, BGP, and IS-IS.
Supporting IPv6 RIPng, BGP4+, OSPFv3, and IS-ISv6.
Supporting 6to4 tunneling, 4over6 tunneling, and 6PE.
Supporting MPLS protocol.
Service Functions
MPLS VPN: Distributed hardware forwarding, L2 VPLS and VPWS (Martini), L3

RFC 2547bis protocol.
Multicast: supporting multicast routing protocols such as IGMP, PIM-DM/SM,

DVMRP, MSDP, and MBGP.
Bandwidth control: Implementation based on port, application and traffic-based

bandwidth control with granularity of 64K.
Authentication: supporting 802.1x and RADIUS Client.
DHCP: supporting DHCP Relay.
Supporting port mirroring: mirroring implementation including control module,

particular ports and particular slots.
QoS: ZXR10 8900 series switch provides complete QoS support for IP DiffServ
solution. It is completely compatible with standards of DiffServ solution including
RFC2474, RFC2475, RFC2497, and RFC2498. It supports packet 802.1p and
DSCP priority re-marking, packets sending and receiving rate restriction at port,
packet re-orientation, CAR, 8 port output queue, port-based queue scheduling (SP,
WRR, WFQ, SP+WFQ, and SP+WRR), and QoS Profile management. It permits
QoS service solution customization by users to support DiffServ components
(including classifier, marker, measuring unit, shaper and dropper) and various PHB
(congestion management and congestion avoidance). It supports 8 priority queues,
L2-based priority queue, L3-based source and destination traffic control and L4
source and destination traffic control.
ACL: ZXR10 8900 series have powerful ACL functions. It implements ACL filtering
by hardware. It can implement full wire-speed ACL. 8900 series switch ACL is
divided into 4 categories: standard ACL, extended ACL, L2 ACL and hybrid ACL.
System Architecture
4.1
Product Physical Structure

The appearance of ZXR10 8912/8908/8905/8902 terabit MPLS routing switch is shown
in Figure 1. See Table 1 for equipment size.
Figure 1
Appearance of ZXR10 8902/8905/8908/8912
Table 1
ZXR10 8902/8905/8908/8912 physical parameters
Description
Items
Physical
parameters
of the
device
4.2
8902
8905
8908
8912
Dimension
(Width*Height*Depth)
442mm
175mm
420mm
442mm
440mm
450mm
442mm
577mm
450mm
442mm
755mm
450mm
Weight
<25kg
<38kg
<49kg
<65kg
Hardware Architecture
This chapter mainly introduces system hardware and operation principles of ZXR10
8900 series Switches, helping people to have a better understanding of this system. It
includes the systems general structure, functional modules, board schematics, and
operation principles. The general architecture of the system, functional modules, the
figure of board and the operation philosophy are as shown in the follows.
4.2.1
System hardware architecture

8900 Series Switches are designed to be installed in racks. The system uses a largecapacity and high-speed serial bus backplane to connect the main control board to all
service line cards. The control and switch matrices supporting 1:1 redundancy are
combined in one, A large-capacity switch matrix is used to guarantee the switching
capacity that the system may need when it is operating at wire speed. The control board
uses a high-performance CPU and large memory to ensure adequate storage space for
speedy protocol processing and huge table contents. Each line card provides packet
processing capability at wire speed through ASIC and offers 10G, 1G and 100M
interfaces according to different services.
Figure 2
Hardware Architecture of ZXR10 8912/8908/8905
Figure 3
Hardware Architecture of ZXR10 8902
Large-capacity high-speed backplane
The system uses a passive large-capacity high-speed backplane to connect the

main control board and all line cards to ensure adequate switching capacity for
system operation and to reserve enough bandwidth for future upgrade.
Main control board

The main control board is an important integrated board with 1:1 redundancy. Each
main control board consists of one high-performance and large-capacity CPU, large
storage space, one inter-board communications switching module, one system
monitoring module, and one clock module. There is one large-capacity switching
matrix existing in 8912, 8908 and 8905 respectively. Two main control boards are
closely connected in operation.
Service line card

After processing the messages, the service line card will send these messages to
the particular ports of the destination service line cards as per the processing
results. As each service line card has its own forwarding table to implement local
forwarding, the wire-speed switching capability can be guaranteed. There are many
types of service line card. According to current demands, the following service line
cards can be provided:
4.2.2
100M Ethernet service card
1000M Ethernet service card
10G Ethernet service card
Principle hardware system

ZXR10 8912/8908/8905 10G MPLS Switches are large-capacity rack-mounted 10G
Ethernet switches. Two-level hardware-based switching is implemented to realize wirespeed switching of every level. Switching of the first level occurs between ports of line
cards. The second level of switching controlled by the main control board occurs
between line cards. As the first switching is very smart, all the ports make their
forwarding decisions at in this stage. The switching chip of this level is usually called
packet processor (PP). The second level switching is cross-connect matrix switch, which
connects all packet processors and performs switching according to simple labels,
constituting a large-capacity switching system.
Figure 4
ZXR10 8905/8908/8912 System Hardware Schematic Drawing
The architecture of ZXR10 8902 in is different. The first level switching is implemented
over ports, and the second switching carried out between two line cards will be
implemented via high-speed XAUI bus.
Figure 5
ZXR10 8902 System Hardware Schematic Drawing
Presently, the line cards of ZXR10 8900 series 10G MPLS routing switches are
universal. The schematic drawings of ZXR10 8900 series including control module,
switching module, packet processing module, interface module and power supply
module are as shown in Figure 4 and Figure 5.
4.2.3
Control and Switching Module

ZXR10 8900 has switching and management module integrated on one main control
card in practice. Its principle diagram is shown in Figure 6.
10
Figure 6
ZXR10 8900 main control board Schematic Drawing
Serdes
SDRAM
Switching
Fabric
Serdes
CP
U
Console
Management
BOOTR
OM
In practical operation, the main control board of ZXR10 8902 implements control feature,
which is as shown in Figure 7.
Figure 7
4.2.3.1
8902 main control board Schematic Drawing
Control Module
Control module composed by master processor and some external functional chips
provides all kinds of interfaces, for example, serial port and Ethernet port, to enable the
system to process all types of applications. Acting as the master processor, the highperformance POWER PC processor can support SDRAM of up to 1G, 64M FLASH
program storage and 512K BOOYROM to complete the following tasks:
System network management protocols, e.g. SNMP.
Network protocols, e.g. OSPF, RIP, BGP-4.
11
4.2.3.2
Providing interfaces for the operation and management of all the line cards.
Carrying out data processing and maintenance.
Switching Module
Designed with particular CROSSBAR chip, the switching module centralizes multiple
high-speed bidirectional interfaces, so it can implement wire-speed switching of multiple
line cards. The switching chip has the following features:
4.2.3.3
Storing, forwarding, and switching data.
Supporting jumbo frames of up to 9 KB
Supporting priority-based queue. When CoS queues are congested, frames can be
discarded selectively.
Each port provides a set of counters for management and control.
Panels and Performance

The back panel for 8912 main control card is shown in Figure 8:
Figure 8
Back panel of 8912 main control card
First-generation and second-generation back panel for 8908 main control card are
shown in Figure 9:
Figure 9
Back panel for 8908 main control card
Back panel for 8905 main control card is shown in Figure 10:
12
Figure 10 Back panel for 8905 main control card
Back panel for 8902 main control card is shown in Figure 11:
Figure 11 Back panel for 8902 main control card
The main control board contains Console port, MGT port and SD port respectively,
where Console port is used to enable the switch to implement local configuration and
management, MGT port is 10/100BASE-TX port used for upgrade and network
management, and SD for inserting SD card of up to 1G is used to control the upgrade,
buffer storage and recovery of software. The features are as shown in Table 2
Table 2
The features of the ports on the main control board
Ports
Features
Console port
RJ45 connector
RS232, BaudRate: 9600bit/s
Transmission distance<15m
MGT port
RJ45 connector
Using Category-5 UTP cables
Transmission distance: 100m
Half duplex/Full duplex
There are many keys such as BST and EXCH, on the panel of the main control board.
Their functions are as shown in Table 3
Table 3
The keys on the main control board
Keys
Functions
RST
Reset, used for resetting the whole board
EXCH
Exchange, used for exchange the master control board to the

standby board.
The indicators on the panel of main control board are as shown in Table 4
13
Table 4
The indicators on the panel of main control board
Indicators
1~2/5/8/
12
RUN
Constant off, the related line card is break down or not in

the position
Flicker , the related line card is in under normal working
condition
ALM
Constant off, no warning or line card is not in position.

On, warning for related line card
RUN
Constant off, the related power supply module is break

down or not in the position.
Flicker , the related power supply module is in under
normal working condition
ALM
Constant off, no warning or the power supply module is not

in position
Constant on, warning for the related power supply module
RUN
Constant off, the main control board fails

Flicker, the main control board is under normal working
condition
ALM
Constant off, no warning for the main control board

Constant on, warning for the main control board
RUN
Constant on, the main control board is in active mode

Constant off, the main control board is in standby mode
ALM
Constant on , active/standby mode is abnormal

Constant off, active/standby mode is ok
POW1~
2/3
MST
RES
4.2.4
SD port ACT
Flicker, SD card is inserted in this port
ACT
Flicker, data processed on this port
LINK
Constant on, the link of this port has created

Constant off, this port does not has any connection with
other ports
Power Module
In considering the practical implementation, ZXR10 8900 10G MPLS switch is designed
with redundant power supply system to guarantee equipments high reliability required
by telecom. At the same time, 48V DC power supply mode and 220V AC power supply
mode are provided. In 1+1 mode, two groups of 48V DC power can be offered. And 2+1
backup of AC power supply module enhances the reliability of power supply system.
The DC power supply board of 8912/8908/8905 is as shown in Figure 12
Figure 12 8912/8908/8905 DC Power Supply Board
14
The AC power supply board of 8912/8908/8905 is as shown in Figure 13.
Figure 13 8912/8908/8905 AC Power Supply Board
DC power supply board of 8902 is as shown in Figure 14.
Figure 14 8902 DC Power Supply Board
The AC power supply board of 8902 is as shown in Figure 15
Figure 15 8902 AC Power Supply Board
4.2.5
Interface Module
The interface module of ZXR10 8900 series 10G MPLS Switches refers to the line
interface card. The existing available line cards include: GE electrical interface board,
10G Ethernet optical interface board, and protocol processing board. ZXR10 8900 series
10G MPLS Switches use swappable optical transceivers in all optical interfaces of line
cards. Therefore, one line card supports multiple transmission media and transmission
distances, and some line cards even provide different types of ports, which reduces the
number of extra line cards in many cases and minimizes users investments. In addition,
all the subscriber electrical interfaces in line cards have cable diagnostic function that
can check the connection of the connected cable and locate the short circuit or open
circuit in the cable with accuracy of one meter.
4.2.5.1
44+4 FE optical Interface Board

The 44+4 FE optical electrical interface board provides 44 FE interfaces and four GE
optical interfaces, that is, 48 Ethernet optical interfaces in total. Packets received from
the FE and GE interfaces get to PP through PHY and MAC, and they are forwarded by
15
PP according to their MAC addresses and IP addresses. If the destination port is in the
current board, PP directly forwards the packets to the port. If the destination port is not in
the current board, it forwards the packets to the uplink interface of the current board.
After being switched on the main control board, the packets are forwarded to the port on
the target board. All the operations are performed at wire speed. Additionally, the board
can add a powerful coprocessor to implement packet processing from L2 to L7 to satisfy
the complex applications in practice.
Figure 16 44+4 FE optical interface board panel
4.2.5.2
44 +4 FE electrical Interface Board

The 44+4 FE electrical interface board provides 44 FE interfaces and four GE electrical
interfaces, that is, 48 Ethernet electrical interfaces in total. The 44 FE electrical
interfaces support 10/100 auto-sensing, and the four GE electrical interfaces support
10/100/1000 auto-sensing. Packets received from the FE and GE interfaces get to PP
through PHY and MAC, and they are forwarded by PP according to their MAC
addresses and IP addresses. If the destination port is in the current board, PP directly
forwards the packets to the port. If the destination port is not in the current board, it
forwards the packets to the uplink interface of the current board. After being switched on
the main control board, the packets are forwarded to the port on the target board. All the
operations are performed at wire speed. Additionally, the board can add a powerful
coprocessor to implement packet processing from L2 to L7 to satisfy the complex
applications in practice.
Figure 17 44+4 FE electrical interface board panel
4.2.5.3
12-Port GE Electrical Interface Board

The 12-port GE electrical interface board provides 12 GE electrical interfaces, four of
which also support optical/electrical auto-sensing. Packets received from the GE
interfaces get to PP through PHY and MAC, and they are forwarded by PP according to
their MAC addresses and IP addresses. If the destination port is in the current board, PP
directly forwards the packets to the port. If the destination port is not in the current board,
it forwards the packets to the uplink interface of the current board. After being switched
on the main control board, the packets are forwarded to the port on the target board. All
the operations are performed at wire speed. Additionally, the board can add a powerful
16
Panel
Figure 18 12-port GE Electrical Interface Board Panel
Interface
All interfaces on the 12-port GE electrical interface board supports RJ45 interface,
four of which uses pluggable SFP optical transceivers and support the four common
distances of gigabit Ethernet networks, as shown in Table 5
Table 5
4.2.5.4
Specifications of the 12-port GE Electrical Interface Board
Port Type
Specifications
10/100/1000BAS
E-TX
RJ45 connector. Category-5 UTP cables

Max. transmission distance: 100m
MDI/MDIX
SX (SFP-M500)
LC connector. 50 or 62.5 125mm multi-mode fiber. Wavelength:

850nm. Max. transmission distance: 500m
Transmission power: -9.5dBm~-4dBm. Receive sensitivity: <18dBm.
LX (SFP-S10K)
LC connector. 8 or 9 125mm single-mode fiber. Wavelength:

1310nm. Max. transmission distance: 10km
Transmission power: -9.5dBm~-3dBm. Receive sensitivity: <20dBm
LH (SFP-S40K)

Transmission power: -4dBm~0dBm. Receive sensitivity: <22dBm
LH (SFP-S80K)

Transmission power: 0dBm~5dBm. Receive sensitivity: <22dBm
12-Port GE Optical Interface Board

The 12-port GE optical interface board provides 12 GE optical interfaces, four of which
also support optical/electrical auto-sensing. Packets received from the GE interfaces get
to PP through PHY and MAC, and they are forwarded by PP according to their MAC
addresses and IP addresses. If the destination port is in the current board, PP directly
forwards the packets to the port. If the destination port is not in the current board, it
forwards the packets to the uplink interface of the current board. After being switched on
the main control board, the packets are forwarded to the port on the target board. All the
operations are performed at wire speed. Additionally, the board can add a powerful
Panel
17
Figure 19 12-port GE Optical Interface Board Panel
Interface
12-port GE optical interface board uses pluggable SFP optical transceivers, with
each port supporting the four common distances of gigabit Ethernet networks, as
shown in Table 6
Table 6
4.2.5.5
Specifications of the 12-port GE Optical Interface Board
Port
Type
Specifications
SX (SFPM500)
LC connector. 50 or 62.5 125mm multi-mode fiber. Wavelength: 850nm.

Max. transmission distance: 500m.
Transmission power: -9.5dBm~-4dBm. Receive sensitivity: <-18dBm.
LX (SFPS10K)
LC connector. 8 or 9 125mm single-mode fiber. Wavelength: 1310nm.

Max. transmission distance: 10km.
Transmission power: -9.5dBm~-3dBm. Receive sensitivity: <-20dBm.
LH (SFPS40K)

Max. transmission distance: 40km
Transmission power: -4dBm~0dBm. Receive sensitivity: <-22dBm.
LH (SFPS80K)

Transmission power: 0dBm~5dBm. Receive sensitivity: <-22dBm.
10/100/1
000BASE
-TX

MDI/MDIX

The 24-port GE electrical interface board provides 24 GE electrical interfaces, four of
which are also optical/electrical self-adaptive. Packets received from the GE interfaces
get to PP through PHY and MAC, and they are forwarded by PP according to their MAC
addresses and IP addresses. If the destination port is in the existing board, PP directly
forwards the packets to the port. If the destination port is not in the existing board, it
forwards the packets to the uplink interface of the existing board. After being switched
the operations are performed at wire speed.
18
Panel
Interface
All interfaces on the 24-port GE electrical interface board supports RJ45 electrical
interfaces, four of which use pluggable SFP optical transceivers and support the
four common distances of gigabit Ethernet networks, as shown in Table 7
Table 7
Port Type
Specifications
SX (SFP-M500)
LC connector. Multi-mode fiber. Wavelength: 850nm. Max.

transmission distance: 500m
LX (SFP-S10K)
LC connector. Single-mode fiber. Wavelength: 1310nm. Max.

transmission distance: 10km
LH (SFP-S40K)

Transmission power: -4dBm~0dBm. Receive sensitivity: <22dBm.
LH (SFP-S80K)

Transmission power: 0dBm~5dBm. Receive sensitivity: <22dBm.
LH (SFP-S120K)

10/100/1000BAS
E-TX

MDI/MDIX
Indicator
There are 24 indicators on the panel of 24-port GE optical interface board. Each
user interface is corresponding to one indicator, and its features are as shown in
Table 8
19
Table 8
4.2.5.6
Specifications of the 24-port GE electrical Interface Board
Indicators
Functions
LINK/ACT
Constant on, the link of the interface has been created,

Constant off, the interface does not have any connections
with other interfaces
Flicking, data are processed over the interface

The 24-port GE optical interface board provides 24 GE optical interfaces, four of which
are also optical/electrical adaptive. Packets received from the GE interfaces get to PP
Panel
Interface
each port supporting five common distances of gigabit Ethernet networks, as shown
in Table 9 .
Table 9
20
Port Type
Specifications
SX (SFP-M500)

LX (SFP-S10K)

LH (SFP-S40K)

Port Type
Specifications
LH (SFP-S80K)

LH (SFP-S120K)

10/100/1000BAS
E-TX

Transmission power: 100m
MDI/MDIX
Indicator
user interface is corresponding to two indicators, and their features are as shown in
Table 10 .
Table 10
4.2.5.7
Functions of the Indicators on 24-port GE Optical Interface Board
Indicators
Functions
LINK

Constant off, this interface does not set up any connection with
other interfaces.
ACT
Constant off, no data are processed over this interface

Flicking, data are processed over this interface

The 48-port GE electrical interface board provides 48 GE electrical interfaces. Packets
received from the GE interfaces get to PP through PHY, and they are forwarded by PP
according to their MAC addresses and IP addresses. If the destination port is in the
existing board, PP directly forwards the packets to the port. If the destination port is not
in the existing board, it forwards the packets to the uplink interface of the existing board.
After being switched on the main control board, the packets are forwarded to the port on
the target board. All the operations are performed at wire speed.
Panel
Interface
21
48-port GE electrical interface board supports RJ45 port, and its features are as
shown in Table 11
Table 11
Port Type
Specifications
10/100/1000BAS
E-TX

MDI/MDIX
Indicator
There are 48 indicators on the panel of 48-port GE electrical interface board. Each
user interface is corresponding to one indicator, and their features are as shown in
Table 12
Table 12
4.2.5.8
Functions of the Indicators on 48-port GE Electrical Interface Board
Indicators
Functions
LINK/ACT

Constant off, this interface does not set up any connection
with other interfaces.

The 48-port GE optical interface board provides 48 10/100/1000M optical interfaces.
Packets received from the GE interfaces get to PP through PHY, and they are forwarded
by PP according to their MAC addresses and IP addresses. If the destination port is in
the existing board, PP directly forwards the packets to the port. If the destination port is
not in the existing board, it forwards the packets to the uplink interface of the existing
board. After being switched on the main control board, the packets are forwarded to the
port on the target board. All the operations are performed at wire speed.
Panel
Interface
each port supporting five common distances of gigabit Ethernet networks, as shown
in Table 13 .
22
Table 13
Port Type
Specifications
SX (SFP-M500)

LX (SFP-S10K)

transmission distance:10km
LH (SFP-S40K)
LC connector. Single-mode fiber. Wavelength:1310nm. Max.

Transmission power: -4dBm~-0dBm. Receive sensitivity: <22dBm
LH (SFP-S80K)

LH (SFP-S120K)

Transmission power: 5dBm~-9dBm. Receive sensitivity: <24dBm
Indicator
Table 14 .
Table 14
4.2.5.9
Functions of the Indicators on 48-port GE Optical Interface Board
Indicators
Functions
LINK/ACT

other interfaces.
24-Port GE Electrical Port + 2-Port 10G Optical Ethernet Interface Board

24-Port GE Electrical Port+2-Port 10G Optical Ethernet Interface Board provides 24 GE
electrical interfaces, where four of them also support optical/electrical adaptive Ethernet
interfaces. In addition, 2 10G Ethernet XFP optical interfaces are provided. Packets
received from the GE and 10GE interfaces get to PP through PHY, and they are
forwarded by PP according to their MAC addresses and IP addresses. If the destination
port is in the existing board, PP directly forwards the packets to the port. If the
destination port is not in the existing board, it forwards the packets to the uplink interface
of the existing board. After being switched on the main control board, the packets are
forwarded to the port on the target board. All the operations are performed at wire speed.
23
Panel
Figure 24 24-port GE Electrical +2-port 10G optical Ethernet Interface Board Panel
Interface
24-port GE Electrical Interface+ 2-port 10G optical Ethernet Interface Board
supports RJ45 electrical interface. And it uses 4 pluggable SFP optical transceivers
and 2 swappable XFP 10G optical interfaces , with each port supporting three
common distances of gigabit Ethernet networks, as shown in Table 15 and 0
Table 15 Specifications of the gigabit interfaces of the 24-port GE Electrical Interface+ 2-port
10G optical Ethernet Interface Board
24
Port Type
Specifications
SX (SFP-M500)

LX (SFP-S10K)

LH (SFP-S40K)

Transmission power:-4dBm~-0dBm. Receive sensitivity: <22dBm
LH (SFP-S80K)

LH (SFP-S120K)

10/100/1000BAS
E-TX

MDI/MDIX
Table 16 Specifications of the 10G interfaces of the 24-port GE Electrical Interface+ 2-port 10G
optical Ethernet Interface Board
Port Type
Specifications
SX (XFP-M300)

LR (XFP-S10K)
LC connector. Single-mode fiber. Wavelength: 1310nm.

LH (XFP-S40K)

Indicator
There are 32 indicators on the panel of 24-port GE Electrical Interface+ 2-port 10G
optical Ethernet Interface Board. Each Gigabit interface is corresponding to one
indicator, and each 10G interface is corresponding to 2 indicators. Their functions
are as shown in Table 17
Table 17
Board
4.2.5.10
Indicators on 24-port GE Electrical Interface+ 2-port 10G optical Ethernet Interface
Indicators
Functions
LINK/ACT

LINK

ACT
Off, no data is processed over this interface

24-Port GE Optical Port + 2-Port 10G Optical Ethernet Interface Board

24-Port GE Optical Port+ 2-Port 10G Optical Ethernet Interface Board provides 24 GE
electrical interfaces, where four of then also support optical/electrical adaptive Ethernet
interfaces. In addition, 2 10G Ethernet XFP optical interfaces are provided. Packets
forwarded by PP according to their MAC addresses and IP addresses. If the destination
port is in the existing board, PP directly forwards the packets to the port. If the
destination port is not in the existing board, it forwards the packets to the uplink interface
of the existing board. After being switched on the main control board, the packets are
forwarded to the port on the target board. All the operations are performed at wire speed.
Panel
25
Figure 25 24-port GE Optical interface +2-port 10G optical Ethernet Interface Board
Interface
24-port GE Optical Interface+2-port 10G optical Ethernet Interface Board supports
G and 10G optical interfaces, It can support five common distances of gigabit
Ethernet networks and three common distances of 10G Ethernet interfaces. At the
same time, 4 gigabit interfaces adopt RJ45 electrical interfaces. Their features are
as shown in Table 18 and Table 19
Table 18 Specifications of the gigabit interfaces of the 24-port GE Optical Interface+ 2-port 10G
Port Type
Specifications
SX (SFP-M500)

LX (SFP-S10K)

LH (SFP-S40K)

LH (SFP-S80K)

Transmission power:0dBm~-5dBm. Receive sensitivity: <22dBm
LH (SFP-S120K)

10/100/1000BAS
E-TX

MDI/MDIX
Table 19 Specifications of the 10G interfaces of

26
the 24-port GE Optical Interface+ 2-port 10G
Port Type
Specifications
SX (XFP-M300)

Port Type
Specifications
LR (XFP-S10K)

LH (XFP-S40K)

Indicator
There are 36 indicators on the panel of 24-port GE Optical Interface+ 2-port 10G
Optical Ethernet Interface Board. Each Gigabit interface is corresponding to one
indicator, each Gigabit RJ45 interface is corresponding to 2 indicators, and each
10G interface is corresponding to 2 indicators. Their functions are as shown in
Table 20
Table 20 Functions of the Indicators on 24-port GE Optical Interface+ 2-port 10G Optical
Ethernet Interface Board
4.2.5.11
Indicators
Functions
LINK/ACT

LINK

ACT

2-Port 10G Ethernet Optical Interface Board

The 2-port 10G Ethernet optical interface board provides two 10G Ethernet interfaces
with XFP connectors. Packets received from the 10G Ethernet interfaces get to PP
Panel
Figure 26 2-port 10G Ethernet Optical Interface Board Panel
Interface
27
The 2-port 10G Ethernet optical interface board uses a hot-swappable XFP optical
transceiver, which supports multiple transmission distance requirements, as shown
in Table 21
Table 21
Specifications of the 2-port 10G Ethernet Optical Interface Board
Port Type
Specifications
SX (XFP-M300)

LR (XFP-S10K)

LH (XFP-S40K)

Indicator
There are 4 indicators on the panel of 2-port 10G Ethernet Optical interface board.
Their functions are as shown in Table 22
Table 22
4.2.5.12
Functions of the Indicators on 2-port 10G Ethernet optical interface board
Indicators
Functions
LINK

other interfaces.
ACT


4-port 10G Ethernet optical interface board provides four 10G Ethernet interfaces with
XFP connectors. Packets received from the 10G Ethernet interfaces get to PP through
PHY and MAC, and they are forwarded by PP according to their MAC addresses and IP
addresses. If the destination port is in the existing board, PP directly forwards the
packets to the port. If the destination port is not in the existing board, it forwards the
packets to the uplink interface of the existing board. After being switched on the main
control board, the packets are forwarded to the port on the target board. All the
operations are performed at wire speed.
Panel
28
Interface
4-port 10G Ethernet optical interface board uses a hot-swappable XFP optical
in Table 23 .
Table 23
Port Type
Specifications
SX (XFP-M300)

LR (XFP-S10K)

LH (XFP-S40K)

Indicator
Each interface is corresponding to two indicators. Their functions are as shown in
Table 24
Table 24
4.2.5.13
Indicators
Functions
LINK

other interfaces.
ACT


8-port 10G Ethernet optical interface board provides two 10G Ethernet interfaces with
XFP connectors. Packets received from the 10G Ethernet interfaces get to PP through
PHY and MAC, and they are forwarded by PP according to their MAC addresses and IP
addresses. If the destination port is in the existing board, PP directly forwards the
control board, the packets are forwarded to the port on the target board. Due to the limits
of total bandwidth for initiation, this board does not support wire-speed port at this
moment.
Panel
29
Indicator
8-port 10G Ethernet optical interface board uses a hot-swappable XFP optical
in Table 25
Table 25
Port Type
Specifications
SX (XFP-M300)

LR (XFP-S10K)

LH (XFP-S40K)

Indicator
Each interface is corresponding to two indicators. Their functions are as shown in
Table 26
Table 26
4.2.5.14
Indicators
Functions
LINK

other interfaces.
ACT

24-Port GE MPLS Optical Interface Board

The 24-port GE MPLS optical interface board provides 24 GE optical interfaces. This
board support MPLS function, large table such as 512K MAC address. MPLS packets
are performed at wire speed. Packets received from the GE interfaces get to PP through
PHY and MAC, and they are forwarded by PP according to their MAC addresses, IP
addresses and MPLS label. If the destination port is in the existing board, PP directly
30
Panel
Figure 29 24-port GE mpls Optical Interface Board Panel
Interface
24-port GE MPLS optical interface board uses pluggable SFP optical transceivers,
with each port supporting many common distances of gigabit Ethernet networks.
Table 27
Specifications of the 24-port GE MPLS Optical Interface Board
Port Type
Specifications
SX (SFP-M500)

LX (SFP-S10K)

LH (SFP-S40K)

LH (SFP-S80K)

LH (SFP-S120K)

Indicator
There are 48 indicators on the panel of 24-port GE MPLS optical interface board.
Each user interface is corresponding to two indicators, and their features are as
shown.
Table 28
Functions of the Indicators on 24-port GE MPLS Optical Interface Board
Indicators
Functions
LINK/ACK

other interfaces.
31
4.2.5.15
48-Port GE MPLS Electrical Interface Board

The 48-port GE MPLS electrical interface board provides 48 GE electrical interfaces.
This board support MPLS function, large table such as 512K MAC address. Packets
received from the GE interfaces get to PP through PHY, and they are forwarded by PP
according to MAC addresses, IP addresses and MPLS label. If the destination port is in
the existing board, PP directly forwards the packets to the port. If the destination port is
not in the existing board, it forwards the packets to the uplink interface of the existing
board. After being switched on the main control board, the packets are forwarded to the
port on the target board. All the operations are performed at wire speed.
Panel
Figure 30 48-port GE MPLS Electrical Interface Board Panel
Interface
48-port GE MPLS electrical interface board supports RJ45 port, and its features are
as shown
Table 29
Specifications of the 48-port GE MPLS Electrical Interface Board
Port Type
Specifications
10/100/1000BAS
E-TX

MDI/MDIX
Indicator
There are 48 indicators on the panel of 48-port GE mpls electrical interface board.
Each user interface is corresponding to one indicator, and their features are as
shown in Table 12
Table 30
32
Functions of the Indicators on 48-port GE mpls Electrical Interface Board
Indicators
Functions
LINK/ACT

4.2.5.16
48-Port GE MPLS Optical Interface Board

The 48-port GE MPLS optical interface board provides 48 10/100/1000M optical
interfaces. This board support MPLS function, large table such as 512K MAC address.
Packets received from the GE interfaces get to PP through PHY, and they are forwarded
by PP according to their MAC addresses, IP addresses and MPLS label. If the
destination port is in the existing board, PP directly forwards the packets to the port. If
the destination port is not in the existing board, it forwards the packets to the uplink
interface of the existing board. After being switched on the main control board, the
packets are forwarded to the port on the target board. All the operations are performed
at wire speed.
Panel
Figure 31 48-port GE mpls Optical Interface Board Panel
Interface
48-port GE MPLS optical interface board uses pluggable SFP optical transceivers,
with each port supporting five common distances of gigabit Ethernet networks.
Table 31
Specifications of the 48-port GE mpls Optical Interface Board
Port Type
Specifications
SX (SFP-M500)

LX (SFP-S10K)

LH (SFP-S40K)
LC connector. Single-mode fiber. Wavelength:1310nm. Max.

LH (SFP-S80K)

LH (SFP-S120K)

33
Indicator
Table 32 .
Table 32
4.2.5.17
Functions of the Indicators on 48-port GE mpls Optical Interface Board
Indicators
Functions
LINK/ACT

other interfaces.
24-Port GE Optical Port + 2-Port 10G MPLS Optical Ethernet Interface Board
24-Port GE Optical Port+2-Port 10G MPLS Optical Ethernet Interface Board provides 24
GE electrical interfaces, where twelve of then also support optical/electrical adaptive
Ethernet interfaces. In addition, 2-10G Ethernet XFP optical interfaces are provided.
This board support MPLS function, large table such as 512K MAC address .Packets
forwarded by PP according to their MAC addresses, IP addresses and MPLS label. If
the destination port is in the existing board, PP directly forwards the packets to the port.
If the destination port is not in the existing board, it forwards the packets to the uplink
interface of the existing board. After being switched on the main control board, the
packets are forwarded to the port on the target board. All the operations are performed
at wire speed.
Panel
Figure 32 24-port GE Optical interface +2-port 10G MPLS optical Ethernet Interface Board
Interface
24-port GE Optical Interface+ 2-port 10G MPLS optical Ethernet Interface Board
supports G and 10G optical interfaces. It can support five common distances of
gigabit Ethernet networks and three common distances of 10G Ethernet interfaces.
At the same time, Twelve gigabit interfaces adopt RJ45 electrical interfaces.
34
Table 33 Specifications o the gigabit interfaces of the 24-port GE Optical Interface+ 2-port 10G
MPLS optical Ethernet Interface Board
Port Type
Specifications
SX (SFP-M500)

LX (SFP-S10K)

LH (SFP-S40K)

LH (SFP-S80K)

Transmission power:0dBm~-5dBm. Receive sensitivity: <22dBm
LH (SFP-S120K)

10/100/1000BAS
E-TX

MDI/MDIX
Table 34 Specifications o the 10G interfaces of

MPLS optical Ethernet Interface Board
the 24-port GE
Optical Interface+ 2-port 10G
Port Type
Specifications
SX (XFP-M300)

LR (XFP-S10K)

LH (XFP-S40K)

Indicator
There are 36 indicators on the panel of 24-port GE Optical Interface+ 2-port 10G
Optical Ethernet Interface Board. Each Gigabit interface is corresponding to one
indicator, each Gigabit RJ45 interface is corresponding to 2 indicators, and each
10G interface is corresponding to 2 indicators. Their functions are as shown in
Table 20
35
Table 35 Functions of the Indicators on 24-port GE Optical Interface+ 2-port 10G Optical
Ethernet Interface Board
4.2.5.18
Indicators
Functions
LINK/ACT

LINK

ACT

4-Port 10G MPLS Ethernet Optical Interface Board

4-port 10G MPLS Ethernet optical interface board provides four 10G Ethernet interfaces
with XFP connectors. This board support MPLS function, large table such as 512K MAC
address. Packets received from the 10G Ethernet interfaces get to PP through PHY and
MAC, and they are forwarded by PP according to their MAC addresses, IP addresses
and MPLS label. If the destination port is in the existing board, PP directly forwards the
control board, the packets are forwarded to the port on the target board. All the
operations are performed at wire speed.
Panel
Figure 33 4-port 10G MPLS Ethernet Optical Interface Board Panel
Interface
4-port 10G MPLS Ethernet optical interface board uses a hot-swappable XFP
optical transceiver, which supports multiple transmission distance requirements.
Table 36
36
Specifications of the 4-port 10G MPLS Ethernet Optical Interface Board
Port Type
Specifications
SX (XFP-M300)

LR (XFP-S10K)

LH (XFP-S40K)

Indicator
Each interface is corresponding to two indicators.
Table 37
4.2.5.19
Functions of the Indicators on 4-port 10G MPLS Ethernet optical interface board
Indicators
Functions
LINK

other interfaces.
ACT

24-Port GE OAM Optical Interface Board

The 24-port GE OAM optical interface board provides 24 GE optical interfaces. This
board supports Ethernet OAM, synchronization Ethernet network and clock
synchronization based on 1588 protocol.
Panel
Figure 34 24-port GE OAM Optical Interface Board Panel
Interface
24-port GE OAM optical interface board uses pluggable SFP optical transceivers,
with each port supporting many common distances of gigabit Ethernet networks.
Table 38
Specifications of the 24-port GE OAM Optical Interface Board
Port Type
Specifications
SX (SFP-M500)

LX (SFP-S10K)

37
Port Type
Specifications
LH (SFP-S40K)

LH (SFP-S80K)

LH (SFP-S120K)

Indicator
There are 48 indicators on the panel of 24-port GE OAM optical interface board.
Each user interface is corresponding to two indicators, and their features are as
shown.
Table 39
4.2.5.20
Functions of the Indicators on 24-port GE OAM Optical Interface Board
Indicators
Functions
LINK/ACK

other interfaces.
DPI (Deep Packet Inspection) board

DPI (Deep Packet Inspection) board has a console panel port. User can connect PC
serial port to the console port by cable. Data flow that comes in the switch is redirected to
DPI board via configuration, and DPI communicates with CPU of the main control board.
DPI board collect SysLog, statistical information, management information, report to the
network management or policy server. Main control board also regularly detect whether
or not the normal work of DPI board, when the DPI board does not work, the main control
board will redirect data streams to the normal forwarding port to ensure uninterrupted
operations, improve equipment reliability. DPI board can be placed in any line card slot,
and supports the load-sharing of multiple DPI board. DPI board supports the main
features include: flow classification, creating / maintenance flow tablet, the connection
state, Signature detection, policy enforcement, statistics and so on.
38
Panel
Figure 35 The Panel of DPI Service Module
Interface
DPI board supports RJ45 port, and its features are as shown in Table 40 .
Table 40
Specifications of the DPI Board
Port Type
Specifications
10/100/1000BAS
E-TX

MDI/MDIX
Indicator
There are 2 indicators on the panel of DPI board, and its features are as shown in
Table 41
Table 41
4.2.5.21
Functions of the Indicators DPI Board
Indicators
Functions
LINK

other interfaces.
ACT

Firewall board
FW (Firewall) board has a console panel port. User can connect PC serial port to the
console port by cable. Data flow that comes in the switch is redirected to FW board via
configuration, and FW communicates with CPU of the main control board. FW board
collects SysLog, statistical information, management information, and reports to the
network management or policy server. Main control board also regularly detect FW
board is working correctly, when the FW board does not work, the main control board
will redirect data stream to the normal forwarding port to ensure uninterrupted operations,
improve equipment reliability. FW board can be placed on any line card slot, and support
load-sharing of multiple FW boards. FW board can provide an external attack prevention,
anti-virus, bandwidth control, application-layer filtering capabilities to ensure network
security.
Panel
39
Figure 36 The Panel of FW board
Interface
FW board supports RJ45 port, and its features are as shown in Table 42 .
Table 42
Specifications of the FWI Board
Port Type
Specifications
10/100/1000BAS
E-TX

MDI/MDIX
Indicator
There are 2 indicators on the panel of FW board, and its features are as shown.
Table 43
Functions of the Indicators FW Board
Indicators
Functions
LINK

other interfaces.
ACT

4.3
Software Architecture
4.3.1
System software architecture

ZXR10 8900 series 10G MPLS Ethernet routing switches provide L2 switching, L3
routing, multi-service, wire speed switching, and QoS guarantee. Their system software
implements management, control and data forwarding. The basic job contains system
initiation, system configuration management, operation of protocols, maintenance of
tables, switching chip configuration and status control, as well as software forwarding for
some special packets, etc.
40
Implementing major L2 protocols, including 802.1D STP protocol, 802.1P priority

control, 802.1Q VLAN-related features, and 802.3ad link aggregation feature.
Supporting Ipv4/Ipv6 protocol stacks and back routing protocols.
Implementing multi-layer services, e.g. ACL, NAT and DHCP.
Implementing some broadband access.
Implementing Agent feature of network management protocol SNMPv3.
Users can carry out Ethernet switch network management via serial port terminal,
Telnet, SNMP Manager, including network configuration management, failure
management, performance management, and security management.
The software can be upgraded smoothly. The active and standby protocol
processor cards as well as switching network card can be online upgraded.
Network security function.
As per system functions, the system software can be divided into the following five
subsystems.
4.3.1.1
Operation Support Subsystem, including BSP, ROS, SSP and VxWorks kernel.
MUX subsystem, including data distribution module, statistics monitoring module

and drive encapsulating module. Data distribution module is responsible for the
distribution of the packets in drive and upper layer software. The statistics
monitoring module takes in charge of gathering data forwarding information and
monitoring software table.
L2 subsystem, including STP protocol, LACP protocol, IGMP SNOOPING protocol,

MAC address management, VLAN management and L2 data forwarding.
L3 subsystem, implementing basic protocols of TCP/IP protocol family, such as IP,

ARP, ICMP, TCP, UDP and completing unicast protocols, multicast protocols and
L3 data forwarding.
Network management and operation maintenance subsystem, implementing Agent

feature of SNMP network, supporting command line management, providing
interfaces for operation and maintenance, offering MIB information as well as the
interfaces for data synchronization on the line card realize the data synchronization
and configuration of service and port configuration.
Operation Support Subsystem

It is to drive and encapsulate the lower layer hardware to support the upper layer
software system. It is mainly to support the operation of the hardware by allocating
operational resources for the hardware and hardware associated interface for the upper
layer software. This subsystem provides system support, system control, version load
control, BSP and SSP via the ROS platform of ZXR10. The system support can be
further divided into management modules over the operation system kernel, process
scheduling, process communication, timer, and memory. Figure 37illustrates the
Operation Support Subsystem.
41
Figure 37 Architecture of the Operation Support Subsystem
O p e ra tio n S u p p o rt S u b s y s te m
P ro cess
c o m m u n ic a tio n
T im e r
m anagem ent
P ro cess
s c h e d u lin g
M e m o ry
m anagem ent
S y ste m c o n tro l
V e rs io n lo a d
S y ste m s u p p o rt
V x W o rk s s y s te m k e rn e l
BSP
SSP
H ard w are
4.3.1.2
MUX Subsystem
The MUX Subsystem implements the exchange between the driver and upper layer
software, and monitors and surveys the switchover chip and the software table of the
micro-code. This subsystem is to distribute, monitor and survey the data. Once the MUX
layer receives packets from the driver module, it distributes the packets by their types
according to the ETHER TYPES field in the MAC frame. The distribution also
encapsulates the delivery function of the driver for the upper layer modules to invoke.
When the upper layer modules send packets or protocol packets, they need to invoke
the delivery function of the MUX. The monitor and statistical function is to provide
statistics on the status of the drive layer, physical layer and the MUX layer, to monitor
the access to the register and sniff of packets, and to provide interface functions for the
OAM modules.
4.3.1.3
L2 Subsystem
It is to implement configuration management for the link layer (management layer), L2
protocol process (control layer), and data forwarding (data layer or the service layer).
The functional modules are illustrated as follows:
42
Figure 38 Architecture of the L2 Subsystem
L2 Protocol Module
L2
Management Module
STP
LACP
GVRP
IGMP
Snooping
Port
Parameters
MAC
VLAN
Port Mirror
L2 Software Forwarding L2 Hardware Forwarding

L2 Switch
Module
4.3.1.4
L3 Subsystem
Based on its software layers, this subsystem can be categorized into service control
layer and data forwarding layer. The service control layer contains the TCP/IP protocol
stack and IP forwarding support subsystem. The TCP/IP protocol stack consists of the
support protocol and the routing protocol. The support protocol implements the basic
protocols in the Ipv4 protocol family, provides services for the dynamic routing protocols,
and acts as the carrier of the network management and system supervision. As the
service provider of the upper layer application entities of the routing system, it is made
up of IP, ARP, ICMP, IGMP, TCP, UDP and Telnet protocol entities. The routing protocol
is to produce dynamic routes for unicast protocols like RIP, OSPF or BGP, and multicast
protocols like IGMP, PIM-SM, MSDP or MBGP. The routing protocol also contains LDP,
VRRP, and RSVP related upper layer protocols. The IP forwarding support subsystem
functions to add, delete, modify the forwarding table and associated policies, to create
and maintain indices, to propagate and synchronize the forwarding table, and to
exchange data between the CPU and the switch chip. The IP forwarding layer is to input,
forward and output the data in accordance with the policies, clauses and the routing
table produced at the IP service control layer.
43
Figure 39 Architecture of the L3 Subsystem

VPN Management
MPLS System
System
ACL, NAT, QoS,
Multicast System
Unicast System
VRRP
Routing Policies
IP Service Control Layer
Clauses
Policy Table
Output process
process
Forward
4.3.1.5
Input process
IP Data Forwarding Layer
Forwarding Table
Network Management and O&M Subsystem

The foreground NM and O&M subsystem is to implement SNMP agent via TCP/IP,
to implement management via the executor of lower layer supervised entities.
background NMS communicates with the foreground NMS via the network,
manages the foreground system to isolate the management network and
transmission network.
4.3.2
Architecture of Layers and module description
4.3.2.1
Link Layer Protocol Software
and
The
and
the
Ethernet-II, IEEE802.2, IEEE802.3, and IEEE802.1Q are supported over the Ethernet
interfaces.
4.3.2.2
Network Layer Protocol Software

The network layer protocol supports only the IP protocols, excluding L3 protocols such
as IPX, AppleTalk.
4.3.2.3
Upper Layer Protocol Software

The L3 protocols function to:
44
Support TCP an UDP.
Support RIPv1/v2, OSPF, IS-IS and BGP unicast routing protocols.
4.3.2.4
Support IGMP, DVMRP, PIM-SM, PIM-DM and MSDP multicast routing protocols.
Support NAT, TELNET, FTP and TFTP application protocols.
Support VPN applications: MPLS VPN and MPLS-TE.
Functional Module
As Figure 40 shows, to implement protocols of layers previously mentioned, the software
architecture is divided as per functional modules.
Figure 40 ZXR10 8900 software architecture
4.3.3
ROS
The operating system ROS is a single-processor, multi-task, real-time operating system.
It is the core for software architecture of the routing switch. It is responsible to manage
the hardware architecture of the entire routing switch, providing a uniform operation
platform for the applications of the software system. Based on the VxWorks kernel,
single-processor based process scheduling, process synchronization, memory
45
management, and timing management shall be implemented. Kernel functions such as

communications between processes of the same CPU and between processes of multiprocessor shall also be provided for reliable, efficient and stable services for the upper
layer.
4.3.4
SSP Switching Subsystem

The SSP switching subsystem works for the Ethernet exchange chips in the system. It is
to complete hardware initialization and configuration, collection of status and statistics,
and packet exchange between the CPU and the exchange chip. Its functions are as
follows:
Lower layer I/O operations, including direct and indirect read & write to the registry
and the memory
Initialization
DMA operations, packet exchange between the CPU and the exchange chip
Port operation, including port configuration, port mirror, port trunk, port rate shaping,
BC/MC/DLF rate restriction and port block.
VLAN operations, including the addition, deletion and update of VLANs
L2 MAC table operations, including the addition, deletion, update and aging of the
MAC table
L3 Routing operations, including the setting and deletion of the precise matching
forwarding table, and the addition and deletion of the longest prefix matching table
ACL configuration to help to implement QoS
COS and DSCP to help to implement QoS
Spanning tree configuration
LED Operations
MIB statistics
The forwarding core of the Ethernet routing switch is Ethernet ASIC chip, through which
the Layers 2 and 3 services, ACL and QoS functions of ZXR10 8900 series switches are
all implemented after the right configurations. The SSP switching subsystem ensures
accurate and sensible forwarding by configuring the chip attributes in the right way,
which is key to the software of ZXR10 8900 series switches.
46
4.3.5
Coprocessor Software Subsystem

In ZXR10 8900 series switches, packets are forwarded at two places: either over the
ASIC chip or over the coprocessor.
The coprocessor system is used to process at wire speed some complicacies that are
beyond the power of the packet processor, such as NAT, context exchange, and
broadband access control.
The micro-code exchange subsystem is designed to adhere to the high efficiencies of
ZTE products. It abstracts and integrates the potential service features with the
philosophy of hierarchical model to provide a forwarding system compatible with various
services and is easily expanded, and to thoroughly shake off the implementation mode
that requires special processing constantly. In this way, the forwarding system can
forward services more efficiently while reducing unnecessary redundant codes. This
makes a good foundation for the expansion and maintenance.
4.3.6
Software Forwarding Support Subsystem

It is a bridge to switch all forwarding tables, clause tables and policy tables as required
by the SSP or NP. It is also responsible to add, delete and update. This subsystem also
processes the data that are beyond the capability of the Ethernet packet processor or
the coprocessor, such as IP packets with options, errors on the IP header. In multicast
forwarding, the IP forwarding support module is responsible to collect the multicast
forwarding data of the link card for the multicast routing protocol to process.
In the NAT service, this subsystem should also maintain the address translation table. In
addition, for the packet with the IP address that can not be handled by some network
processor, the IP forwarding support module should also translate the address.
In broadband access applications, the subsystem is responsible for the authentication,
examination, management and accounting, as well as the maintenance of the access
control information on the Ethernet ASIC chip users or network processor users.
4.3.7
L2 Management and Protocol Subsystem
4.3.7.1
MAC Address Management Module

In ZXR10 8900 series switches, all forwarding tables are closely related to the MAC
address, therefore, the MAC management module is the most basic yet the most
important functional module for the Ethernet switch by maintaining MAC address
learning and synchronization. The module can also perform the following management:
MAC address binding: Bind a specific MAC address to the port of the switch. The
binding disables further dynamic address learning of the MAC address to limit the
physical location of the user and to protect important MAC addresses.
MAC address filter: The switch will discard the packet with its destination or source
MAC address a given MAC address to filter out some unwelcome users.
47
4.3.7.2
MAC address number limit: Restrict the number of the MAC addresses of some
ports to control the number of users. It is also for protection to prevent thorough
resource consumption when the ports have suffered from DOS attacks.
MAC address freezing: In a stable network, freeze some important physical ports,
such as the address of the uplink port, to prevent network interruption by
counterfeiting MAC addresses.
Multiple MAC address perspectives: Provide statistics from a number of

perspectives to show the VLAN table dynamically or statically, such as the VLAN
and the port, for network diagnosis or network stability maintenance.
Basic VLAN Module

VLAN protocol is a basic protocol for L2 switching equipment. It enables the network
administrator to partition one physical LAN into several virtual LANs. Each VLAN has a
VLAN ID to uniquely identify a VLAN. These VLANs share the switching equipment and
links of the physical LAN.
Each VLAN appears as an independent LAN logically. All frame stream of one VLAN is
restricted within the VLAN. The inter-VLAN access can only be implemented via L3
forwarding, instead of direct access. In this way, the network performance is greatly
improved and the overall steam is effectively reduced in the physical LAN.
VLANs functions to reduce the broadcast storm over the network, hence strengthening
network security and centralized control
8900 series switches support 802.1Q VLAN. For the untagged packet, the system will
tag the packet based on the subnet, protocol or port for rich VLAN feature support.
In the 802.1Q VLAN, a VLAN is expressed with 12 bit number. This restricts the number
of VLANs within 4096, thus, some actual applications. 89 series switches make some
expansion in 4 ways. Three of them are QinQ, PVLAN and VLAN translation, and the
other is L3 related Super VLAN.
4.3.7.3
QinQ Module
QinQ, multi-layer VLAN tag stacking, is an intuitional name for the tunnel protocol
encapsulated with 802.1 Q. The core idea is to encapsulate the VLAN tag of the private
network to the public VLAN tag. The packet traverses the backbone network with dual
tags, thus providing a simpler L2 VPN tunnel for users. The QinQ protocol is simple and
easy to manage. It needs no support of the protocol packet. A static configuration settles
all, therefore, it is especially useful for the convergence layer switches. They can
effectively extend the number of VLANs in the MAN with the support of the QinQ
technology.
Now the IEEE is focusing on the specifications for the VLAN stacking, 802.1ad-Provider
Bridge. The external VLAN is defined as Service VLAN - SVLAN. These are still at the
draft stage.
48
The QinQ functional module in the 89 series software system just configures QinQ
statically before configuring the chip. There are two types of VLANs in the context of
QinQ:
SVLAN (Service VLAN): VLANs defined over the backbone network.
CVLAN (Customers VLAN): User-defined VLANs.
The software QinQ functional module provides an attribute in the VLAN table to identify
this VLAN a SVLAN or CVLAN. The associated QinQ function for the chip can be set
through the lower layer driving interface function.
4.3.7.4
PVLAN Module
When all servers are in the same subnet, and they can only communicate with their
default gateways, this new VLAN feature is of private VLAN. In the context of private
VLAN, the switch port can be isolated port, Community port or Promiscuous port. Each
of them corresponds to a VLAN type: The Isolated port is subject to the Isolated PVLAN,
and the Community port to Community PVLAN. The Primary VLAN represents a Private
VLAN. The Isolated and the Community VLANs can be bind together, so can the
Promiscuous port. In an Isolated PVLAN, the isolated port can only communicate with
the Promiscuous port with no exchange of stream. In a Community PVLAN, the
Community port can either communicate or exchange steams with the Promiscuous port.
The Promiscuous port can be connected to the router or L3 switch. It can forward its
received traffic stream to either isolated port or the Community port.
The application of PVLAN is effective to ensure the security of the communication of the
access network. Users only need to attach to their default gateways. A single PVLAN
provides secure connections as the L2 does with no multiple VLANs and IP subnets. All
users are accessed to the PVLAN to connect to the default gateway with no access to
any other user within the PVLAN. The PVLAN ensures no communication between ports
of the same VLAN, but is capable of trunk port penetration. In this way, users within the
same VLAN will not affected by the broadcast.
The PVLAN does not need the support of the protocol packet.
4.3.7.5
VLAN Translation Module

VLAN translation is a functional extension of the VLAN. If a port of the switch enables
VLAN translation, the packets flowing through this port should be tagged packet. VLAN
translation searches in the MAC VLAN table with the port number plus VID of the
tagged packet as the index to get a new VID. Then the data stream is switched within
the new VLAN. Hence, the translation from one VLAN to another is implemented.
VLAN translation itself needs no support of the protocol packet. It can be implemented
through static configuration on ZXR10 8900 series switches. Note that the VLAN cannot
be partitioned on the MAC address basis one VLAN translation is enabled, and vice
versa.
49
4.3.7.6
Super VLAN Module

The Super VLAN can locate the hosts attached to same physical equipment but subject
to different virtual broadcast domains in the Ipv4 subnet with the same default gateway.
In a large-scale switching LAN, this mechanism has many advantages compared with
the traditional Ipv4 addressing system. Most of all, it still adopts the address space
utilization of the Ipv4 system.
The Super VLAN enables re-partition of the VLAN with the concepts of Super VLAN and
sub-virtual network. One or multiple sub-virtual networks can belong to one Super VLAN
with the default gateway IP address of the Super VLAN.
Super VLAN is purely software function. It is transparent to the ASIC chip and data are
switched according to the VLAN configuration in the software module. The PVLAN does
not need the support of the protocol packet. Static configuration on the ZXR10 8900
series switches settles all.
4.3.7.7
Spanning Tree Protocol (STP) Functional Module

STP is to detect loops between L2 switching functional units and remove them as well
as provide a redundancy link to improve the performance and reliability of LANs.
The STP module provides the following two functions of
Preventing the broadcast storm of LAN caused by the network loop, and providing a
backup redundancy path.
Detecting the change of the topology structure and configuring a new spanning tree
topology according to this change.
The STP algorithm executed on the switch in a subnet will help to form a dynamic
topology of a spanning tree, which can ensure that no loop exists between any two
workstations within an LAN to prevent the broadcast storm from occurring. This
algorithm can monitor the change of the topology structure and help to establish a new
spanning tree according to its change. It can offer the switch a certain error tolerance
capability to reconfigure the topology structure of the spanning tree. Then the switch will
monitor and update the MAC route table according to the status of the dynamic topology
structure of the spanning tree to finally implement the routing on the MAC layer.
The purpose of spanning tree algorithm is to let the switch dynamically find a loop-free
subset (tree) with the topological structure and ensure an adequate connectivity. In this
way, if two LANs have the physical connection, the corresponding spanning tree path is
generated. Every line patterns including nodes or connecting nodes has one spanning
tree, which guarantees the destination connectivity and that no cycling is generated.
Therefore, the spanning tree algorithm and protocol can prevent the network cycling
issues occurring in any dynamic topology structure and remove the loop between two
working stations.
The multiple spanning tree protocol (MSTP) defined by IEEE802.1s is compatible with
the RSTP protocol defined in IEEE802.1w and the common STP protocol defined in
IEEE802.1D, therefore only the multiple spanning tree protocol (MSTP) needs to be
implemented by the STP software module. The RSTP or STP can be enabled forcibly
when enabling the MSTP protocol, so the combination using of STP and RSTP can be
50
supported. The functions of enabling STP on the aggregation link and on the port are
supported.
The ZXR10 8900 series support STP, RSTP, MSTP as well as the hybrid networking of
these three.
4.3.7.8
Link Aggregation Module

Link aggregation means that physical links with the same transmission media and
transmission rate are bound together, making them look like one link logically. The link
aggregation allows parallel physical links between the switches or between the switch
and the server to increase the bandwidth in multiples and simultaneously. So, this
technology is quite important in increasing link bandwidth and creating transmission
elasticity and redundancy. The link aggregation technology can be used to create a
connection of multi-gigabit in the Gigabit Ethernet network and to create a logical link
with a higher transmission rate in the fast Ethernet network. The link aggregation
technology serves a good protection purpose. If some links in a group of aggregation
link are faulty, the communication on them will be switched to the normal link rapidly.
ZXR10 8900 series switches implement the link aggregation protocol (LACP) defined in
IEEE802.3ad and support the link aggregation on the ports of the fast Ethernet network
and 10G Ethernet network and 10G port as well as the inter-board link aggregation.
4.3.7.9
Port Mirroring Module

The port mirroring function enables the traffic on one port to be copied to another port so
that the network administrator can perform a real-time flow analysis for diagnosing
network faults. This is a means for the network administrator for monitoring the network.
Every port of the ZXR10 89 series can be configured as a mirroring port. And it supports
the mirroring between ports of different rates and from multiple ports to a mirroring port,
cross-line card port mirroring as well as simultaneous mirroring of multiple mirroring
groups.
4.3.7.10
IGMP Snooping Module

IGMP Snooping is to maintain the corresponding relationship between the multicast
addresses and VLANs by snooping the IGMP packet communicated between users and
routers. It maps the members in one multicast group in one VLAN and forwarded the
received data packet only to the VALN corresponded to this multicast group. Same as
IGMP, IGMP Snooping is also used to manage and control the multicast group. And
both of them use the IGMP packet. Their difference is that IGMP runs on the network
layer while IGMP Snooping runs on the link layer. When the switch receives the IGMP
packet, IGMP Snooping will analyze the information carried in the IGMP packet and
establish and maintain the MAC multicast address table on L2.
If ZXR108900 series switches have enabled IGMP Snooping, the multicast packets will
be multicast on layer 2, while if ZXR10 89 series has not enabled IGMP Snooping, the
multicast packets will be broadcasted on layer 2.
51
4.3.7.11
802.1X Module
802.1X, a Client/Server-based access control and authentication protocol, authorizes
users to access the system services via this port by giving them authentication so that
the unauthorized data transmission between users and services provided by the system
are inhibited. With the 802.1X access control, only the EAPOL frame is firstly allowed to
pass the port, and other data can pass this port only after being authenticated.
With 802.1X, of the access nodes of the authenticator system to LAN, two logical ports
are generated: controlled port and uncontrolled port. The uncontrolled port can
exchange PDU with other systems freely no matter whether the port is authorized or not,
while the controlled port exchanges PDU with other systems only when the port is
authorized. PAE is the entity of algorithm and protocol related to the authentication
mechanism. PAE of the requester is responsible for giving response to the request from
the PAE of the authenticator by providing the authentication messages. PAE of the
authenticator is to communicate with that of the requester and submit the messages
received from the PAE of the requester to the authentication server. Then the
authentication server will verify these messages to determine whether authorize the
requester to access the authenticator. PAE of the authenticator controls the port
authorization according to the authentication result. PAE of the authenticator exchanges
its EAPOL protocol with that of the requester via the uncontrolled port and
communicates with the RADIUS authentication server with EAPOR.
This 802.1X module functions to:
4.3.7.12
Supporting the functions of the authenticator.
Supporting local authentication mode.
Supporting the PAE of the authenticator to exchange protocols with that of the
requester via an uncontrolled port.
Supporting the operation to the controlled port with the AuthControlledPortControl

parameters ForceUnauthorized, Auto and ForceAuthorized.
Supporting the operation to the controlled port with the parameters of

AdminControlledDirections and OperControlledDirextions.
Supporting the periodical reauthentication to the requester with the reauthentication

timer.
Supporting the transparent transmission of the 802.1x authentication packets when

the authentication is disabled.
ZESR Module
Basic Principles
ZESR is Ethernet ring technology based on EAPS (RFC3619) protocol. ZESR
allows network administrator to create Ethernet rings in a way similar to FDDI (Fiber
Distributed Data Interface) or SONET/SDH rings. ZESR can recover from any link
52
or node faults in less than 50 milliseconds. The specific recovery time is related to
the nodes number on the ring.
Working Mechanism
ZESR uses three mechanisms of link-down alarm, ring detection and ring recovery
to maintain the protocol.
Link-down alarm: when slave equipment on ZESR ring detects a cable-class

fault from itself to master or slave port, it will immediately send a link-down
alarm frame from the other port to the master equipment. When the master
equipment receives the alarm frame, it knows there is something wrong on the
ring. It will un-block its slave port, refresh L2 forwarding table (L2 table
hereinafter), and send an announcement frame to other equipments on the ring
asking them to refresh their own L2 tables.
Figure 41 ZESR link down alarm
Ring detection: in normal conditions, the master equipment sends diagnosis

frames from master port in regular periods. If the ring is in good condition and
works well, the slave port of master equipment will receive diagnosis frames
regularly, and reset its timeout timer at the slave port to continue its work. If the
slave port of the master equipment hasnt received any diagnosis frames until
the timeout timer has due, the master equipment will determine there is
mistake on the ring. It un-blocks its slave port to assure the connectivity of the
ring. Meanwhile, the master equipment will refresh its L2 table, and send an
announcement frame to the other equipments on the ring asking them to
refresh their own L2 tables. Ring detection mechanism is a backup solution for
link down alarm mechanism. Once link down alarm frames are lost for
unknown reasons, the solution can provide reliable backup support.
53
4.3.7.13
Ring recovery: when there is link-down on the ring, the master equipment still
send diagnosis regularly from master port, but the slave port cant receive them.
After the recovery, the next diagnosis frame will be received by the slave port
of the master equipment, who will know the ring has been fully recovered. Thus
the master equipment will again set its slave port as blocking state, refresh its
L2 table, and send an announcement frame asking the slave equipments to
refresh their own L2 tables. However, since diagnosis frames are only sent in a
regular period, the master equipment wont receive them immediately when
slave equipments detect its recovery. Therefore, unless certain measures are
taken, this will cause the slave port of master equipment to be in non-blocking
state for a period, which will leads to temporary loop in topology, which may
cause broadcast storm. To avoid this, the slave equipment will immediately
configure its port as blocking state upon the moment of its recovery. Hereafter
when the slave equipment receives the announcement frame sent by master
equipment asking it to refresh its L2 table, it knows the master equipment has
already blocked its slave port. Then the slave equipment refreshes its L2 table
and un-blocks its recovered port. Till now, the ring comes back to its normal
working state.
PBT Module
Basic Working Mechanism of PBT

The existing Ethernet forwarding is implemented based upon 48bit MAC address
and 12bit VID. VID is used to mark link-independent broadcast domain, thus if MAC
address forwarding table is in link-independent mode, VID can be used for
distinction. In this way, PBT makes some VID corresponding to MAC address, so
that MAC+VID can be used as the only mark to distinguish different paths. This
mark for configuring forwarding table takes the place of traditional
broadcast/learning forwarding mechanism, thus, all the limitations related to STP
disappear. In this way, all the forwarding tables will not be created by switches, but
be controlled by service provided, therefore, link performance can be controlled.
The independent user and carrier layers introduced by PBT enables carriers to
operate forwarding panel and control panel including traffic engineer, performance
detection, OAM, network management features of carrier network. In carrier
network, it enhances network scalability and security by terminating MAC learning
service and STP of PBT. Static tunnel is configured to reduce the complicity of
operation and maintenance in controlling signaling. As Figure 42 shows.
Figure 42 PBT message format and service implementation
54
As edge equipment in carriers network, BEB1(Backbone Edge Bridge) and BEB2

link users network. B-VID 76 and 77 are used to mark two tunnels. Here, B-VID is
only used for choosing tunnel forwarding path, and B-DA+B-VID is used to create
link-orientated tunnel. Via different B-VID or B-DA, one or more than one standby
tunnel can be set to enhance network reliability.
Scalability
The impendent user and carrier networks introduced by PBT eliminate the
restriction of the range of traditional 4096 VLAN. Carriers backbone network can be
as large as 16M. All the services are transferred through tunnel safely, and
forwarded based upon destination address via B-DA+B-VID 60bit addressing.
Therefore, endless tunnel can be provided.
PBT encapsulate user frame at the edge of network. User message and address at
the backbone side are transparent. At the same time, as user does not know carrier
backbone MAC address, pseudo wire is used at network edge for encapsulation
mapping. PBT solves the security and extension problem of traditional Ethernet.
Reliability and OAM Inspection

PBT allows carriers to configure end-to-end Ethernet connection and standby tunnel
in the network to enhance reliability and elasticity. CE requires OAM with the same
capability of SONET/SDH, as well as IEEE802.1ag, 802.3ah and ITU Y.1731
standard. OAM will be shifted to data link layer and user service layer to ensure
time for PBT fault inspection and recovery can be less than 50ms. As shown in
Figure 43.
Figure 43 PBT CFM OAM link inspection and protection
For the protection based upon PBT one-way tunnel inspection, BEB1 sends
CCM message in Master Trunk on a regular basis.
When the link is found broken down, (CCM message lost or received
RDI(Remote Defect Indication)), the service will be switched over to the
standby link, for example, on inspecting fault when BEB2 receiving CCM
55
message (three inspective message lost in sequence), Slave Trunk will be

used to send RDI message, and services are switched over to the standby link.
BEB1 receives RDI message, and switches to the standby link.
QoS Guarantee
PBT supports hardware-based QoS. Many QoS services including flow
classification, speed limitation, speed shaping, congestion control, queue
scheduling, and 2R3C services can still be deployed via PBT technology. Map
service classification, speed limitation and priority required by user on PBT
UNI(User-Network-Interface). I-TAG and B-TAG 802.1P are used to mark the
priorities of the services. Make PCP(Priority Code Point)according to 802.1ad,
802.1P and 802.1ah I-TAG. Use DE (Drop Eligible) of 802.1p to classify services.
For instance, 5P3D classifies users into 5 levels, 3 types of Des are used to mark
one-level yellow and red services. As Figure 44 shows:
Figure 44 PBT QoS service priority mapping
OAM on the control platform encapsulated as forwarding-layer message has the

highest priority. Other service levels are: EF, AF and BF. Each level of service has
different priorities for dropping (marked in green, yellow, and red). After coloring
up the services at network edge, messages can be transferred either with priority
marks or with the colors based upon PHB to accurately control users bandwidth
and service quality in backbone network.
4.3.8
IP Supporting Protocol Subsystem

The IP supporting protocol subsystem includes the following modules:
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IP basic protocol module

This function of module includes IP/ICMP/ARP protocol processing and the routing
table management.
The functions of IP protocol processing includes: IP data packets transmitting on the
network layer, error control, IP options provision, TOS, fragment reassembly and
security service. The IP module can support local delivery and route forwarding of
the IP packets to implement encapsulation and distribution of the upper layer
protocols.
The ARP protocol is for the conversion between the IP address and the MAC
address. The ARP packet is directly encapsulated with the link frame and it is tightly
combined with IP. The MAC addresses corresponding to the IP addresses can be
obtained through the ARP packet mechanism.
The ICMP protocol is responsible for controlling information or forwarding the faulty
information. Encapsulated with an IP packet and tightly combined with the IP layer,
the ICMP packet is a necessary part to be implemented by IP. The functions of this
protocol includes: receive the ICMP error packets and submit them to an
appropriate network layer for handling, give response to the ICMP request packet ,
make an ICMP packet and send it upon the request of the IP layer or the
transmission layer.
IP routing table management includes maintaining the routing table maintenance,
providing the operation interfaces for generating, update and deletion of the routing
table and for route checking on the IP layer.
TCP protocol processing module

The TCP processing module processes the TCP data packets from the IP module
and sends the protocol data packets such as TELNET and BGP to the
corresponding processing modules.
UDP processing module

The UDP processing module processes the UDP data packets from the IP module
and sends data packets such as RIP, SNMP and DHCP in it to the corresponding
processing module.
VRRP
By offering a set of detection and election mechanism, the VRRP fulfills the route
backup function during a multi-access LAN. It mainly backs up the gateway
equipment in the LAN to maintain the network systems continuous service of the
access hosts. In other words, it backs ups the next hop equipment of the access
hosts. The simple detection and election mechanism provided by VRRP enables a
rapid backup switchover in case of equipment fault in 3~5 seconds, which can meet
the requirements of service continuity and has no special requirements for the
access host.
Due to the limitation of the VRRP working mechanism, all cooperating equipments
in one VRRP backup group must be in the same VLAN that does not need to span
a network bridge. Similarly, in the common VLAN networking, the equipments in a
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backup group must be in the same VLAN but multiple VRRP backup groups can
exist in one VLAN.
4.3.9
Unicast Routing Subsystem

As the origin of the unicast routing forwarding table of the ZXR10 89 series, the unicast
routing protocol subsystem forms an IP unicast routing table through the information
interaction with other routers in the system and collecting the network topology
information. Then it notifies the routing table information to the IP forwarding layer for the
ZXR10 89 series to forward the unicast IP packet.
The unicast routing subsystem is internally composed of the following modules, as
shown in Figure 45.
Figure 45 Block Diagram of the Unicast Routing Protocol Subsystem
OSPFmodule
BGPmodule
RIPmodule
IS-ISmodule
Unicast protocol interactive module
4.3.9.1
RIP
RIP protocol is implemented based on the vector distance routing algorithm of the local
network. The RIP protocol exchanges RIP routing information through UDP packets,
which contain the protocol packets to send. The routing information in the RIP packets
includes the number of the routers on the route (the number of hops). The routers
determine the route to each destination network according to the number of hops. As
stipulated by the RFC, the count of hops should be no more than 16. Therefore, the RIP
is suitable to be used as the internal gateway of a small Autonomous System (AS).
RIP protocol of the ZXR10 8900 series switches performs the following functions:
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Sends/receives RIP packets according to the protocol, checks the correctness of

the packets and performs some authentication
Supports RIPV1/V2 and supports plain text authentication and MD5 authentication,
Supports reallocation of routes
Creates route loops and expedites route convergence, and updates the technology
with horizontal splitting and triggering
Supports protocol DEBUG
4.3.9.2
OSPF Protocol
As an internal gateway protocol (IGP) developed by IFTF, the OSPF is based on the link
status and the Shortest Path First (SPF) algorithm. The OSPF can converge the routing
table in a very short period, and avoid loops, a capability extremely important for mesh
networks or LANs connected with multiple bridges. In every device that runs OSPF, a
unified database is maintained to describe the topology of the autonomous system. This
database is composed of the local status information of each device, for example,
available interface and neighbor of the device, status of the network connected with the
device, and external route connected with the autonomous system. The OSPF uses the
link status algorithm to calculate the shortest paths from each area to all the destinations.
When one device first starts to work or any route changes, this device helps the device
that runs OSPF to disperse the LSAs to all the devices in the area of the same level.
These LSAs contain the link status of this equipment and its association information with
its neighbors. The information collected from these LSA forms the link status database.
In this area, each of all the devices has a particular database to describe the topology of
the area.
The OSPF protocol of the ZXR10 8900 perform the following functions:
Making a hierarchical network topology that is suitable for large interconnection

networks
Using the Dijiksra algorithm in route calculation so that the system can follow the
network topology change automatically and rapidly
Supporting the display and configuration commands from the primary console,
supports the commands, display and MIB variables related to SNMP
Supporting authentication of routing protocol packets including simple password

authentication and MD5 authentication to prevent the routing protocol packets from
being tampered
Using retransmission and confirmation mechanism to guarantee the reliability in link

status synchronization
Supporting multiple different distance measurement plans, for example, physical

distance, delay, throughput, etc.
Supporting STUB AREA, NSSA
Supporting domain edge and AS edge routers
Supporting classless routes and route aggregation
Controlling
mapping
route re-allocation and route filtering through Route Map route
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4.3.9.3
IS-IS Protocol
The Intermediate System-to-Intermediate System (IS-IS) routing protocol is an
expression of the OSI model of the router, and it is used for IP networks based on
TCP/IP. The IS-IS is easy to expand, and it is mainly IPv6. The IS-IS system consists of
two layers: Backbone layer (L2) and area layer (L1). One router can only belong to one
area. The Ll router only knows the topology in its area, and all the traffics bound for
other areas are sent to the nearest L2 router. The L2 routers must form a backbone,
similar to the backbone area o of OSPF.
The IS-IS protocol of the ZXR10 8900 have the following characteristics:
4.3.9.4
Supporting address aggregation on L1 and L2
Supporting L1/L2 hierarchical routing method and supports ATT flags
Supporting three area addresses and smooth area address migration
Supporting balancing the load for the same destination
Supporting plain text authentication of interfaces and areas
BGP Protocol
The BGP is an external gateway protocol. Its basic function is to exchange loop-less
routing information between autonomous systems. The information exchanged by the
BGP carries a great variety of attributes which can be used to construct the topology of
the autonomous system and to implement AS based routing strategy. Its path reachability information with the AS serial No. can be used to eliminate route loop. As a
collection of routers and terminal sites, the ASs are under the same management and
control domain and are deemed as single entities and they control the expansion of the
routing table by classless inter-domain route selection of the BGP. The BGP-4 also
introduces a mechanism to support route aggregation, including the aggregation of the
AS paths. The BGP is designed to provide a structured view of the Internet through AS.
By dividing the Internet into multiple ASs, a large network is created with many smaller
but more easily manageable networks. In these smaller networks known as ASs, their
own rules and management strategies can be used.
The BGP protocol of the ZXR10 8900 have the following features:
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Suitable for use in large networks, usually backbone networks
Supporting
Supporting EBGP multi-hop technology
Supporting group attributes and router reflectors
Supporting AS confederation and turbulence suppression
Supporting MP-BGP
EBGP and IBGP
4.3.10
Supporting MD5 authentication and route filtering
Supporting reallocation of routes
Multicast Routing Subsystem

The IP multicast routing technology enables the high-speed point-to-multi-point data
transmission in the IP network. As it can efficiently save the network bandwidth and
decrease the network load, this technology is widely used in terms of resource search,
multi-media conference, data copy, real-time data transmission, game and simulation.
The multicast routing protocol can be divided into the intra-domain protocol and the
inter-domain protocol. The inter-domain protocols include MBGP and MSDP, while the
intra-domain protocols include PIM-SM, PIM-DM and DVMRP. The intra-domain
protocols falls into two categories: multicast routing protocol in sparse mode such as
PIM-SM and the multicast routing protocol in dense mode such as PIM-DM and DVMRP.
Currently PIM-SM is put into the most use.
PIM-SM distributes the multicast data packet by constructing a rendezvous point tree to
through the mechanism of joining displayed by the signal sink of the multicast. The
signal sink can be switched to the shortest path tree if some conditions are met.
Although PIM-SM checks RPF with the unicast routing table, it is irrelevant with the
unicast routing protocol. PIM-SM is more suitable for the multicast network where there
are latent multicast group members at the end of the WAN link. In addition, it allows
using SPT, reducing the network delay caused by the rendezvous point tree use and
improving efficiency. So PIM-SM is a best choice of the multicast routing protocols in the
multicast network.
Operating above TCP, the multicast source discovery protocol (MSDP) provides to PIMSM the information on the multicast source out of the PIM domain. With MSDP, RPs in
every PIM-SM domain can share the information on the activity source. Every RP is
knowledgeable of the receivers in its local domain. Upon receiving the activity source
information, RP in the remote domain will transmit this information to these receivers.
Thus, the multicast data packet can be forwarded between domains.
By fully supporting PIM-SM and MSDP, the ZXR10 8900 series switches can provide a
complete multicast solution.
4.3.11
MPLS Protocol Subsystem
4.3.11.1
Basic Principle of MPLS

As a multi-layer switching technology, MPLS integrates layer-2 switching technology and
layer-3 routing technology, and employs labels for converging and forwarding
information. Running under the route hierarchy, it supports multiple upper-layer
protocols and can be implemented on multiple physical platforms.
Label switching can be visually explained with the zip code of a letter. In a certain mode,
the zip code encodes the destination address of a letter and some special requirements
(such as QoS, CoS and management information), and helps to handle the letter more
rapidly and efficiently, thus speeding up the routing process for the letter to arrive at the
destination. The basic idea of label switching is label distribution, that is, bind the label
and the network layer route.
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The basic routing mode of MPLS is hop-by-hop routing, allowing a forwarding

mechanism simpler than that of the data packet, so as to achieve more rapid routing. As
the universal method of label distribution and universal routing protocol apply to multiple
types of media (such as packet, cell and frame), MPLS supports efficient and allpurpose explicit routes (such as QoS routes) and the universal traffic engineering
method, as well as other operation methods. As the core protocol, Label Distribution
Protocol (LDP) is combined with the standard network layer routing protocol, distributes
label information among equipments of the MPLS network, and employs the
connectionless working mode. MPLS may employ the connection-oriented working
mode as well. That is, it employs the signaling protocols to establish explicit routes for
the multimedia services that require a long period and QoS support. In addition, MPLS
can employ the working mode that enables resource reservation but establishes
connection inexplicitly. That is, it employs the protocols of RSVP and RSVP-LSPTUNNEL mainly for traffic engineering. Besides, CRLDP, the extended protocol of LDP
implements the explicit routes of some paths.
The operating principles of MPLS network are as shown in figure 46. The figure shows
that the core structure of a MPLS network is composed of Label Edge Switch Router
(LER) and Label Switch Router (LSR). Label information is distributed between LER
and LSR as well as between LSRs via LDP. The network routing information comes
from some common routing protocols such as OSPF. The Label Switching Path (LSP) is
established according to the routing information. When the packet enters LER, the
ingress LER will search the routing table according to the input packet header to specify
the LSP to the destination, then add the corresponding LSP label that has been
searched out to the packet header, and output the packet to the path with the label ID.
However, the network node will be forwarded in the label switching mode simply
according to the packet label, without searching the routing table, while the egress LER
will forward the packet to the destination in a certain rule.
Figure 46 MPLS Operating Principles

LDP
IP routing processing
LSR
LSR
LDP
Ingress
LER
LDP
In
Egress
LER
Out
In
Out
In
Out
In
Out
As shown in Figure 47, the MPLS header contains 2-bit labels, 3-bit EXP (presently it is
CoS), 1-bit S used to identify whether this label is at the lowest bottom layer and 8-bit
TTL-Time to Live.
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Figure 47 MPLS Header Structure
MPLS determines whether to forward according to the label. Label is a fixed-length ID of

20-bit and has the local effect only on one hop of link. What the label identifies is a group
of packets in the forwarding equivalent classification (FEC). The group of packets may
be all packets reaching the same destination address prefix or the packets with the
similar QOS requirements. Packets in the same FEC are forwarded through the same
forwarding strategy.
When an unlabelled packet enters a MPLS domain, LSR on the edge will analyze the
destination address carried in the header and allocate this packet to a certain FEC as
required by QoS and then tag a corresponding FEC label to it before forwarding it to the
next hop. The middle LSR maintains a mapping relationship table of incoming labels,
outgoing labels and forwarding directions. When it receives a labeled packet, it will take
the incoming label carried by it as an index to find its corresponding outgoing label and
forwarding direction in the mapping relationship table, and then replace this incoming
label with a valid outgoing label before sending it to the next hop. Before leaving the
edge LSR of this MPLS domain, the label will be removed and the restored unlabelled
packet will be sent to the next hop.
During the forwarding process, the label can also be handled in the form of stack. The
value of the label at the top of the label stack is valid and LSR will forward packets
according to it. After entering a MPLS domain, a packet will put a label at the top of the
label stack so that the stack depth is increased by 1. LSR in this domain only checks
and replaces this label rather than any others in the stack. Upon leaving this domain, the
stack depth will be restored to original. For an unlabelled packet, the label stack can be
regarded to be empty, and adding label to it during its first time to enter the MPLS
network environment can be regarded as stacking operation. Thus, MPLS can easily
implement the network hierarchy. The depth of the label stack indicates the layer of the
network: If a packet passes tunnel or a MPLS network at a lower layer, the stack depth
will increase, vice versa.
Presently the ZXR10 8900 series switches can provide a complete MPLS protocols,
which functions to:
Supporting LDP and RSTP.
Supporting decreasing of TTL value, loop detection, strategy management and the
popping up of the second hop counted from back.
Supporting the downstream autonomous label distribution mode and free label
holding mode.
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4.3.11.2
Supporting the rapid rerouting as well as the establishment of CR-LSP and RSVPLSP.
MPLS L3 VPN
As shown in Figure 48, a basic BGP/MPLS VPN network is composed of CE router, PE
router and P router. CE, as the edge equipment of client, refers to the routers or
switches connected to the network of carriers. The VPN function is provided by the PE
router, while the P router and the CE router have no special requirement for VPN
configuration.
Figure 48 Basic Model of BGP MPLS VPN
To isolate route of one VPN from those of the public internet or other VPNs, the PE
router provides an isolated virtual routing forwarding (VRF) function to every VPN and
generates a VRF table for every VPN connected with a CE router. Clients or sites in this
VPN can only access the VRF table in this VPN.
During the BGP/MPLS VPN network construction, MP-BGP must be run on every PE
router (MP-BGP must be run between PE routers in MPLS VPN) for the learning and
announcing of VPN routes between PEs. MP-BGP inherits the feature of BGP that the
BGP routes are announced by the mode of full connection between peers running IGMP
within a same route domain. In the case that there is a large number of PEs, severe n
exponential issues and extendibility problem will come out. To avoid these problems,
route reflector can be used.
For the two sites in different ASs in a same VPN, the corresponding PE router will
forward the VPN-IPv4 routes through the EBGP connection rather than through the
IBGP. The specific methods include: back-to-back VRF method, distributing labeled
VPN-Ipv4 routes from one autonomous system to another and distributing the VPN-Ipv4
routes with Multi-hop EBGP.
ZXR10 8900 series switches support perfect MPLS L3 VPN function, address
overlapping, accesses of CE static route, RIP, OSPF and BGP, BGP extension attribute,
ability negotiation and route refresh and VRF binding on interface and in VLAN.
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4.3.11.3
VPN MPLS L2 VPN

MPLS L2 VPN is composed of two categories. One is VPWS (Virtual Private Wire
Service). Communication between sites in VPN is implemented in point-to-point
connection mode, which is mainly applied for users who are using ATM and FR
connection. The connection between users and network provider keeps the same.
However, the service is transmitted via IP backbone network of network provider after
encapsulation. The other category is VPLS (Virtual Private LAN Service). Carriers
network simulates function of LAN SWITCH or bridge to connect all the LAN of users
into a simple bridged LAN. The major difference between VPLS and VPWS lies in that
VPWS only provides point-to-point service, while VPLS provides point to multipoint
service. That is to say, CE in VPWS transmits data to certain user site via a selected
virtual line. While CE in VPLS just simply sends data with different destinations to the PE
that it connects to.
Figure 49 Basic VPWS network model
The most direct way to build L2 VPN is to build VC connection between CE and PE.
Carriers network MPLS LSP carries these connections respectively as shown in Figure
49. MPLS TE (Traffic Engineering) can also be applied to satisfy users QoS
requirements. In this solution, it is heavy workload to configure PVC between CE and PE
and MPLS LSP for bearing. Large quantity of LSP will occupy much resources of LSR
and reduce network scalability. To solve the scalability problem, Martini proposes to
establish fixed number of MPLS LSP between PE and network equipment. When VC
bearing service between user CE and PE needs to go through the network, it will enter
point-to-point sub-tunnel (i.e. pseudo-wire) in MPLSLSP. Then this LSP could be taken
as bearing channel for multiple VC. This is similar to the relationship between VC path
and VP channel in ATM. The related IETF draft defines encapsulation format for
signaling applied to build sub-tunnel and ATM, FR, and Ethernet data packets forwarded
via sub-tunnel. Although this way saves part of network resources (such as LSP
quantity), all the sub-tunnels need to be built manually when MPLS VPN is created in
large scale. Thus the configuration workload is heavy.
Virtual Private LAN Service (VPLS) is a kind of VPN which can handle multi-site link in
single bridging domain on IP/MPLS network managed by carriers. No matter where the
user sites in VPLS locate, they are considered to be in one LAN. VPLS connects with
users via Ethernet interface, which simplifies LAN/WAN border and enables the service
to be quickly and flexibly provided. In this case users take full control over routing. In
addition, since all of users routers in VPLS are part of the same subnet (LAN), a
simplified IP address solution comes into being. The advantage is especially obvious
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compared with full mesh architecture composed of different point-to-point links. Carriers
can also benefit from low VPLS service management complexity.
As shown in Figure 50, CE1, CE2 and CE3 are in one VPLS domain VPLS A. They are
connected via a packet switching network (here is MPLS network). Each PE is equipped
with VPLS feature. Full meshed VC connection is built up between PE. If CE1 and CE3
want to communicate with each other, CE1 need to learn MAC address of CE3 first
based on data traffic. Meanwhile, PE1 requires that packets going to PE3 have two
labels. One is outer packet switching label, which is MPLS network here and the other is
inner VC label. When PE1 receives MAC frames with destination of CE3, PE detects the
inner and outer labels of packets arrive at
PE3 based on MAC address and other
information adds the labels to the data frames and transmits them on MPLS network.
Only inner label is left when data packets arrive at PE3. PE3 obtains the connecting port
of PE3 connecting to CE3 based on inner label and MAC address, and sends packets
via the port. The data arrives at CE3 so that communication between CE1 and CE3 is
accomplished. Here all operations are implemented based on L2. Carriers dont need to
care about routing configuration of users so that dependence of users on carriers is
reduced, and user service management by carriers is simplified as well.
Figure 50 Basic VPLS network model
ZXR10 8900 series support VPWS in Martini draft, and extended LDP. 8900 series can
build up different LSP channels based on service type. They support Ethernet
encapsulation and VLAN encapsulation. And they also support extended VPLS based
on LDP.
4.3.11.4
MPLS FRR
MPLS TE Fast Reroute is a mechanism used for link protection and node protection in
MPLS TE. When LSP link or node failure occurs, the node where failure occurs is
protected. In this way traffic is permitted to go through tunnel of protection link or node
so that data transmission will not be interrupted. At the same time head node can
continue to initiate main path reconstruction without data transmission being affected.
The basic principle of MPLS TE Fast Reroute is to protect one or multiple LSP by a LSP
established before hand, which is called fast reroute LSP. The protected LSP is called
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main LSP. The ultimate aim of MPLS TE fast reroute is to protect main path by using
fast reroute tunnel to bypass the link or node with failure.
Fast reroute LSP and main LSP establishment involves every component of MPLS TE
system.
MPLS TE fast reroute is based on RSVP TE implementation and conforms to RFC4090
protocol.
There are two ways to implement fast reroute:
One-to-one Backup: establish one backup protective LSP for a main LSP. The
backup LSP is called Detour LSP.
Facility Backup: one-to-multiple backup protection, establish one backup protective

LSP for multiple main LSP. The backup LSP becomes Bypass Tunnel.
Facility way is often adopted in MPLS TE FRR deployment. Establishment of main LSP
is the same with that of common LSP. RSVP sends PATH message to downstream from
the head node hop-by-hop. RSVP distributes labels when processing RESV message,
reserve resources and establish LSP. Bypass Tunnel could be established in two ways:
manual and automatic.
Bypass Tunnel could be manually configured to protect physical interface of the tunnel
when main LSP FRR is not configured with FRR. Manual Bypass Tunnel establishment
is triggered by PLR manual configuration. It is basically the same with that of common
LSP with the difference that it cannot configure fast reroute attribute. That is to say,
Bypass Tunnel couldnt act as main LSP at the same time. And LSP couldnt be
protected in nested way.
Automatic Bypass Tunnel simplifies manual configuration. When main LSP needs
protection from FRR, PLR can select or automatically create a Bypass Tunnel to protect
the main LSP.
Fast Reroute can implement link protection or node protection. When Bypass Tunnel is
needed, the links or nodes need protecting should be planned and which to choose
between link protection and node protection should be decided. Node protection can
also protect the link between the nodes being protected and PLR nodes being protected.
Bypass Tunnel is usually idle without forwarding data packets. If Bypass Tunnel is
also required to take common data packets forwarding task besides protecting main
LSP, enough bandwidth should be configured.
When link or node failure occurs, data packets can be automatically switched to
protective link if FRR is configured at interface. When link or data recovers from the
failure, normal forwarding path will automatically reconstruct.
MPLS TE FRR usually needs to be deployed in MPLS TE network, which is determined
by the feature of MPLS TE itself. In pure IP network, when local failure occurs, packets
will be forwarded via other available routes to the same destination. This mechanism
alone can implement local failure protection quickly before route changes caused by
failure spreading to the whole network. In MPLS network without configuring TE, LDP
establishing LSP based on DU is often adopted. When local failure occurs, LDP initiates
LSP establishment to upstream nodes if there are other available routes. Since needs
67
related to TE such as bandwidth, priority and link attribute are not considered, the LSP is
of great possibility to be established successfully. Thus the failure and recovery cost a
little time. In MPLS network, head node CSPF calculates all routes in domain by routing
information. RSVP establishes LSP based on this path. When there is local failure in
network, the whole LSP needs to be rebuilt. CSPF cannot reckon out effective path
before route changes caused by failure spreading to the head node. Besides, local
failure may lead to reconstruction of multiple LSP in the network. In this way, during the
process of establishing LSP according to newly calculated path, problems probably
occur such as inadequate bandwidth. Therefore, compared with pure IP network and
MPLS network without TE deployment, MPLS TE network may need more time to
recover from local failure. So a backup LSP is established in MPLS TE network before
hand, FRR is started to fast switch services in case of network local failure.
4.3.12
Application sub-system
Application sub-system discussed here involves the upper three layers in OSI reference
model. It indicates FTP, TFTP, TELNET, DHCP and NAT application. The upper three
layers are application layers compared with the lower four, but actually they serve other
software sub-systems. FTP and TFTP mainly serve file systems of router itself. They can
implement related file duplication command of operation and maintenance sub-system.
FTP and TFTP both implement server and client function. Server side can support
connection with other client and various commands and file transmission function. Client
can enable its router system to communicate with host (router) with server functions, and
can implement transmission such as version file transmission.
TELNET mainly serve operation and maintenance sub-system, enabling router
maintenance staff to manage routers via TELNET. TELNET and FTP both receive and
send packets using primitive provided by lower layer TCP. TFTP receives and sends
packets using primitive provided by lower layer UDP.
4.3.13
DHCP
DHCP is IP address and other detailed configuration related information used in
integrated management network to reduce the complexity of address configuration
management. The client and server need to be in the same Broadcast Domain when
using DHCP service in the network. ZXR10 8900 series needs to provide DHCP
SERVER function if this method is adopted to build a network. In another application
case, the process for the client to obtain the address is transferred and implemented by
ZXR10 8900 if DHCP server and the client are not in the same Broadcast Domain.
Thats what is called DHCP trunk technically.
ZXR10 8900 switch series implement their in-built DHCP SERVER function through
DHCP protocol to allocate and manage DHCP CLIENT-end dynamic addresses.
Meanwhile they provide corresponding service management interface of DHCP CLIENT
for client management module in the system of target machine, they carry out
transparent interaction between DHCP CLIENT and DHCP SERVER through DHCP
RELAY AGENT extended options of DHCP protocol to accomplish the allocation and
management of DHCP CLIENT-end dynamic addresses and at the same time they
provide corresponding service management interface of DHCP CLIENT for client
management module in the system of target machine.
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4.3.14
Statistics and Alarm Subsystem

The statistics and alarm subsystem is also a function that ZXR10 8900 must provide.
This subsystem interacts with all other subsystems of the software. This system receives
statistics and alarm configuration information from management and maintenance
subsystem. All software subsystems send related statistics and alarm information to the
statistics and alarm subsystem, which performs appropriate operations according to the
configuration information of the statistics and alarm based on the alarm levels. For
example, it may write logs to store alarm information through file operation primitives
provided by ROS or notify the maintenance terminals to display the alarms, or send the
IP information of the alarms to the specified destination address via the IP route
subsystem. It stores the statistics and provides the interface by which the maintenance
and management subsystem can query it.
4.3.15
Security Subsystem
For protection from virus on the network, the ideal conditions would be that user-level
virus detection can be provided, so it is expected that the user can install patches and
anti-virus software. However, in many cases, users cannot accomplish this task, so the
switch is required to provide network-level virus detection and alarming.
In addition, the switch must enhance its protection against attacks from malicious users,
so as to avoid switch and network security breach. ZXR10 8900 support network-based
security protection mechanisms. Therefore, in our system, security detection function is
distributed among the modules, instead of providing a dedicated IDS module.
In ZXR10 8900 series, the security subsystem performs the following functions:
Detects viruses which may cause network traffic burst such as SQL worm, Red
Code, and Blaster etc., and generates corresponding alarm or closes the user
port.
Prevents user ARP spoofing
MAC address flood protection, for which it limits the number of MAC addresses of
the ports
Setup broadcast packet threshold of the ports
Mixed ACL filtering of L2, L3, and L4
Route filtering
Disables ICMP redirection function and prevents the attackers from sending false
ICMP packets
Prevents DoS attack
69
4.3.16
Maintenance and Management Subsystem

During the running of the routing switch, users must be able to monitor its running status
and that of the whole network in real time. Users also need to configure and manage the
router and the whole network, so an interface must be provided to allow the routing
switch and the user to interact. This interface must provide all the necessary functions
and is easy to operate. An industry-standard command line interface is used. The
command line interface supports user mode, privileged mode and configuration mode,
and enables users to configure the router and manage its faults.
The maintenance management subsystem receives user commands from TELNET,
compiles them and checks their validity, and then creates the execution ID based on the
compilation result, before sending them to the command execution sub-module for
execution. During the execution process, it will invoke services provided by the database
module to save the command configuration.
This maintenance and management subsystem is usually composed of the command
compilation module, command execution module and database.
4.3.17
SNMP Subsystem
The SNMP subsystem implements SNMP AGENT function, and supports all protocol
operations of SNMP agent specified in SNMP V1 /V2/V3.
The Management Information Library (MIB) is described by SMIv1 and SMIv2. The MIB
consists of the following parts:
Management objects supported by the core router
Management objects of the routing protocol
Management objects of the network management protocol
Management objects of the TCP/IP support protocol
Management objects of the high-speed network interface
Management objects of important data and configuration parameters
Management objects compatible with SMIv1
System configuration parameters
Other protocol management objects
The related software subsystems are integrated with the related sub-agent functions.
70
4.3.18
Monitoring Subsystem
The monitoring subsystem of ZXR10 8900 implement on-line detection of the state of
the boards and ports. The on-line detection for a board can be categorized into the
following processes based on the loop detection functions provided by different chips of
the board:
4.3.19
Loop detection for internal data bus: it is mainly adopted to detect if the connection
of internal data bus in the system is normal
Intra-chipset self-loop: it is mainly adopted to detect if a major chipset on the board

is working in the right way
Line self-loop: it is mainly adopted to detect if the data transmission of the line side
is going smoothly
IPv6 Subsystem
ZXR10 8900 series fully support IPv6, and supports IPv4, dual-stack operation and
conversion between IPv4 and IPv6.
Technical Specifications
Table 44
Basic features for ZXR10 8900 series
Description
Item
Basic
Functions
Number of
Slots
8912
8908
8905
8902
Backplane
bandwidth
2.88Tbps
1.92Tbps
1.2Tbps
480Gbps
Switching
capacity
1152Gbps
768Gbps
480Gbps
192Gbps
Packet
forwarding rate
857Mpps
571Mpps
357Mpps
143Mpps
Entries in the
routing table
512 K (layer 3)
Depth of the
MAC address
table
512 K (layer 2)
Total slots
14
10
Service slots
12
Supporting IEEE 802.3, IEEE 802.3u, IEEE

802.3z, IEEE 802.3x and IEEE 802.1p, etc.
L2 Protocols
Supporting IEEE 802.1d STP, and MSTP/RSTP

Supporting IEEE802.1q , number of
supporting VLAN extension (QinQ)
VLAN 4096,
71
Description
Item
8912
8908
8905
8902
Supporting EAPS-based ZESR intelligent

Ethernet ring technology
IPV4 routing protocols
IPV6 routing protocols
Supporting RIPv1/v2,OSPF, BGP and IS-IS

routing protocols
RIPng, BGP4+, OSPFv3 and IS-ISv6
6to4 tunnel and 6PE
MPLS VPN: supporting L2 VPLS and VPWS
(Martini mode), L3 RFC2547bis protocol
TE: supporting RSVP-TE, OSPF-TE, ISIS-TE,
MPLS-TE
FRR: supporting IP-FRR, LDP-FRR, TE-FRR
PBT: supporting PBT, PBT-QOS.
NAT: supporting up to 256K NAT sessions
Service features
Supporting NAT log

Multicast: supporting IGMP, PIM-DM/SMDVMRP,
MSDP, MBGP multicast routing protocols
Bandwidth control: port-, application-, and
stream-based bandwidth control, with control
granularity of 64 K
Authentication: supporting 802.1x and RADIUS
Client.
DHCP: supporting DHCP Relay
Supporting eight priority queues.
L2-based priority queue
QOS feature
L3-based source and destination flow control

L4-based source and destination flow control
L4-based application flow control
44+4 FE optical Interface board
44+4 FE electrical interface board
12-port GE electrical interface board
12-port GE optical interface board
48-port GE/FE optical adaptive interface board
Interface module

24-port GE optical interface board
24-Port GE Electrical Port + 2-Port 10G Optical
Ethernet Interface board
24-Port GE Optical Port + 2-Port 10G Optical
Ethernet Interface board
2 port 10G Ethernet optical interface board
72
Description
Item
8912
8908
8905
8902

24-port GE MPLS optical interface board
48-port GE MPLS electrical interface board
48-port GE MPLS optical interface board
24-Port GE Optical Port+2-Port 10G MPLS
Optical Ethernet Interface Board
4-port 10G MPLS Ethernet optical interface board
24-port GE OAM optical interface board
DPI (Deep Packet Inspection) board
FW (Firewall) board
Supporting SNMP MIB, MIB II (RFC 1213)
Supporting RMON
Supporting port mirroring: mirroring includes the
control module, particular port, and particular slot
Equipment management
Supporting Console/Telnet management

Supporting SSH
Supporting IEEE 802.1ag Connectivity Fault
Management.
Supporting IEEE 802.3ah
Power supply
Reliability
Physical
Parameters
Environmental
Requirements
Power supply
(AC)
100V~240V, 50Hz ~60Hz
Power Supply
(DC)
-57V~-40V
Maximum
power supply
(full load)
<1800W
MTBF
>200000 hours
MTTR
<30 minutes
Hotswappability
All the boards are hot-swappable
Main control
redundancy
backup
Main control 1+1, 1:1 redundancy backup
Power supply
redundancy
backup
Power supply
redundancy backup (AC
2+1, DC 1+1)
Power supply
redundancy backup (
AC 1+1, DC 1+1)
Dimensions
(WHD)
442mm
755mm
450mm
442mm
577mm
450mm
442mm
440mm
450mm
442mm
175mm
420mm
Weight
<65kg
<49kg
<38kg
<25kg
Operating
temperature
0~+40
<1200W
<720W
<288W
73
Description
Item
74
8912
8908
8905
Storage
temperature
-40~+70
Humidity
10%~90%, (non-condensing)
Earthquake
Anti-8 earthquake
8902
Networking
6.1
Large scale MAN convergence layer networking

application
ZXR10 8900 switch series are terabit MPLS switches with large capacity and high port
density. They are suitable for metro network aggregation layer applications. In this
scenario, core layer is made up of by large-scale routers. Aggregation layer is connected
by 8900/G/6900 switch series. They provide abundant bandwidth and access
management characteristic. See Figure 51 for its application.
Figure 51 Large scale MAN convergence layer networking application
6.2
Medium and small scale MAN core layer networking

application
ZXR10 8900 switch series are terabit MPLS switches with large capacity, high port
density and powerful service capability. In addition to being suitable for aggregation
layer applications for metro networks, they can be used as core equipment of medium
and small scale metro networks. In this kind of scenarios, core layer equipments are
8900 series switches. The aggregation layer is connected by 8900/G/6900 series
switches, which provide abundant bandwidth and access management characteristic.
See Figure 52 for its application.
75
Figure 52 Medium and small scale MAN core layer networking application
6.3
Campus Network Applications

A campus network usually requires large capacity, high port density and large bandwidth.
ZXR10 8900 Series switches are very suitable for campus network deployment. See
Figure 53 for its typical application.
Figure 53 Campus Network Applications.
76
Acronyms and Abbreviations

Table 45
Acronyms and Abbreviations
Abbreviations
Full Characteristics
BGP
Border Gateway Protocol
CoS
Class of Service
CVLAN
Customers VLAN
DHCP
Dynamic Host Configuration Protocol
GVRP
GARP VLAN Registration Protocol
HPS
Hitless Protection System
IGMP
Internet Group Management Protocol
IS-IS
Intermediate System-to-Intermediate System Routing
LACP
Link Aggregation Control Protocol
LDP
Label Distribution Protocol
LESR
Label Edge Switch Router
LSR
Label Switch Router
MAC
Media Access Control
MBGP
Multiprotocol Border Gateway Protocol
MIB
Management Information Base
MPLS
Multi-Protocol Label Switching
MSDP
Multicast Source Discovery Protocol
NAT
Network Address Translation
NP
Network Processor
OAM
Operating And Maintenance
OSPF
Open Shortest Path First
PIM-DM/SM
Protocol Independent Multicast-Dense Mode/ Sparse Mode
PP
Packet Processor
PPP
Point to Point Protocol
PVLAN
Private VLAN
QoS
Quality of Service
RIP
Routing Information Protocol
RSVP
Resource Reservation Protocol
SNMP
Simple Network Management Protocol
STP
Spanning Tree Protocol
SVLAN
Service VLAN
TCP
Transmission Control Protocol
UDP
User Datagram Protocol
77
78
Abbreviations
Full Characteristics
uRPF
unicast Reverse-path Forwarding
VLAN
Virtual Local Area Network
VPWS
Virtual Private Wire Service
VRRP
Virtual Router Redundancy Protocol
WLAN
Wireless Local Area Network
XDSL
X Digital Subscriber Line

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ZXR10 8900 Product

ZXR10 8900 Product Description

ZXR10 8900 Product Description

Not open to the Third Party

2009 ZTE Corporation. All rights reserved.

ZTE Confidential Proprietary

2009 ZTE Corporation. All rights reserved.

ZXR10 8900 Product Description

Highlight Features ...................................................................................................... 3

System Architecture .................................................................................................. 7

Technical Specifications ......................................................................................... 71

2009 ZTE Corporation. All rights reserved.

ZTE Confidential Proprietary

ZXR10 8900 Product Description

Acronyms and Abbreviations ................................................................................. 77

ZTE Confidential Proprietary

2009 ZTE Corporation. All rights reserved.

ZXR10 8900 Product Description

Appearance of ZXR10 8902/8905/8908/8912 ............................................................... 7

2009 ZTE Corporation. All rights reserved.

ZTE Confidential Proprietary

ZXR10 8900 Product Description

Block Diagram of the Unicast Routing Protocol Subsystem ........................................ 58

ZXR10 8902/8905/8908/8912 physical parameters ...................................................... 7

ZTE Confidential Proprietary

2009 ZTE Corporation. All rights reserved.

ZXR10 8900 Product Description

Specifications of the 48-port GE MPLS Electrical Interface Board .............................. 32

2009 ZTE Corporation. All rights reserved.

ZTE Confidential Proprietary

ZXR10 8900 Product Description

Hardware-based IP packet wire-speed forwarding: private ASIC design improves IP

Supporting complete routing protocols: unicast supports mainstream routing

Powerful MPLS support: adopting distributed hardware forwarding to fully satisfy

Enhanced Ethernet support: supporting EAPS-based ZESR (ZTE Ethernet Smart

ZTE Confidential Proprietary

2009 ZTE Corporation. All rights reserved.

ZXR10 8900 Product Description

Traffic control and bandwidth control: implementing port, user or application-based

Rich service functions: security,

Complete security measures: system management security, routing protocol

Complete network management: being able to implement the whole network

2009 ZTE Corporation. All rights reserved.

ZTE Confidential Proprietary

ZXR10 8900 Product Description

Advanced system architecture for high reliability

Powerful security function for Green network

Support of IPv6 for lower CAPEX

Support for MPLS L2/L3 VPN for all services

ZTE Confidential Proprietary

2009 ZTE Corporation. All rights reserved.

ZXR10 8900 Product Description

Unified network management for lower OPEX

2009 ZTE Corporation. All rights reserved.

ZTE Confidential Proprietary

ZXR10 8900 Product Description

Layer 2 protocol supported

Supporting IEEE 802.3,IEEE 802.3u,IEEE 802.3z,IEEE 802.3x,IEEE 802.1p and

Supporting IEEE 802.1d STP(Spanning Tree Protocol),MSTP(Multiple Spanning

Supporting IEEE802.1q, number of VLAN 4096, support VLAN extension (QinQ).

Supporting ZESR(ZTE Ethernet Smart Ring) technology.

Layer 3 protocol supported

Supporting IPv6 RIPng, BGP4+, OSPFv3, and IS-ISv6.