FINITE AUTOMATA:

ALPHABET:
An alphabet is a non-empty set of symbols which can be given as input to any
state of an automation or machine. It is represented by . Example: = {0, 1} is the
binary alphabet. = {a, b, c, , z} is the English lower-case letter alphabet.
STRING / WORD:
A string is a sequence of symbols collected from some alphabet. Example, 1001 is
a string of binary alphabet. student is an example of English lower-case letter alphabet.
LANGUAGE OF AN ALPHABET:
The set of all strings of an alphabet is called language of that alphabet. It is
denoted by L. Example L( = {0, 1}) = {0, 1, 00, 01, 10, 11, 000, } is an example
of binary language.
AUTOMATION:
A system is called an automation if it can be designed by following 5 items:
i.
ii.
iii.
iv.
v.

States: Any automation should have a number of states. The set of states is
denoted by Q.
Input alphabet: Any automation should have a fixed input alphabet. It is denoted
by .
Transition function: A state of any automation can transit to another state of that
automation. This is denoted by transition function .
Start State or Initial State: Any automation should have single start state. It is
denoted by q0.
Final States or End States: Any automation should have one or more than one
final states. The set of final states is denoted by F. The automation or machine
terminates its operation after reaching any of its final states.

FINITE AUTOMATA
An automation M is called a finite automation if it can be represented a 5-tuple
structure M = (Q,,,q0,F), where
Q is the set of states of M
is input alphabet
is transition function defined as follows:
: QQ
q0 is start state
F is set of final states
Finite automations can be classified into two categories which are Nondeterministic Finite Automata (NFA or NDFA) and Deterministic Finite automata (DFA).
NON-DETERMINISTIC FINITE AUTOMATA (NFA / NDFA)
A finite automation M is called non-deterministic if it is NOT sure about the next
state when a particular input is given to a current state. An NFA can be represented a 5tuple structure M = (Q,,,q0,F), where
Q is the set of states of M
is input alphabet
is transition function defined as follows:
: Q2Q
q0 is start state
F is set of final states
Let us take an example:

0
0

A
1

0
1

State Transition Diagram of an NFA M1

NS (Next State)
input=0
input=1
{A, B}
{C}
{A}
{C}
{B}
{C}

PS (Present
State)
A
B
C

State Transition Table of NFA M1

Q = {A,B,C}
= {0,1}
(A,0)={A,B}
q0 = A
F = {C}

(A,1)={C} (B,0)={A}

(B,1)={C}

(C,0)={B}

(C,1)={C}

Let us take another example:

0

A
1

State Transition Diagram of an NFA M2

PS (Present
State)
A
B
C

NS (Next State)
input=0
input=1
{B}
{C}
{A}
{C}
{B}

State Transition Table of NFA M2

Q = {A,B,C}
= {0,1}
(A,0)={B} (A,1)={C}
q0 = A
F = {C}

(B,0)={A}

(B,1)={C}

(C,0)={B}

(C,1)=

DETERMINISTIC FINITE AUTOMATA (DFA)

A finite automation M is called deterministic if it is very sure about the next state
when a particular input is given to a current state. A DFA can be represented a 5-tuple
structure M = (Q,,,q0,F), where
Q is the set of states of M
is input alphabet
is transition function defined as follows:
: QQ
q0 is start state
F is set of final states
Let us take an example:

A
1

0
1

State Transition Diagram of a DFA M3

PS (Present

NS (Next State)
4

State)
A
B
C

input=0
B
A
B

input=1
C
C
C

State Transition Table of DFA M3

Q = {A,B,C}
= {0,1}
(A,0)=B
(A,1)=C
q0 = A
F = {C}

(B,0)=A

(B,1)=C

(C,0)=B

(C,1)=C

NFA with empty-transitions (-transitions / -transitions / ^-transitions) or emptymoves:

The NFA with -transitions or -NFA allows the automata to have transition on
empty string . This transition is called -transition or -move. This means that without
any input, the automation changes its states. For example, -transition represented by
(q0, ) = q1 means that the automation changes its state from q0 to q1 without any input.
Thus, it introduces a hidden non-determinism in automation. However, -transitions are
useful in specifying optional inputs and render the design of automation simple.
The behavior of -NFA on strings is based on the function called -CLOSURE.
The -CLOSURE(q) is the set of all states reachable from q on -transitions. For
example, let us consider the -NFA given in following figure.

q0q0q

q1

q2

NFA with -transitions

-CLOSURE(q0) = {q0,q1,q2}
-CLOSURE(q1) = {q1,q2}
-CLOSURE(q2) = {q0,q1,q2}
The -CLOSURE of a set of states q0, q1, , qn is defined as follows:

-CLOSURE({q0,q1, , qn}) = -CLOSURE(q0)

CLOSURE(qn)

-CLOSURE(q1)

Conversion: -NFA to NFA:

Let Figure 1 is an NFA with empty-transitions.

Figure 1: An NFA M1 with -transition

We have to convert the above NFA to an equivalent NFA which have no empty
transition.

First we have to calculate -CLOSURE of individual states.

-CLOSURE(q0) = {q0,q1,q2} = A
-CLOSURE(q1) = {q1,q2} = B
-CLOSURE(q2) = {q2} = C
Now, A, B and C are the states of our new automata. Now we have to find
transition function of
(A,0) = -CLOSURE ((A,0))
= -CLOSURE (({q0,q1,q2},0))
= -CLOSURE ((q0,0) (q1,0)
(q2,0))
= -CLOSURE ({q0} )
= -CLOSURE ({q0})
= -CLOSURE (q0)
= {q0,q1,q2}
=A

(A,1) = -CLOSURE ((A,1))

= -CLOSURE (({q0,q1,q2},1))
= -CLOSURE ((q0,1) (q1,1)
(q2,1))
= -CLOSURE ( {q1} {q2})
= -CLOSURE ({q1,q2})
= -CLOSURE (q1) -CLOSURE(q2)
= {q1,q2} {q2}
= {q1,q2}
=B

(B,0) = -CLOSURE ((B,0))

= -CLOSURE (({q1,q2},0))
= -CLOSURE ((q1,0) (q2,0))
= -CLOSURE ( )
= -CLOSURE ()
=

(B,1) = -CLOSURE ((B,1))

= -CLOSURE (({q1,q2},1))
= -CLOSURE ((q1,1) (q2,1))
= -CLOSURE ({q1} {q2})
= -CLOSURE ({q1,q2})
= -CLOSURE (q1) -CLOSURE(q2)
= {q1,q2} {q2}
= {q1,q2}
=B

(C,1) = -CLOSURE ((C,1))

= -CLOSURE (({q2},1))
= -CLOSURE ((q2,1))
= -CLOSURE ({q2})
= -CLOSURE (q2)
= {q2}
=C

(C,0) = -CLOSURE ((C,0))

= -CLOSURE (({q2},0))
= -CLOSURE ((q2,0))
= -CLOSURE ()
=

Now,
start state of new system:
final states of new system:

A
{A,B,C}

1
1

Figure 1: Equivalent NFA of M1

Conversion: -NFA to NFA:

q0

q1

q3
b

q6

q2

q4

q5

-CLOSURE(q0) = {q0} = A
-CLOSURE(q1) = {q1} = B
-CLOSURE(q2) = {q2} = C
-CLOSURE(q3) = {q3,q4,q5} = D
-CLOSURE(q4) = {q4,q5} = E
-CLOSURE(q5) = {q5} = F
-CLOSURE(q6) = {q6} = G
(A,a) = -CLOSURE ((A,a))
= -CLOSURE (({q0},a))
= -CLOSURE ((q0,a))
= -CLOSURE ({q3})
= -CLOSURE (q3)
= {q3,q4,q5}
=D

(A,b) = -CLOSURE ((A,b))

= -CLOSURE (({q0},b))
= -CLOSURE ((q0,b))
= -CLOSURE ({q1,q2})
= -CLOSURE (q1) -CLOSURE(q2)
= {q1} {q2}
= B, C

(B,a) = -CLOSURE ((B,a))

= -CLOSURE (({q1},a))
= -CLOSURE ((q1,a))
= -CLOSURE ({q6})
= -CLOSURE (q6)
= {q3,q4,q5}
=G

(B,b) = -CLOSURE ((B,b))

= -CLOSURE (({q1},b))
= -CLOSURE ((q1,b))
= -CLOSURE ()
=

(C,a) = -CLOSURE ((C,a))

= -CLOSURE (({q2},a))
= -CLOSURE ((q2,a))
= -CLOSURE ()
=

(C,b) = -CLOSURE ((C,b))

= -CLOSURE (({q2},b))
= -CLOSURE ((q2,b))
= -CLOSURE ({q3})
= -CLOSURE (q3)
= {q3,q4,q5}
=D
9

(D,a) = -CLOSURE ((D,a))

= -CLOSURE (({q3,q4,q5},a))
= -CLOSURE ((q3,a) (q4,a)
(q5,a))
= -CLOSURE ( {q4} )
= -CLOSURE ({q4})
= -CLOSURE (q4)
= {q4,q5}

(D,b) = -CLOSURE ((D,b))

= -CLOSURE (({q3,q4,q5},b))
= -CLOSURE ((q3,b) (q4,b)
(q5,b))
= -CLOSURE ( {q6})
= -CLOSURE ({q6})
= -CLOSURE (q6)
= {q6}

(E,a) = -CLOSURE ((E,a))

= -CLOSURE (({q4,q5},a))
= -CLOSURE ((q4,a) ) (q5,a))
= -CLOSURE ({q4} )
= -CLOSURE ({q4})
= -CLOSURE (q4)
= {q4,q5}
=E

(E,b) = -CLOSURE ((E,b))

= -CLOSURE (({q4,q5},b))
= -CLOSURE ((q4,b) ) (q5,b))
= -CLOSURE ( {q6})
= -CLOSURE ({q6})
= -CLOSURE (q6)
= {q6}
=G

(F,a) = -CLOSURE ((F,a))

= -CLOSURE (({q5},a))
= -CLOSURE ((q5,a))
= -CLOSURE ()
=

(F,b) = -CLOSURE ((F,b))

= -CLOSURE (({q5},b))
= -CLOSURE ((q5,b))
= -CLOSURE ({q6})
= -CLOSURE (q6)
= {q6}
=G

(G,a) = -CLOSURE ((G,a))

= -CLOSURE (({q6},a))
= -CLOSURE ((q6,a))
= -CLOSURE ()
=

(G,b) = -CLOSURE ((G,b))

= -CLOSURE (({q6},b))
= -CLOSURE ((q6,b))
= -CLOSURE ()
=

A
b

B
a

b
b

D
b

10

B
a

b
C

D
b

E
a

Conversion: NFA to DFA:

[A]
[D]
[B C]
[E]
[G]
[D]
[E G]

Input a
[D]
[E]
[G]
[E]
[E G]
[E]

Input b
[B C]
[G]
[D]
[G]
[G]
[G]

[q0]
[q1]
[q2]
[q3]
[q4]
[q5]
[q6]

Input a
[q1]
[q3]
[q4]
[q3]
[q6]
[q3]

Input b
[q2]
[q4]
[q1]
[q5]
[q4]
[q4]

11

ba

q0

q1

q3
b

q2

q44
aa

FINITE AUTOMATA WITH OUTPUT:

MOORE MACHINE:
12

q6

ab

q5

Moore Machine can be represented as a 6-tuple structure:

M = (Q, , , , , q0)
where,
Q is set of states of the system
is input alphabet of the system
is output alphabet of the system
is transition function of the system defined as : Q Q
is output function of the system defined as : Q
q0 is the initial or start state of the system
Let us take an example:
NS

PS

x=0
B
A
B

A
B
C
Q = {A,B,C}
= {0,1}
= {0,1}
(A,0)=B
(A,1)=C
(A) = 0
(B) = 1
q0 = A

(B,0)=A
(C) = 0

x=1
C
C
C

(B,1)=C

Output
z
0
1
1

(C,0)=B

For the input string 010, the transition of states is given by

ABCB
The output string is 0101.
For the input string , the output is (A) = 0

MEALY MACHINE:
Mealy Machine can be represented as a 6-tuple structure:
M = (Q, , , , , q0)
13

(C,1)=C

where,
Q is set of states of the system
is input alphabet of the system
is output alphabet of the system
is transition function of the system defined as : Q Q
is output function of the system defined as : Q
q0 is the initial or start state of the system
Let us take an example:
PS
A
B
C
Q = {A,B,C}
= {0,1}
= {0,1,2}
(A,0)=A
(A,1)=B
(A,0)=0
(A,1)=1
q0 = A

NS, z
x=0
A,0
C,2
A,0

(B,0)=C
(B,0)=2

(B,1)=B
(B,1)=1

x=1
B,1
B,1
B,1

(C,0)=A
(C,0)=0

For the input string 101, the transition of states is given by

ABCB
The output string is 121
For the input string , the output is

REMARKS:

14

(C,1)=B
(C,1)=1

A finite automata can be converted into a Moore Machine by introducing =

{0,1} and defining (q) = 1 if and only if q F and (q) = 0 if q does not belong
to F.
In case of a Moore machine if the input string is of length n, the output string is of
length n+1; whereas in case of a Mealy machine if the input string is of length n,
the output string is of also length n.

CONVERSION: MEALY MACHINE TO MOORE MACHINE

Let M = (Q, , , , , q0) be a given Moore machine, then M = (Q, , , , , q0)
is Mealy machine equivalent to M where (q,a) = ((q,a))
Example:
Let a Moore machine is given as follows:
NS

PS

x=0
A
C
A

A
B
C

Outpu
tz
0
1
2

x=1
B
B
B

Now to get equivalent Mealy machine, we proceed as follows:

(A,0) = ((A,0)) = (A) = 0
(A,1) = ((A,1)) = (B) = 1
(B,0) = ((B,0)) = (C) = 2
(B,1) = ((B,1)) = (B) = 1
(C,0) = ((C,0)) = (A) = 0
(C,1) = ((C,1)) = (B) = 1
The equivalent Mealy machine is given as follows:
PS
A
B
C

NS, z
x=0
A,0
C,2
A,0

x=1
B,1
B,1
B,1

CONVERSION: MOORE MACHINE TO MEALY MACHINE

15

Let us consider the following Mealy machine.

PS
q1
q2
q3
q4

NS, z
x=0
q3,0
q1,1
q3,1
q4,1

x=1
q2,0
q4,0
q1,1
q3,0

We have to construct a Moore machine equivalent to that Mealy machine.

We look into the next state column for any state, say qi, and determine the number
of different outputs associated with qi in that column.
We split qi into several different states, the number of such states being equal to
the number of different outputs associated with qi. For example, in this problem, q 1 is
associated with one output 1 and q2 is associated with two different outputs 0 and 1.
Similarly, q3 and q4 are associated with the outputs 0 and 0, 1 respectively. So we split q 2
into q20 and q21. Similarly, q4 is split into q40 and q41. Now table given in the example can
be reconstructed for the new states as given by Table 1.
PS
q1
q20
q21
q3
q40
q41

NS, z
x=0
q3,0
q1,1
q1,1
q3,1
q41,1
q41,1
Table 1

x=1
q20,0
q40,0
q40,0
q1,1
q3,0
q3,0

The pair of states and outputs which gives the Moore machine can be rearranged
as given by Table 2.
PS
q1
q20
q21
q3
q40
q41

NS
x=0
q3
q1
q1
q3
q41
q41
Table 2

16

x=1
q20
q40
q40
q1
q3
q3

z
1
0
1
0
0
1

DISTINGUISHABLE STATES AND EQUIVALENT STATES OF A (MEALY)

MACHINE:
Definitions of Distinguishable States and Equivalent States of a Machine:
Two states q1 and q2 of machine M are distinguishable if and only if there
exists at least one finite input sequence, when applied to M, causes different output
sequences, depending on whether q 1 and q2 is the initial state. The input sequence
which distinguishes these states is called a distinguishable sequence of the pair (q 1 and
q2). If there exists for pair (q 1,q2) a distinguishing sequence of length k, the states in
(q1,q2) are said to be k-distinguishable.
As an example let us consider the pair (A,B) of machine M1, whose state table is
shown in table. The pair (A,B) is 1- distinguishable, since an input 1 applied to M1 when
initially in A yields an output 1, versus an output 0 when it is initially in B. On the other
hand, the pair (A,E) is 3-distinguishable, since there is no input sequence of length 2
which distinguishes A from E. The only sequence of length 3 which is a distinguishing
sequence for the pair (A,E) is X = 111, and the output sequences corresponding to initial
states A and E are 100 and 101, respectively. [We can note that 1101 is also a sequence
which distinguishes A from E, although it is not the shortest such sequence. An all-zero
sequence, on the other hand, will produce identical output sequences independently of
whether the initial state is A or E.]
NS, z

PS

x=0
x=1
A
E,0
D,1
B
F,0
D,0
C
E,0
B,1
D
F,0
B,0
E
C,0
F,1
F
B,0
C,0
State Table for Machine M1

The concept of k-distinguishability leads directly to the definition of kequivalence and equivalence. States that are not k-distinguishable are said to be kequivalent. For example, states A and E of M1 are 2-equivanent (but they are not 3equivalent). States which are k-equivalent are also r-equivalent, for all r < k. states that
are k-equivalent for all k are said to be equivalent. Thus we arrive at the following
definition.
Two States q1 and q2 of machine M are said to be equivalent if and only if, for
every possible input sequence, the same (i.e. identical) output sequence will be
produced regardless of whether q1 and q2 is the initial state. [This is normal
Definition of equivalent states of a machine.]

17

Definition of equivalence can be generalized to the case where q 1 is a possible

initial state of in machine M1, while q2 is an initial state in machine M2, where both
M1 and M2 have the same input alphabet.
If q1 and q2 are equivalent states, their corresponding x-successors for all x
are either the same or also equivalent.
Hence, we can say that two states q1 and q2 of machine M are said to be
equivalent if and only if they produce the same (i.e. identical) output for every
possible input x, and their x-successors, for all possible x, are either the same or also
equivalent. [This is recursive Definition of equivalent states of a machine.]

Procedure of finding Distinguishable States and Equivalent States of a Machine:

State equivalence is an equivalence relation and in consequence of this
characteristic, the set of states of the machine can be partitioned into disjoint subsets,
known as equivalence classes, so that two states are in the same equivalence class if and
only if they are equivalent, and are in different classes if and only if they are
distinguishable.
The first step is to partition the states of machine M into subsets such that all
states in the same subset are 1-equivalent. This is accomplished by placing states having
identical outputs under all possible inputs in the same subset. Clearly, two states which
are in different subsets are 1-distinguishable.
As an example, we consider machine M1 given in table. The first partition P 0
corresponds to 0-distinguishability, and it defines our initial ignorance regarding the
response of the various states, prior to the application of any input. P1 is obtained simply
by inspecting the table and placing those states having the same outputs, under all inputs,
in the same block. Thus A,C,E are in the same block, since their outputs under inputs 0
and 1 are 0 and 1, respectively. A similar argument places B,D,F in the other block.
Clearly, P1 establishes the subsets (or classes or blocks) where states which are in a same
or common subset are 1-equivalent but states which are in two different subsets are 1distinguishable.
The next step is to obtain the partition P2 where states which are in a same or
common subset are 2-equivalent but states which are in two different subsets are 2distinguishable. This is accomplished by observing that two states are 2-equivalent if
and only if they are 1-equivalent and their x-successors, for all possible x, are also
same or 1-equivalent. Consequently, two states are placed in the same (or common)
block of P2 if and only if they are in the same (or common) block of P 1, as well as, for
each possible x, their x-successors are also contained in a same (or common) block of P 1.
This step is carried out by splitting blocks of P 1 whenever their successors are NOT
contained in a COMMON block of P1. The 0-successor of (A,C,E) is (C,E) and 118

successors of (A,C,E) is (B,D,F), and since both (C,E) is contained within a common
block of P1 as well as (B,D,F) is contained within a common block of P1, the states in the
subset (A,C,E) are 2-equivalent; and therefore (A,C,E) constitutes a block or subset in P 2.
The 1-successor of (B,D,F) is (D,B,C); but since (D,B) and (C) are NOT contained in a
single block of P1, the block (B,D,F) must be split into (B,D) and (F) to obtain P2.
In general, the Pk+1 partition is obtained from Pk by placing in the same (or
common) block of Pk+1 those states which are in the same (or common) block of P k, as
well as, for each possible x, their x-successors are also contained in a same (or common)
block of Pk.
Two states are (k+1)-equivalent if and only if they are k-equivalent and their
x-successors, for all possible x, are also same or k-equivalent.
If for some k, Pk+1 = Pk the process terminates and Pk defines the sets of equivalent
states of the machine; that is, all states contained in a same block of P k are equivalent,
where states belonging to different blocks are distinguishable. P k is thus called the
equivalence partition, and the foregoing procedure is referred to as Moore reduction
procedure. For machine M1, P3 is equivalence partition, and therefore states A & C are
equivalent, and so are states B & D.
P0 = {A,B,C,D,E,F}
P1 = {{A,C,E},{B,D,F}}
P2 = {{A,C,E},{B,D},{F}}
P3 = {{A,C},{E},{B,D},{F}}
P4 = {{A,C},{E},{B,D},{F}}
Equivalence partition for machine M1
Minimization of (Mealy) Machine:
If we denote the blocks of the equivalence partition P3 of M1 by , , and ,
respectively, to (A,C), (E), (B,D) and (F), we obtain the minimized machine M1
NS, z
PS
x=0
x=1

,0
,1

,0
,1

,0
,0

,0
,0
Replacing , , and , respectively, by A, B, C and D, we get
NS, z
PS
x=0
x=1
A
B,0
C,1
B
A,0
D,1
C
D,0
C,0
D
C,0
A,0
19

PROBLEMS:
1. Design an NFA, DFA, Moore Machine, Mealy Machine and Minimized Mealy
Machine which accepts (0+1)*0
2. Design an NFA, DFA, Moore Machine, Mealy Machine and Minimized Mealy
Machine which accepts (0+1)*01
3. Design a Moore Machine, Mealy Machine which will count the number of 1s in
an input binary string.
4. Design a Moore Machine, Mealy Machine which will output the number of 1s
mod 3 in an input binary string.
5. Design a Moore Machine which will generate the remainder after dividing the
input binary string by 3.
6. Draw a state diagram (Mealy Machine) of a 2-bit Serial-in-serial-out shift register.
7. Design a Mealy Machine which will detect a binary string sequence 01011.
8. Design a Mealy machine which will produce an output x whenever a binary string
ends with 01, output y whenever a binary string ends with a 0, and output z
otherwise.

20

SIMPLIFICATION OF INCOMPLETELY SPECIFIED MACHINES:

Definition of Compatible States of a Machine:
Two States q1 and q2 of machine M are said to be compatible if and only if,
for every possible input sequence applicable to both q 1 and q2, the same (i.e.
identical) output sequence will be produced whenever both outputs are specified and
regardless of whether q1 and q2 is the initial state. [This is normal Definition of
compatible states of a machine.]
If q1 and q2 are compatible states, their corresponding x-successors for all x
are either the same or also compatible.
Hence, we can say that two states q1 and q2 of machine M are said to be
compatible if and only if they produce outputs which are not conflicting (i.e. same or
identical when specified) for every possible input x, and their x-successors, for all
possible x, are either the same or also compatible. [This is recursive Definition of
compatible states of a machine.]
In general, three or more states, q 1, q2, q3, . . . , are compatible if and only if ,
for every possible applicable input sequence, no two conflicting output sequences
will be produced, without regard as to which of the above states is the initial states.
Thus a set of states (q1, q2, q3, . . .) is called a compatible if all its members are
compatible.
A compatible Ci is said to be larger than, or to cover, another compatible C j if and
only if every state contained in C j is also contained in Ci. A compatible is maximal if it is
not covered by any other compatible. (Let us note that a single state that is not compatible
with any other state is a maximal compatible). Thus, if we find the set of all the maximal
compatibles, that in effect is equivalent to finding all compatibles, since every subset of a
compatible is also a compatible.
Compatibility relation is not an equivalence relation. It thus follows that a set of
states is a compatible if and only if every pair of states in that set is compatible. For
example states q1, q2, q3 of a machine M will form the compatible (q 1q2q3) if and only if
(q1q2), (q1q3) and (q2q3) are compatibles. While the equivalence partition consists of
disjoint blocks, the subsets of compatibles may be overlapped.

21

The merger graph:

It is desirable first to generate the entire set of compatibles, and then to select an
appropriate subset, which will form the basis for a state reduction leading to a minimal
machine.
Since a set of states is compatible if and only if every pair of states in that set is
compatible, it is sufficient to consider only pair of states and to use them to generate the
entire set. We shall refer to a compatible pair of states as a compatible pair. Let the xsuccessors of A and B are C and D, respectively; then (AB) implies (CD), or (CD) is said
to be implied by (AB). Thus, if (AB) is a compatible pair, then (CD) is referred to as its
implied pair. The merger graph presented subsequently serves as the major tool in the
determination of the set of all compatibles.
The merger graph of an n-state machine M is an undirected graph defined as
follows:
1. It consists of n vertices, each of which corresponds to a state of M.
2. For each pair of states (AB) in M whose next-states and output entries are not
conflicting, an undirected arc is drawn between vertices A and B.
3. If for a pair of states (AB) the corresponding outputs under all inputs are not
conflicting, but next-states are not the same, an interrupted arc is drawn between
A and B, and the implied pairs are entered in the space.
Let us consider a machine M3. Its merger graph is shown in figure below that.
NS, z

PS

I1

E,0
F,0

C,0

A
B
C
D
E
F

I2
I3
C,1
E,1

F,1

B,1
F,0
A,0

B,0
State Table for Machine M3

A
B
F

(CE)

(AB)
(CD)

(EF)
(CF)
C

(BE)

D
Merger graph for machine M3
22

I4
B,1

D,1
C,1

A
B
F

C
E
D
Modified or final merger graph for machine M3

For machine M3 the merger graph reveals the existence of nine compatible pairs:
(AB),(AC),(AD),(BC),(BD),(BE),(CD),(CF),(EF)
Moreover, since (AB), (AC) and (BC) are compatibles, then (ABC) is also a compatible,
and so on. In this manner the entire set of compatibles of M3 can be generated from its
compatible pairs.
In order to find a minimal set of compatibles, which covers the original machine
and can be used as a basis for the construction of a minimal machine, it is often useful to
find the set of maximal compatibles. [A compatible is maximal if it is not contained in
any other compatible.]
In terms of the merger graph, we are looking for complete polygons which are
not contained within any higher-order complete polygons. [A complete polygon is one in
which all possible diagonals exist.] Since the states covered by a complete polygon are all
pairwise compatible, they constitute a compatible; and if the polygon is not contained in
ant higher-order complete polygon, they constitute a maximal compatible.
In the figure of merger graph the set of highest-order polygons are the tetragon
(ABCD) and the arcs (CF), (BE) and (EF). Thus the following set of maximal
compatibles for machine M3 results:
{(ABCD),(BE),(CF),(EF)}

23

The closed sets of compatibles

A set of compatibles (for machine M) is said to be closed if, for every compatible
contained in the set, all its implied compatibles are also contained in the set. A closed set
of compatibles which contains all the states of M is called a closed covering.
Examples (for Machine M3):
{(BE),(CF),(EF)}
{(AD),(BE),(CD)}
{(ABCD),(EF)}
{(ABCD),(BE),(CF),(EF)}
{(AD),(BE),(CF)} {(AB),(CD),(EF)}

neither closed nor covering

closed but not covering
covering but not closed
closed and covering
minimal closed covering

Merger graph itself gives set of maximal compatibles which must implicitly be a
closed covering but not necessarily minimal.
Now, it is desirable to look for a closed covering which yields a simpler
machine.
Unfortunately, there is no simple, precise procedure leading to the selection of
the minimal closed covering, and trial-and-error technique cannot be avoided
The preceding minimal closed coverings have been obtained by inspecting the
merger graph and employing a trail-and-error procedure.
It should be pointed out that NO straightforward systematic procedure to find a
minimal closed covering is known as yet, and a certain amount of search is
unavoidable.

The compatibility graph

Let us consider the machine M4 and its merger graph.
PS
A
B
C
D
E

NS, z
I1

C,0
C,0

B,0

I2
I3

E,1
A,1
B,0
D,1

E,1
B,

C,
State Table for Machine M4

I4

A,0

B,0

The merger graph is constructed in the usual manner. The set of maximal
compatibles derived from the merger graph contains four members and is given by
{(ACD),(BC),(BE),(DE)}
24

A
(CE)
E
(BC)
(AE)

(BC)

(BE)
(AD)
D

(BC)
(AB)

(DE)

C
Merger graph for machine M4
A
E
(BC)

(BC)
(BE)
(AD)
D
(DE)
C
Modified or final merger graph for machine M4

The compatibility graph is a directed graph whose vertices correspond to all

compatible pairs, and an edge leads from vertex (AB) to vertex (CD) if and only if (AB)
implies (CD). It is a tool which aids in the search for a minimal closed covering.
The compatibility graph for machine M4 is shown in following figure.
(AC)
(AD)
(BE)
(BC)

(CD)

(DE)
Compatibility graph for machine M4
25

A subgraph of a compatibility graph is said to be closed if, for every vertex in the
subgraph, all outgoing edges and their terminating vertices also belong to the subgraph.
If, in addition, every state of the machine is covered by at least one vertex of the
subgraph, then the subgraph forms a closed covering for that machine.

Examples (for Machine M3):

{(AD),(BE)}
{(AC)}
{(AD),(BE),(CD)}
{(DE), (BC), (AD), (BE)}
{(BC), (AD), (BE)}

neither closed nor covering

closed but not covering
covering but not closed
closed and covering
minimal closed covering

The compatibility graph of above figure contains seven closed subgraphs

[including (AC) alone and the graph itself], six of which form closed coverings for M4.
Compatibility graph itself gives a closed covering but not necessarily minimal.
Now, it is desirable to look for a closed covering which yields a simpler
machine.
Unfortunately, there is no simple, precise procedure leading to the selection of
the minimal closed covering, and trial-and-error technique cannot be avoided
The preceding minimal closed coverings have been obtained by inspecting the
compatibility graph and employing a trail-and-error procedure.
It should be pointed out that NO straightforward systematic procedure to find a
minimal closed covering is known as yet, and a certain amount of search is
unavoidable.
[Note: If a closed subgraph containing the compatible pairs (AB), (BC), (AC) has
been found, the compatible (ABC) can be formed, and so on.]
The triangle {(BC), (AD), (BE)} yields our desired minimal closed covering set,
and hence, minimal machine.
NS, z

PS

I1
I2
I3
I4
(AD)

, 1
, 1

(BC)
,0
,1
/,0
,0
(BE)
,0
,1
,0
/,0
State table of a minimal machine which covers M4
26

Lossless and Lossy machine:

A machine M is said to be (information) lossless if the knowledge of the initial
state, the output sequence and the final state is sufficient to determine uniquely the
input sequence.
A machine that is not lossless is called lossy. For example,
PS
A
B

NS, z
x=0
A,0
B,0

x=1
B,0

If the initial state is A, output sequence is 00 and the final state is B, the input
sequence is either 01 or 10.
A machine is said to be (information) lossless of finite order if the knowledge of
the initial state and the first output symbols is sufficient to determine uniquely the
first input symbol. The integer is called order of losslessness, if is the least integer
satisfying the above definition.

Test for Losslessness:

We have to test whether the following machine is lossless or lossy.
PS
A
B
C
D
E

NS, z
x=0
A,1
E,0
D,0
C,0
B,1

x=1
C,1
B,1
A,0
B,0
A,0

27

We have to form Testing table for this machine. The upper part of the testing table
is output-successor table. For lower part of the table, if at least one at the next entry is
blank, then blank will get priority, otherwise we have to form pair(s).
NS

PS
A
B
C
D
E

z=0

E
(AD)
(BC)
A

z=1
(AC)
B

AC
AD
BC
AE
DE
AB

(AE)(DE)

(AB)(AC)

(AB)(BC)

(AB)(BC)

A machine is lossless if and only if its testing table does not contain any pair
consisting of repeated entry.
As the testing table of this machine does not contain any pair consisting of
repeated entry, this machine is lossless.
To find the order, we have to draw testing graph.
AE

1
0
AD

BC

DE

AB

0
0

AC

If testing graph contains at least one loop, then the machine is of infinite
order.
As the testing graph of this machine contains loop, this machine is lossless of
infinite order.
28

Theorem: A machine is lossless of finite order = l+2 if and only if its testing
graph is loop-free and the length of the largest path in the graph is l.
Example:
NS, z

PS

x=0
A,0
C,0
D,1
B,1

A
B
C
D

x=1
B,0
D,0
C,1
A,1

Testing table:
NS

PS

z=0
(AB)
(CD)

z=1

(CD)
(AB)

AB

(AC)(AD)(BC)
(BD)

CD

AC
AD
BC
BD

A
B
C
D

(AC)(AD)(BC)
(BD)

Testing graph:
AB

0
0

AC

AD

BC

1
CD

As l is 1, order = 1+2 = 3.

29

BD

Inverse Machine:
An inverse machine Mi is a machine which, when excited by the output
sequence of a machine M, produces (as its output) the input sequence to M, after at most
finite delay. Evidently, a deterministic inverse can be constructed only if M is lossless,
and it can be constructed so that it produces Ms input sequence after just a finite delay if
and only if M is lossless of finite order.
Let us take an example. A machine M5 is given as follows:
NS, z
x=0
x=1
A
C,0
D,1
B
D,0
C,1
C
A,0
B,0
D
C,1
D,1
State Table for Machine M5

PS

We can find that the order of losslessness of machine M5 is 3.

Hence we have to form all the possible triplets (S(t),z(t),z(t+1)) for given
machine.
(A,0,0)
(B,0,1)
(C,0,0)
(D,1,0)
(A,1,1)
(B,1,0)
(C,0,1)
(D,1,1)
These eight triplet structure will be our new states of our inverse machine.
Now, we have to find next states and value of x for our inverse machine.
The first entry of triplet structure of NS (Next State) and the value of x are found
as follows:
If PS (Present State ) is (S,O0,O1) then compute as follows:
I0/O0
S

I1/O1
P

I2/O2
Q

where O2 is the value of z in the corresponding column.

Then, the first entry of triplet structure of NS (Next State) will be state P and
value of x will be I0.
The second entry of triplet structure of NS (Next State) is identical to the third
entry of triplet structure of PS (Present State).
30

The third entry of triplet structure of NS (Next State) is identical to the value of z
in the corresponding column.
PS
(A,0,0)
(A,1,1)
(B,0,1)
(B,1,0)
(C,0,0)
(C,0,1)
(D,1,0)
(D,1,1)

NS, x
z=0
z=1
(C,0,0) , 0 (C,0,1) , 0
(D,1,0) , 1 (D,1,1) , 1
(D,1,0) , 0 (D,1,1) , 0
(C,0,0) , 1 (C,0,1) , 1
(A,0,0) , 0 (B,0,1) , 1
(B,1,0) , 1 (A,1,1) , 0
(C,0,0) , 0 (C,0,1) , 0
(D,1,0) , 1 (D,1,1) , 1

State Table for Inverse Machine of machine M5

If we carefully examine the inverse machine we have just derived, we can see that
the 7th row for NS, x entry is exactly same with the 1st row, and, 8th row is exactly same
with the 2nd row. If we denote (A,0,0) by S1 and (A,1,1) by S2, then (D,1,0) will also be
denoted by S1 and (D,1,1) will also be denoted by S2, and, hence, we can obtain the
minimal inverse machine as follows.
PS
S1
S2
S3
S4
S5
S6

NS, x
z=0
S5,0
S1,1
S1,0
S5,1
S1,0
S4,1

31

z=1
S6,0
S2,1
S2,0
S6,1
S2,1
S2,0

Retrieval of an input sequence (for a lossless machine):

Let us consider the following lossless machine:

PS
A
B
C
D
E

NS, z
x=0
A,1
E,0
D,0
C,0
B,1

x=1
C,1
B,1
A,0
B,0
A,0

Let us assume the initial state is A, final state is B and output sequence is
110001100. We have to find the corresponding unique input sequence.

Possible successors to initial state

Output sequence

The state sequence

Input sequence

0
B

A
0

32

D C

C
Possible predecessors to final state

A
A B