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AVANTHIS St.

THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

LAYOUT DESIGN RULES


N- Well
r101
r102
r110

Minimum width
Between wells
Minimum well Area

10
10
144 2

N - Well

Diffusion
r201

Minimum N+ and P+ diffusion width

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
1

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

N+ Diff

r202

Between two P+ and N+ diffusions

r 202

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
2

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

r203

Extra N-well after P+ diffusion

6
r 203

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
3

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

r204

Between N+ diffusion and n-well

6
N+ Diff

r210

Minimum diffusion area

162

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
4

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

N+ Diff

Polysilicon
r301

Polysilicon Width

2
Polysilicon

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
5

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

r302

Polysilicon gate on Diffusion

2
Polysilicon

r307

Extra Polysilicon surrounding Diffusion 3


Polysilicon

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
6

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

r304

Between two Polysilicon boxes

3
r 304

Contact
r401

Contact width

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
7

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

r 401

r403

Extra diffusion surrounding contact

r 403

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
8

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

r404

Extra Poly surrounding contact

1
r 404

r405

Extra metal surrounding contact

1
r 405

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
9

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

Metal
r501

Between two Metals

4
r 501

r510

Minimum Metal area

162

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
10

AVANTHIS St.THERESSA
INSTITUTE OF ENGINEERING & TECHNOLOGY
GARIVIDI-535101, VIZIANAGARAM DISTRICT, ANDHRA PRADESH STATE

Metal 6

Instruction Sheet for VLSI Design Lab


Prepared by K.VenuGopal, Asst.Proff, ECE Dept
11

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