ADVANCED MICROPROCESSOR

AND INTERFACING
UNIT-I
Q.1 (a) Explain REP prefix with suitable examples.
(b) Explain the pipeline Architecture of 8086 with suitable diagram
(c) Find out the largest no. from an unordered array of eight 16-bit
numbers stored sequentially in the memory locations starting at
offset 0500 H in the segment 2000 H.
(d) Write a program to SCAN a word specified in Register AX from
memory location pointed by ES: DI:: 2000: 0500 H.
Q.1 Why instruction queue is not more than six byte ?
(b) Explain the architecture of 8086. Microprocessor 8086 is called
parallel processor, justify.
(c) What do you mean by addressing mode? Discuss in detail the
various addressing modes of 8086 with examples.
(d) Describe the following instruction of 8086 with example:
(i) XLAT
(ii) IN and OUT
(iii)LAHF and SAHF
(iv)PUSHF and POPF
Q.1 (a)What is Physical address corresponding to 93FEH:3029H?
(b) How pipelined architecture is implemented in 8086.
(c) What are different addressing mode supported by 8086?
Explain each of there with suitable example.
(d) Bring out the different between Jump Loop instruction.
Q.1(a) Draw & label the flag resister organization of Intel 8086. 2

(b) (i) What are the different addressing modes supported by 8086?
4

Give one example for each of them.

(ii)Explain the following instruction sets:
(i)
(ii)
(iii)
(iv)

PUSH
XCHG
LEA
ROL

(c) IF [BX] = 0158H Displacement=11357H [D|]=10A5H

(DS)=2100H And DS is used as segment resistor then calculate
EA and PA produced for all various addressing mode.

(d) Write a program to find out the no of ever and odd no. from a
7

given series of 16-bits hexadecimal number.

Q.1 (a) Explain the function of REP prefix.

(b) Explain the pipelined Architecture of 8086 with block diagram?

How it is implemented in 8086
(c) Explain the following function of 8086:
(i)

TEST

(ii)

DEN

(iii)

LOCK

(iv)

BHE

(v)

RQ
|
S0

(vi)
(vii)

&

S3

A0

&Q

&

S1

S4

(d) Write an assembly language program to scan a string word

specified in Register AX from Memory Space of 8086 ? The string
is pointed by ES: DI by 2000: 0500 H.

Q.1 (a) What basic difference did you find between 8085 and 8086
processors?

(b) Explain the working of bus interface unit 8086. What are the
role of segment register and instruction pointer?

(c) identify the addressing modes used for the source and
destination operands in the following instructions.

Justify your answer:

(i)
(ii)
(iii)
(iv)
(v)
(vi)
(vii)

MOV
MOV
MOV
MOV
MOV
MOV
AAA

[SI] , BX
[SI] , DI
AL, BX
[DI] +PQ , CX
[BX] [DX] + xy, CL
[BX] +PQR, DX

(d) Write a program to find out the number of even and odd
numbers from a series of 16 bits hexadecimal numbers.Assume
any 10 hexadecimal numbers
Q.1. (a) What is the physical address corresponding to DS: 103FH if
DS: 94 D0H?

(b) Discuss the pipeline architecture of 8086 microprocessor.

(c) Explain the function of following signals of 8086:

(i)
(ii)
(iii)
(iv)
(v)
(vi)
(vii)

ALE
DT/R
LOCK
TEST
MN/MX
RQ/GT
QS0,QS1

(d) Explain the concept of segmented memory? What are its

advantages?

UNIT-II

Q.2 (a) Explain the two main difference between 8086 & 8088
2

processor.

(b) Draw and discuss a typical maximum mode 8086 system. What
is the use of bus controller in maximum mode?
(c) Interface two 4K

8 EPROMS & two 4K

8 RAM chips with

8086. Select suitable maps?

(d) Define the structure of Interrupt Vector table of 8086. What is

the main difference between maskable & non maskable
7

interrupts?
UNIT-III
Q.3 (a) What is the main difference between 8259 & 8259 A

interrupt priority controller?

(b) Interface ADC 0808 with 8086 using 8255 ports. Use port A of
8255 for transferring digital data output of ADC to the CPU and
port C for control signals. Assume that an analog input is
present at i/p 2 of the ADC and a clock input of suitable
frequency is available for ADC. Draw the schematic & write
7

required ALP.

(c) Explain architecture & functioning of 8257 DMA controller. 7

(d) Design a programmable timer using 8253 and 8086? Interface
8253 at an address 0040 H for counter O and write the ALP to
generate a square wave of period 1 ms. The 8086 and 8253 run
at 6 MHz and 1.5 MHz respectively.

UNIT-IV
Q.4 (a) How role of segment register becomes change when
processor switched from real mode to protected mode?

(b) Explain all the descriptors in 80386.

(c) The following 80386 program instruction are used to set up a

protected mode code segment. Answer the following question
about this prog. & memory segment.

(i)
(ii)
(iii)
(iv)
(v)
(vi)
(vii)

Is it a global or local descriptor table?

What is the 32 bit base add of this table?
What is the staring & ending add of this segment?
What is the DPL (Descriptor Privilege Level)?
Is the segment read only or read/write?
Is the segment is from main memory or secondary memory.
Code segment is executable or not?

(d) What do you mean by Paging? How do we calculate the physical

7

add of any page?

UNIT-V
Q.5 (a) What is the advantage of 8089 IOP?

(b) Explain the exceptions of 8087 (NDP).

(c) Explain the Architecture of 8089 (IOP) & interface it with 8086.
7
(d) Write a procedure to calculate the volume of sphere using the
MASM syntax (8087).
328613 (28) B.E. (6th Semester)

Examination, April-May., 2011

Branch: AEI, EEE, EI, Et & T
ADVANCED MICROPROCESSOR AND INTERFACING
Time allowed: Three hours
Maximum Marks: 80

Minimum Marks: 28

Note: Attempt all questions, all questions carry equal marks. Part
(a) of each question is compulsory. Attempt any two parts from (b),
(c) and (d) of each question. All parts of solution must be done
strictly at one place. Draw diagram wherever necessary.
Q.2 (a) What are the different pins avablable in maximum mode of
2

8086?
(b) Explain interrupt structure of 8086 in detail with interrupt

vector table.

(c) Draw and discuss read & write timing diagram with one wait
7

state of 8086 in MIN mode.

(d) Connect a 32 KB RAM with 8086 using an absolute decoding

with suitable address.
Q.3 (a) What is difference between 8259 and 8259 A?

(b) Interface ADC 0808 with 8086 using 8255 ports.Use Port A of
8255 for transferring digital data output of ADC to the CPU and
port C for control signal.Assume that an analog input is present at
I
P2

of suitable frequency is available for ADC.Draw the schematic

and write required ALP.

(c) Explain initialization sequence of 8259A.

(d) Explain internal structure of 8257 DMA controller in detail. Why

DMA controller data are faster?
Q.4 (a) Draw the flag arrangement for 80386.

7
2

(b) Explain the CISC and RISC processor in detail.

(c) Explain:

(i) Segment descriptor Register.

(ii) Contro; register of 80386.
(d) Explain memory management unit of 80386. What do you mean
7

by paging?
Q.5 (a) Explain multiprocessor system.

(b) Draw and discuss the internal architecture of NDP 8087 in

7

detail.
(c) Discuss communication between IOP 8089 & 8086.

(d) Write a brief on exception handling in 8087.

328613 (28) B.E. (6th Semester)

Examination, April May 2010
Branch: AEI, EEE, EI, Et & T
ADVANCED MICROPROCESSOR AND INTERFACING
Time allowed: Three hours
Maximum Marks: 80

Minimum Marks: 28

Note : (i) Part (a) is compulsory & solve any two Parts from(b), (c) &
(d).
(ii) Part (a) is of 2 marks each & Part (b) , (c) & (d) are of 7
marks.

Q.2 (a) what are the interrupt vector address following interrupts.
(i)
(ii)

INTO
INT 2 OH

(b) Draw & discuss typical maximum mode of 8086 system.

(c) Bring out the difference between 8086 & 8088.

(d) Interface two 4k 8 RAM chips with 8086. Select suitable maps.
7
Q.3 (a) Write a control word format & bit definitions of 8251.

(b) Explain the internal architecture of 8259 also draw the same.7
(c) Explain the following terms in relation 8279.

(i) Two key lock out.

(ii) N-Key roll over.
(iii)Right entry.
(iv)Left Entry.
(d) Interface DCA 0808 with 8086 using 8259 parts. Draw the
schematic & write All to generate triangular wave of frequency
500Hz .8086 system operates at 8 MHz. The amplitude of
triangular wave should be + 5V.

Q.4 (a) Explain the function of D/C signal for 80386.

(b) Draw & discuss register of 80486 in detail.

(c) What do you mean by descriptor table? Discuss different

descriptor types supported by 80386.

(d) Explain CISC & RISC processor in detail.

Q.5. (a) Discuss the function of following signals of 8087.

(i)
(ii)

INT
BUSY

(b) Write a brief on exception handling in 8087.

(c) Discuss the following bus arbitration strategies.

(i)
(ii)
(iii)

Polling.
Daisy Chain
Independent bus request scheme.

(d) What is the difference between closely coupled & lossely

Coupled system? What are the relative advantage &
disadvantages.
328613 (28) B.E. (6th Semester)

Examination, Nov-Dec., 2009

Branch: AEI, EEE, EI, Et & T
ADVANCED MICROPROCESSOR AND INTERFACING
Time allowed: Three hours
Maximum Marks: 80

Minimum Marks: 28

Note: Attempt all five questions all question carry equal marks
.Parts (a) of each question is compulsory. Attempt any two parts
from (b,c,d,) each. Question. All parts of solution must be done
strictly at one place. Draw diagram wherever necessary.
Q.2 (a) What bar the different pins available in maximum mode of
2

8086?
(b) Draw and explain the typical system bus architecture of
8086.What is the maximum memory addressing and I/O
addressing capability of 8086 ?

(c) Describe an interrupt request response of an 8086 system. 7

(d) Interface 16 K bytes of EPROM memory to 8086 in minimum
mode with starting address 10000 H.
Q.3 (a) Explain the Function of the following pins of 8259A:
(i)
(ii)

CA

S0

-CA

7
2

S2

Sp / EN

(b) Explain the initialization sequence of 8259A.

(c) Draw and discuss the architecture of 8257.

(d) Design a programmable timer using 8253 and 8086.Interface

8253 at an address 0040H for counter 0 and write the ALP to
generate a square wave of period 1 ms.

Q.4 (a) Draw the Flag arrangement for 80386.

(b) Enlist the salient features of 80386.

(c) Draw and discuss internal architecture of 80386 in details. 7

(d) Write a short note on : (Any 2)

(i)
(ii)
(iii)

Data type supported by 80386.

Virtual mode
Cache maintenance operations.

Q.5 (a) Write down the features of 8087 NDP.

(b)Draw and explain the architecture of NDP 8087.

(c) Write a short note on NDPs Data types.

(d) Write a note on: (Any 2)

(i)
(ii)
(iii)

Pipe line concept.

Segmentation
Stack
328613 (28) B.E. (6th Semester)
Examination, april-may 2009
Branch: AEI, EEE, EI, Et & T

ADVANCED MICROPROCESSOR AND INTERFACING

Time allowed: Three hours
Maximum Marks: 80

Minimum Marks: 28

Note : Part (a) eachunit is compulsory. Attempt any two parts from
b, c and d.
Unit I
Unit II
Q.2 (a) Explain the difference between 8086 and 8088 Micro
2

processor?

(b) Draw & discuss the 8086 in maximum mode with interfacing
diagram & timing diagram.
(c) Interface two 4K

EPROMs and two 4

8086 & select suitable maps.

The add Range are defined.

k 8

RAM chips with

7

EPROM FEOOO H to FFFFFH

RAM FCOOO H to FDFFFH
(d) Explain the interrupt structure of 8086? Explain its generation
7

& response sequence.

Unit III

Q.3 (a) What is main difference between 8259 & 8259 A? 2

(b) Explain the following trems in relation to 8259 v?
(i)
(ii)
(iii)
(iv)
(v)

EOI
Automatic Rotation
Automatic EOI
Specific Rotation
Specially fully nested mode

(c) Explain the internal Architecture of 8257 DMA Controller in

detail ?Why are DMA Controller data transfer faster ?

(d) Explain the following signal description of 8251 ?

(i)

C| D

(ii)

T C

&T D

(iii)

R C

&R D

(iv)

DTR

(v)

RTS

7
Unit IV

Q.4 (a) How role becomes change of segment register when

Processor Switched from Real Mode to Protected Mode .

(b) Explain the Architecture of 80386 Processor in terms of BIU,

CPU, & MMU ?

(c) Explain the use of each of the following Special Register of 80386
&
(i)
(ii)
(iii)

Debug & Test Register

System Address Register
Control Register.

(d) The following Program Instructions are used to set up a

7

Protected mode Code segment.

MOV AX, 0005H
Lldt AX
MOV AX, 0017H
MOV CS, Ay
The content of descriptor table are given (eight-byte entry)

(i)

(ii)
(iii)
(iv)
(v)

It is a global or local descriptor table?

What is the 32 bit base address of this table?
What is the Starting & Ending address of this table?
How large the Memory Segment?
What is the descriptor Privilege Level (DPL) ? Is this

segment executable?
(vi) Is the segment read only or read/write?
(vii) Which descriptor is identified?
Unit V
Q.5 (a) Explain the difference between 8087 & 8089 coprocessor.
2
(b) Explain the internal architecture of 8087 in detail.

(c) Discuss the Communication between IOP 8089 & the CPU
7

8086?

(d) Write a Procedure to calculate the volume of sphere using MASM

syntax (8087).
328613 (28) B.E. (6th Semester)

Examination, Nov-Dec., 2008

Branch: AEI, EEE, EI, Et & T
ADVANCED MICROPROCESSOR AND INTERFACING
Time allowed: Three hours
Maximum Marks: 80

Minimum Marks: 28

Note : (i) All question carry equal marks

(ii) Part (a) of each question is compulsory
(iii) Attempt any two part (b), (c) and (d).
Unit I
7

Unit II

S
Q.2 (a) Explain the signal S . 0 of 8088.

2
(b) Draw and Discuss typical maximum mode 8086 system. What is
the use of a bus controller in Maximum Mode?

(c) Draw and discuss the read and write cycle timing diagram of
8086 in minimum mode.
(d) Explain the structure of interrupt vector table of using What are
the interrupt vector addresses of the following interrupts in 8086
7

IVT?
(i)
(ii)
(iii)
(iv)

INTO
NMI
INT 20 H
INT 50
Unit III

Q.3 (a) Write control word format and bit definitions of IC 8253.2
(b) Interface ADC 0808 with 8086 using ports. Use port A of 8255
for transferring digital data output of ADC to the CPU and port
C for control signal Assume that an analog input is present at

I/

P2

of the ADC and a clock input of suitable frequency is

available for ADC . Draw the schematic and write required Alp.
7
(c) Desing an interface between 8086 Cpu and two chips of 16K

8 Ram. Select the starting address of EPROM suitably. The Ram

address must start at 00000I I.

(d) What is the advantages of DMA controlled data transfer over

interrupt driven or program controlled data transfer?
Why are DMA controlled data transfer faster?

Explain the functions signals of 8257:

(i)
(ii)
(iii)
(iv)

FOR
AEM
HRQ
ADSTB
Unit IV

Q.4 (a) What do you mean by exception? How is it Different from

interrupt service routine execution operation?

(b) Discuss the architecture of 80386 and explain the function of

7

each unit.
(c) Differentiate between real mode, virtual mode and protected

mode of 8086.

(d) Explain in brief descriptor table and semaphore operation with

7

example.
Unit V
Q.5 (a) what do you understand by a multiprocessor system?

(b) Discuss Communication between IOP 8089 & the CPU 8086?7
(c) What is the difference between a closely coupled and a loosly
coupled system? What are the relative advantages and
disadvantages?

(d) Write a procedure to calculate the volume of sphere using MASM

7

syntax (8087).

328613 (28) B.E. (6th Semester)

Examination, April-may

2008

Branch: AEI, EEE, EI, Et & T

ADVANCED MICROPROCESSOR AND INTERFACING
Time allowed: Three hours
Maximum Marks: 80

Minimum Marks: 28

Note: Part (a) of every question is compulsory. Solve any two parts
from remaining three parts of question.
Assume suitable data whenever necessary.
7
Q.2. (a) Why 8086 microprocessor is not having any opcode fetch
cycle?

(b) Explain the internal structure of 8086 in detail with interrupt

vector table ?

(c) Explain in detail why 8086 microprocessor takes two machine

cycle to read the data from odd memory address.

(d) Interface 64 K word memory with 8086. Microprocessor

Available chips are:
(i)

16. 84 Nos.

(ii)

32 82 Nos.

Q.3 (a) Interrupt achonoledge cycle is not generated for D?

(b) Explain the functions of the following signal of 82.

(i)
(ii)

TC
ADSTB

(iii)
(iv)
(v)

MARK
HRQ & HLDA
AEN.

(c) Draw the interfacing diagram of 8259 with 8056.assuming 02

nos. slave are available.
(d) Draw & discuss the internal architecture of 8256?

7
7

Q.4. (a) 80386 Microprocessor is highly pipeline as compared wit

8086 microprocessor?

(b) Explain the memory management unit of 80386. What to you

mean by Paging.
(c) Explain the CISC & RISC processor in detail .

7
7

(d) Explain the use of each of the following registers of 80386: 7

(i)
(ii)
(iii)

segment descriptor register

control register
debug & test register

Q.5 (a) How 8086 microprocessor differentiate between 8086

instructions and 8087 instructions?

(b) Draw and discuss the communication between 8087 & CPU
8086.

(c) Write an assembly language program to determine the square

root of given number using 8087 coprocessor:
(d) Draw & discuss the internal architecture of 8089 (IOP)?

7
7