WORK INSTRUCTION

ISO REF. 7.5.1

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

1. Experiment No.:

EC (EE) 391/01

2. Name of the Experiment:

Study of Ripple and Regulation characteristics of full wave

rectifier with and without capacitor filter

3. Objective of the Experiment:

To study of ripple and regulation characteristics of full wave

rectifier without and with capacitor filter

4. Working Principle:
Full Wave Rectifier (Without filter): CENTERTAP RECTIFIER:

Title:
Analog & Digital
Electronic Circuit Lab

Prepared by:
SIC(s)
S.Mukherjee

Approved
by: HOD
Dr. A. Sil

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
1 of 10

WORK INSTRUCTION

ISO REF. 7.5.1

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

Ripple factor:

Regulation:
The regulation indicates how D.C voltage varies as a function of load current. The percentage of
regulation is defined as

Title:
Analog & Digital
Electronic Circuit Lab

Prepared by:
SIC(s)
S.Mukherjee

Approved
by: HOD
Dr. A. Sil

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
2 of 10

WORK INSTRUCTION

ISO REF. 7.5.1

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

Ratio of rectification:

Title:
Analog & Digital
Electronic Circuit Lab

Prepared by:
SIC(s)
S.Mukherjee

Approved
by: HOD
Dr. A. Sil

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
3 of 10

WORK INSTRUCTION

ISO REF. 7.5.1

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

Full Wave Rectifier (With filter):

Here Xf should be smaller than RL . Because, current should pass through C and C should get
charge. If C value is very small, Xe will be large and hence current flows through R only and no
filtering action takes place. During +ve half cycle for a H W R circuit, with C filter, C gets
charged when the diode is conducting and gets discharged (when the diode is not conducting)
through RL. When the input voltage e = Em Sin rot is greater than the capacitor voltage, C gets
charged. When the input voltage is less than that of the capacitor voltage, C will discharge
through RL. The stored energy in the capacitor maintains the load voltage at a high value for a
long period. The diode conducts only for a short interval of high current. The waveforms are as
shown in Fig. .Capacitor opposes sudden fluctuations in voltage across it. So the ripple voltage is
minimized.

Title:
Analog & Digital
Electronic Circuit Lab

Prepared by:
SIC(s)
S.Mukherjee

Approved
by: HOD
Dr. A. Sil

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
4 of 10

WORK INSTRUCTION

ISO REF. 7.5.1

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

Center tap rectifier

Out put wave form

Title:
Analog & Digital
Electronic Circuit Lab

Prepared by:
SIC(s)
S.Mukherjee

Approved
by: HOD
Dr. A. Sil

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
5 of 10

WORK INSTRUCTION

ISO REF. 7.5.1

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

RIPPLE FACTOR FOR CAPACITOR FILTER:

Initially, the capacitor charges to the peak value V when the diode 0\ is conducting. When the
capacitor voltage is equal to the input voltage, the diode stops conduct or the current through the
diode 01 is zero. Now the capacitor starts discharging through RL depending upon the time
constant C.RL.Therefore, RL value is large. Rate of charging is different from rate of discharging.
When the voltage across the capacitor falls below the input voltage and when the diode 02 is
forward biased, the capacitor will again charge to the peak value Vm and the current through D2
becomes zero when Vc =Vm. Thus the diodes 01 and 02 conduct for a very short period 81 to 82
and 1t + 8 I to 1t + 82 respectively

OUT PUT WAVEFORM

Title:
Analog & Digital
Electronic Circuit Lab

Prepared by:
SIC(s)
S.Mukherjee

Approved
by: HOD
Dr. A. Sil

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
6 of 10

WORK INSTRUCTION

Title:
Analog & Digital
Electronic Circuit Lab

ISO REF. 7.5.1

Prepared by:
SIC(s)
S.Mukherjee

Approved
by: HOD
Dr. A. Sil

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
7 of 10

WORK INSTRUCTION

ISO REF. 7.5.1

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

5. Apparatus / Instruments Required:

Sl. No.

Item

Qty.

Makers Name

Range

6. Procedure for conducting the Experiment

i. Make the circuits as shown in figures.
ii. Full wave centre tap and full wave bridge rectifier (with & without filter for
each case).
iii. Connect the input & output terminals in dual trace CRO and observe the
waveforms. Now measure and record the output voltages and current Vdc, Vac,
and Idc and also record the input voltage Vrms from the secondary side of
transformer in loaded condition.
6.1. Circuit Diagrams
Without Filter:

D1

Vd
230V A.C
Supply

Vrms
Vrms

Rl

D2
Transformer
N.B. Full Wave Rectifier the transformer secondary must be centre tapped
Fig 1
With Filter:

Fig 2: Center tap rectifier

Title:
Analog & Digital
Electronic Circuit Lab

Prepared by:
SIC(s)
S.Mukherjee

Approved
by: HOD
Dr. A. Sil

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
8 of 10

WORK INSTRUCTION

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

ISO REF. 7.5.1

6.2. Results:
Table 1:
Types of
Rectifier

V rms
volts

Vm=2
Vrms
In
Volt

Vdc
Volt
(theo)

Volt
(prac)

Idc

Vac
(Volts)

Ripple Factor

(mA)
theoretical

Full Wave
Centre tap

Ratio of Rectification
theoretical

practical
Vac/Vdc

0.48

2Vm/

Practical
Iac2 RL /
Irms2(RL+Rf)

.81

Table 2:
Percentage Error
Type of
rectifier

Output
Voltage

Rectification
Factor

Ripple Factor

Full Wave
Centre Tap

Table 3:
Sl.
No.

VFL(volt)

VNL(volt)

IL(mA)

% of voltage regulation
VNL-VFL/VFL*100%

7. Safety Precautions:
iv. Do not wear loose garments inside the laboratory.
v. Do not enter in the laboratory with the bare foots.
vi. Do not switch ON the circuits without permission of the concerned teacher.
vii. Do not touch the circuit haphazardly.
viii. Make sure that the circuit is switched OFF before leaving the laboratory.
8. Instructions for Writing the Report:
9
9
9
9

Title:
Analog & Digital
Electronic Circuit Lab

Attach the rough sheet with the final report.

The 1st Page of the report shall be as per the format shown in Annexure 1.
Write the final report as per the work instruction.
Draw the output voltage wave form as observed from CRO.

Prepared by:
SIC(s)
S.Mukherjee

Approved
by: HOD
Dr. A. Sil

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
9 of 10

WORK INSTRUCTION

NEOTIA INSTITUTE OF TECHNOLOGY,

MANAGEMENT AND SCIENCE

ISO REF. 7.5.1

ANNEXURE 1

NAME: ___________________________________________________________
ROLL NO.:_____________

DEPARTMENT: _____________________

DATE OF SUBMISSION: _________

DATE OF EXPERIMENT: _______

CO-WORKERS
NAME

ROLL NO.

1._______________________________

_________________

2._______________________________

_________________

3._______________________________

_________________

4._______________________________

_________________

TITLE:________________________________________________________________________
________________________________________________________________________
OBJECTIVE:

________________
Marks Obtained

Title:
Analog & Digital
Electronic Circuit Lab

Prepared by:
SIC(s)
S.Mukherjee

_________________
Signature of the
Sessional in - charge

Approved
by: HOD
Dr. A. Sil

Doc No.

Issue
No.

Revision
No.

Effective
Date

WI/EC(EE)391/01

01

00

17/07/12

Page
10 of
10