ISSCC 2016 / SESSION 22 / SYSTEM AND INSTRUMENTS FOR HUMAN-MACHINE INTERFACES / 22.

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22.4

A 172W Compressive Sampling

Photoplethysmographic Readout with Embedded
Direct Heart-Rate and Variability Extraction from
Compressively Sampled Data

Pamula Venkata Rajesh1,2, Jose Manuel Valero-Sarmiento3,

Long Yan1, Alper Bozkurt3, Chris Van Hoof1,2, Nick Van Helleputte1,
Refet Firat Yazicioglu1, Marian Verhelst2
imec, Leuven, Belgium, 2KU Leuven, Leuven, Belgium,
North Carolina State University, Raleigh, NC

1
3

Heart rate (HR) and its variability (HRV) provide critical information about an
individuals cardiovascular and mental health state. In either application, longterm observation is crucial to arrive at conclusive decisions and provide useful
diagnostic feedback [1]. Photoplethysmographic (PPG) estimation of HR and HRV
has emerged as an attractive alternative to ECG, as it provides electrode-free
operation increasing patient comfort. However, PPG monitoring systems robust
to low ambient light conditions and low perfusion conditions require a LED as a
light source, which strongly dominates the power consumption of the complete
system. Compressive sampling (CS) based PPG readouts promise to mitigate this
LED power consumption [2], yet require large computational power to recover
the signal, hindering real-time embedded processing on energy-scarce wearable
devices. This paper presents a fully integrated, low-power PPG readout ASIC,
completely integrating a single-channel readout front-end (AFE) and a 12b SAR
ADC and a digital back-end (DBE) for embedded energy-efficient real-time
information extraction, that advances the state-of-the-art on the following fronts:
1) By smartly duty-cycling all system components synchronously on a sparse
non-uniform CS sampling pulse stream, the LED driver power is reduced up to
30x, without significant loss of information. 2) Moreover, the necessity of wireless
off-loading, or for computationally intensive embedded signal reconstruction, is
circumvented by enabling the direct extraction of HR and HRV information from
the compressed data in real-time on the ASIC, while consuming only 172W for
the complete system.
Figure 22.4.1 shows the architecture of the developed PPG acquisition system.
In a conventional acquisition system, the signal is sampled uniformly at a
frequency fs,N. The LED driver is synchronized with the sampling clock and has a
duty cycle (D) of TON fs,N, which determines its power consumption for a given
drive current (ILED). The minimum value of the LED on time, TON is set by the
bandwidth of the front-end and the settling requirements, limiting the minimum
achievable power consumption. However, since the PPG signal is sparse in the
frequency domain, CS can enable a strong reduction of the LED duty cycle by
non-uniformly sub-sampling the signal [2]. This strongly reduces the average
sampling frequency fs,CS, proportionally reducing D and hence the LED driver
power consumption. The challenge here however lies in the required tight
synchronization of all system components, which is achieved in our ASIC
implementation by fully integrating the AFE, ADC and a DBE, all controlled by the
non-uniform pulse generator for maximal power savings.
Figure 22.4.2 shows the architecture of the fully integrated AFE that includes a
transimpedance amplifier (TIA) with programmable gain as the first stage followed
by switched integrator (SI). Both TIA and SI use a two-stage Miller compensated
OTA with resistive and switched-capacitor feedback, respectively. The nmos active
load in the first stage is degenerated to minimize its noise contribution. Since the
PPG signal, measured as the current at the AFE input, is characterized by a large
static component and relatively small pulsatile component (AC) (typically 1%-4%
of the static component), a 5b current DAC (IDAC), capable of sourcing up to
10A of current, removes the static component of the photocurrent at the TIA
input, thereby improving the channel dynamic range. The output of the TIA is
integrated on to a SI with programmable feedback capacitor to provide further
gain programmability and limit the noise aliasing, thereby improving the SNR.
Both TIA and SI are enabled with an optional power-down mode to turn them off
between successive sampling instants to further reduce power consumption. A
mixed-signal feedback loop, comprised of a switched-capacitor low-pass filter
(SC-LPF), comparators and an up-down counter, tracks the output DC level of
the SI. A 5b control code, to control the LED drive current, is generated by the
feedback loop such that the DC output of the SI stays within the threshold values
(Vrefmin and Vrefmax). A 12b SAR ADC samples the output of the SI at non-uniform
sampling instants as defined by the DBE for further digital processing. An
integrated sub-1V bandgap reference provides the necessary analog bias voltages
and currents.

386

2016 IEEE International Solid-State Circuits Conference

A fully integrated DBE (Fig. 22.4.3) generates the control signals required for LED
driver, AFE and the ADC and processes the CS data to extract HR and HRV. The
non-uniform sampling instants corresponding to each compression ratio (CR)
are stored in a lookup table (LUT) and are accessed at run-time for control-signal
generation. A DMA transfers the incoming data from the ADC output into one of
the two 512x12b banks of the data memory (DMEM) in a ping-pong manner.
Every 4s, the feature extraction unit (FEU) is woken up to perform direct HR and
HRV analysis on the buffered data, using Lomb-Scargle Periodogram (LSP) for
least squares spectral estimation in the compressed domain. The resulting output
spectrogram reveals the average HR over a period of 4s without preceding signal
reconstruction. For efficient execution, an 8-way multiply-accumulator (Fig.
22.4.3) is implemented to accelerate the modified fixed-point 64-bin LSP. A
frequency range of 0.5-to-3.5Hz is covered for the spectral estimation with a
resolution of 0.047Hz, thereby covering a range of 30-to-210bpm in HR with a
resolution of 3bpm, conforming to the ANSI-AAMI standards for heart rate meters.
A linear search is performed on the power spectral density (PSD) obtained from
the LSP to determine the peak, which is further processed to extract the average
HR over the current 4s interval. HRV is obtained by monitoring the variation in
the HR over consecutive 4s intervals.
To characterize the ASIC, an external LED is modulated by a sine wave of
frequency 1.2Hz (corresponding to 72bpm) to mimic a PPG signal (since PPG
signals are extremely sparse on frequency basis [2]) and the resulting
photocurrent is acquired for CRs of 8x and 30x (bottom of Fig. 22.4.4.), validating
the timing controller of the DBE. Thanks to the presence of IDAC and autonomous
mixed-signal feedback loop, the AFE can recover from channel saturation in the
event of increased optical coupling (for example due to motion) (top of Fig.
22.4.4.). To characterize feature extraction performance of the DBE, the frequency
of the sine wave is swept from 0.5-to-3.4Hz and the feature extraction is
performed at 8x, 10x and 30x CRs. Figure 22.4.5 shows the extracted HR has a
worst-case error of 10bpm at 30x compression for a nominal HR of 96bpm, which
is conformant to ANSI-AAMI accuracy specifications. An in-vivo acquisition of
PPG is performed with uniform sampling, through transmission pulseoximetry
on the index finger (bottom left of Fig. 22.4.5, low pass filtered with 5Hz BW) and
the power breakdown for different CRs is shown in Fig. 22.4.5. It can be seen that
at higher CRs, the AFE power dominates the system power consumption, which
is fundamentally limited due to the noise requirements.
Figure 22.4.7 shows the die micrograph of the ASIC, implemented in a 0.18m
CMOS process, which measures 4mm2.5mm. Compared to the state-of-the art
(Fig. 22.4.6), the presented ASIC implements CS to reduce the relative LED power
consumption up to 30X (from 1200W to 43W), while retaining relevant signal
information. Moreover, it integrates a full DBE capable of extracting HR and HRV
directly from the CS data with minimum power penalty (7.2W), hence avoiding
the energy penalty of wireless transmission and/or embedded signal
reconstruction. This unique combination of a fully-integrated non-uniformly
sampled PPG readout, with embedded information extraction from CS data paves
the way towards truly autonomous low-power PPG-based HR and HRV analyzers
for personal medical care.
Acknowledgements:
J.M.V.S. and A.B. thank NSF NERC ASSIST (EEC-1160483) for partial funding.
References:
[1] J. Wijsman et al., Towards Mental Stress Detection Using Wearable
Physiological Sensors, IEEE EMBS, pp. 1798-1801, 2011.
[2] V. R. Pamula et al., Computationally-Efficient Compressive Sampling for LowPower Pulseoximeter System, IEEE Trans. BioCAS, pp. 69-72, Oct. 2014.
[3] M. Tavakoli et al., An ultra-low-power pulse oximeter implemented with an
energy-efficient transimpedance amplifier, IEEE Trans. BioCAS, vol. 4, no. 1, pp.
27-38, Feb. 2010.
[4] M. Alhawari et al., A 0.5V <4W CMOS Photoplethysmographic Heart-Rate
Sensor IC Based on a Non-Uniform Quantizer, ISSCC Dig. Tech. Papers, pp. 384385, Feb. 2013.
[5] A.Wong et al., A low-power CMOS front-end for photoplethysmographic
signal acquisition with robust DC photocurrent rejection, IEEE Trans. BioCAS,
vol. 2, no. 4, pp. 280-288, Dec. 2008.
[6] E. S. Winokur et al., A low-power Dual-Wavelength Photoplethysmogram
(PPG) SoC with Time-Varying Interferer Removal, IEEE Trans. BioCAS, vol. 9,
no. 4, pp. 581-589, Aug. 2015.

978-1-4673-9467-3/16/$31.00 2016 IEEE

ISSCC 2016 / February 3, 2016 / 10:15 AM

Figure 22.4.1: System overview of the compressive sampling (CS) based PPG
readout for heart rate and variability monitoring. The implemented ASIC
supports uniform sampling mode (1x) along with 8x, 10x and 30x non-uniform
sampling compression modes.

Figure 22.4.2: Architecture of the Analog Front End and detailed schematic of
the OTA used in TIA and SI.

Figure 22.4.3: (Top) High-level block diagram of the Digital Back End with
timing controller. (Bottom) Overview of the feature extraction unit.

Figure 22.4.4: (Top) Measured channel saturation recovery using a sinusoidal

input and (Bottom) the measured AFE output with 8x compression (left) and 30x
compression (right).

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Figure 22.4.5: (Top) Measured heart rate from the ASIC with the input frequency
swept from 0.5Hz-to-3.4Hz and (Bottom) the measured PPG signal through
transmission pulseoximetry (left) and the measured power breakdown of the
ASIC and off-chip LED driver for different CRs (right).

Figure 22.4.6: Comparison of the implemented ASIC with the state-of-the-art.

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Figure 22.4.7: Chip micrograph of the PPG ASIC with Integrated Feature
Extraction (4mm 2.5mm).

2016 IEEE International Solid-State Circuits Conference

978-1-4673-9467-3/16/$31.00 2016 IEEE