Subthreshold CMOS Circuits

http://www.eng.yale.edu/pjk/EESrProj_02/l
uckenbill_html/node5.html
While the implementation of the sum-product algorithm as an analog circuit may
seem difficult, recall from section 4 that the marginalization steps consist entirely
of multiplication and addition, hence the name of algorithm:

This type of calculation maps naturally into analog circuitry if we are provided the
correct building blocks.
Addition of currents in analog circuits is particularly elegant. Kirchhoff's current
law states the sum of currents into a node is zero, and so a current adder is simply a
short of one wire to another. On the other hand, building analog CMOS circuits
that perform multiplication is difficult. In the normal operating regions of a MOS
transistor, the saturation current increases as the square of its gate voltage, and
quadratic functions do not lend themselves to multiplication.
Traditionally, multipliers are built by combining elements that respond
exponentially and logarithmically to their inputs. In his multiplier circuit, Gilbert
showed that bipolar transistors could be used as the exponential elements and
logarithmic circuits could be formed from diode-connected transistors. This project
uses MOS transistors in their subthreshold operating region to achieve the same
type of exponential response.

Subthreshold MOS Transistors

In an MOS transistor, the amount of current flowing from source to drain is
controlled by an electric field from an applied voltage at the transistor's gate. The
electric field attracts charge carriers from either side of the channel at the source
and drain, forming a thin conductive layer between them. A higher voltage and
stronger electric field translates to more current flowing through the transistor.
In a semiconductor, there are two modes by which current can flow: diffusion and
drift. Diffusion is the natural flow of particles from higher to lower concentration,
and drift is the flow of particles subject to an applied force. In the subthreshold

region of a MOS transistor, the flow of current from source to drain is due to
diffusion [14]. Diffusion current in a MOS transistor is given by:
(5)

where W is the channel width, D is the diffusion constant of the carriers, N is their
density, and z is the distance between source and drain. The density of the carriers
decreases linearly along the channel, so
to
.
density at the drain:

can be simplified

is the density of carriers at the source, and

is their

(6)

(7)

We first replace
equation:

and

with their respective formulae in the following

to get:
(8)

where

is the surface potential at the source and along the channel. If we then

assume that excursions are small around the operating point, we can replace

with
have:

. Collecting all of the pre-exponential constants into one term,

, we

(9)

which correctly describes subthreshold PMOS transistor operation. In an NMOS

transistor, an increase in gate voltage attracts rather than repels charge carriers, so
the voltages are reversed:
(10)

To simplify the equation, we can assume the substrate is intrinsic and so no charge
from ionized donors or acceptors in the substrate reduces the effectiveness of an
applied electric field at the gate. is the term that accounts for the differences in
surface potential along the channel from
, so we eliminate it. Because
a voltage that only changes with temperature, we replace it with a single
variable,

is

:
(11)

Another form of this equation, which is less accurate, but makes further algebraic
manipulations possible, assumes that the transistor is in the saturation mode where
changes in

do not have a strong effect on the current flowing through the

transistor. This region starts when

the

. In this mode,

term drops out and we have:

(12)

which shows that we can model the transistor as having a simple exponential
response when saturated and in the subthreshold region. This response is illustrated
by figure 3.

Figure 3: Drain current vs. gate voltage for a saturated subthreshold CMOS transistor.

Diode-Connected Transistors
As previously mentioned, a Gilbert multiplier is typically built of exponential and
logarithmic components, and the logarithmic component is typically a diodeconnected bipolar transistor. By solving equation 12 for
, we see that a saturated
diode-connected subthreshold CMOS transistor does takes the logarithm of its
input current:
(13)

For typical processes,

is high enough that even for very small drain currents,
the voltage at the gate of the transistor will be about 0.4V [14]. This ensures that a
diode-connected transistor is always saturated and the equation above will be valid
for all useful subthreshold values. A plot of this logarithmic behavior is given in
figure 4.

Figure 4: Gate voltage vs. drain current for a diode-connected transistor.

Current Mirrors
A natural extension to the diode-connected transistor configuration is a current
mirror where the gate of another transistor is connected to the diode-connected
transistor's input. In this configuration, the attached transistor creates a mirror copy
of the current flowing through the diode-connected transistor, provided the

geometries of the two transistors are the same. The derivation is simple, we need
only plug the diode-connected transistor equation, 13, into the transistor
equation, 12:

(14)

A chain of transistors can be connected to the diode-connected transistor in the

same way as the first. This is possible because only a negligible amount of current
leaks through the electrically-isolated gate of an MOS device. Each added
transistor takes very little from the input signal, and so little accuracy is lost as
additional transistors are connected. This technique is valuable for the summation
part of the marginalization step of the sum-product algorithm. The marginalization
requires multiplying the same value from a single message by several other values
before summing. It is done by taking a message, which will be transmitted as a
current on a wire, and making several copies of it with a current mirror as
described above.
Another important feature of current mirrors is their ability to scale the currents
flowing through them. Equation 14 assumes that the two transistors that form the
current mirror have the same geometry. If the second transistor has a larger width
or length than the diode-connected transistor, more or less current will flow
through it at the same gate voltage. Recall that the
have used so far includes the

in the transistor equations we

geometry term from equation 8. If we

temporarily remove this term from the

in equation 12, we have:

(15)

Plugging this into equation 12 as we did in equation 14, we get:

(16)

While this gives us a fairly accurate way to multiply a current by a fixed value, it
has limitations. This method relies on making the transistors physically smaller or
larger, which can only be extended to a point. For example, to scale a current to 10
percent of its value, the width of the output transistor would have to be 10 percent
of the input transistor's width, assuming the lengths remain constant. This would
indicate that the width of the input transistor would have to be at least 10 times the
minimum resolution of the process, and no scaling less than 10 percent could be
achieved in a single stage.

Differential Pairs
With a logarithm circuit in hand, all that is needed to build a multiplier is a circuit
that has exponential response, and we have already shown that the response of a
single subthreshold MOS transistor has that. This presents the question of how to
take advantage of the transistor's exponential response. Our messages are sent in
the form of currents, but a diode-connected transistor converts a current to a
voltage during its computation. We need a circuit that takes the exponential of a
voltage and outputs a current, and that circuit can be built from a simple
differential pair, shown in figure 5.

Figure 5: Schematic of a differential pair circuit. The bias current

divided between

and

depending on

and

is set by
.

and

Again, we will assume that the transistors Q1 and Q2 are saturated and operating in
the subthreshold mode. From Kirchhoff's current law, we know that
Substituting equation 12 for

and

, we get:
(17)

To extract the value of

that does not include

, we first solve for V:

and then substitute the solution back into equation 17:

(18)

(19)

If we then replace

in equations 18 and 19 with equation 12, we have:

(20)

(21)

While the circuit clearly has some type of exponential response, it is not
immediately clear how to take advantage of it. The trick is to eliminate
the
term in the divisor of equations 18 and 19. This will happen by
combining the differential pair with three diode-connected transistors.

The Gilbert Multiplier

The classic Gilbert transconductance multiplier is named for Barrie Gilbert who
designed the circuit in 1968 with bipolar transistors [6]. The circuit combines
diode-connected transistors, current mirrors, summing junctions, and differential
pairs to multiply two differential signals. Rather than examine the entire circuit, we
will examine half of the circuit, as shown in figure 6. The circuit shown is exactly
the differential pair circuit, but with three diode-connected transistors added.

Figure 6: Schematic of half of a Gilbert multiplier. This circuit multiplies

by

if

Each added diode-connected transistor,

and

and

sum to 1.

, and

, forms a current mirror

with the transistor it is attached to,

,
, and
. Each diode-connected
transistor takes the logarithm of its input as a voltage, and each connected
transistor takes the exponential of that value, so the current running through both
transistors is the same. Because these are just current mirrors, we can rewrite
equations (20) and (21) as:
(22)

and
(23)

If we can then assure ourselves that

equations to read:

, we can simplify the

(24)

and
(25)

Which is the multiplication we are interested in, as long as we can satisfy the
requirement that
and
always sum to some constant value. In the context
of the sum-product algorithm, we are always multiplying the probabilities that
events happened or did not happen. By treating

as the probability that an

event happened and

as the probability that it did not happen, we are assured
that their values always sum to one, which in reality is some reference current. It is
because of this that we must always compute both products even if we do not need
one of them for our calculation.

Figure 7: Plot showing the linear multiplicative nature of the partial Gilbert multiplier.
sweeps from 1nA to 10nA, and
The plot is of

vs.

sweeps from 10nA to 1nA while

, which shows that the circuit multiplies

is held constant.
and