CTRL_PWM: Pulse-width modulation (S7-1200, S7-1500)

CTRL_PWM: Pulse-width modulation

Description
You can use the "CTRL_PWM" instruction to enable and disable a pulse output supported by the CPU
using the software.
Note
Pulse output parameters are assigned exclusively in the device configuration and not using the
"CTRL_PWM" instruction. Any change of parameters that is intended to have an effect on the CPU
must therefore be made while the CPU is in STOP mode.
You enter the hardware ID of the pulse output you want to control with the instruction in the PWM
input. Error-free execution of the instruction is possible only when the specified pulse output is ena
bled in the hardware configuration.
Only tags of "HW_PWM" data type can be specified in the PWM input. The hardware data type
HW_PWM has a length of one WORD.
The pulse output is enabled when the bit in the ENABLE input of the instruction is set. If ENABLE has
the value TRUE, the pulse output generates pulses that have the properties defined in the device con
figuration. When the bit in the ENABLE input is reset or the CPU changes to STOP, the pulse output
is disabled and no more pulses are generated.
The "CTRL_PWM " instruction is only executed if the signal state in the EN input is "1".
Since the S7-1200 enables the pulse output when the "CTRL_PWM" instruction is executed, BUSY at
S7-1200 always has the value FALSE.
The ENO enable output is set only when the EN enable input has signal state "1" and no errors have
occurred during execution of the instruction.
Note
Use of the force table for PWM and PTO
Digital inputs and outputs that are used for PWM and PTO cannot be forced. Digital inputs and out
puts that were assigned via device configuration cannot be controlled by either the force table or
the monitoring table.

Parameters
The following table shows the parameters of the "CTRL_PWM" instruction:

Parameter

Declaration

Data type

Memory area

Description

PWM

Input

HW_PWM
(WORD)

I, Q, M, L or con
Hardware ID of the pulse generator
stant

ENABLE

Input

BOOL

I, Q, M, D, L or
constant

The pulse output is enabled when

ENABLE = TRUE and disabled when
ENABLE = FALSE.

BUSY

Output

BOOL

I, Q, M, D, L

Processing status

STATUS

Output

WORD

I, Q, M, D, L

Status of the instruction

For additional information on valid data types, refer to "Overview

Overview of the valid data types".
types
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CTRL_PWM: Pulse-width modulation (S7-1200, S7-1500)

Parameter STATUS

Error code*
(W#16#...)

Description

No error

80A1

Hardware ID of the pulse generator is invalid

* The error codes can be displayed as integer or hexadecimal values in the program editor. For ad
ditional information on toggling display formats, refer to "See also".

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CTRL_HSC: Control high-speed counters (S7-1200, S7-1500)

CTRL_HSC: Control high-speed counters

Parameter

Parameter

Data type

Memory area

Description

EN

BOOL

I, Q, M, D, L

Enable input

ENO

BOOL

I, Q, M, D, L

Enable output

HSC

HW_HSC

I, Q, M or constant

Hardware address of
the high-speed counter
(HW-ID)

DIR

BOOL

I, Q, M, D, L or constant

Enables the new count

direction (see
NEW_DIR)

CV

BOOL

I, Q, M, D, L or constant

Enables the new count

value (see NEW_CV)

RV

BOOL

I, Q, M, D, L or constant

Enables the new refer

ence value (see
NEW_RV)

PERIOD

BOOL

I, Q, M, D, L or constant

Enables the new period

of a frequency meas
urement (see
NEW_PERIOD)

NEW_DIR

INT

I, Q, M, D, L or constant

Count direction loaded

when DIR = TRUE.

NEW_CV

DINT

I, Q, M, D, L or constant

Count value loaded

when CV = TRUE.

NEW_RV

DINT

I, Q, M, D, L or constant

Reference value loa

ded when RV = TRUE.

NEW_PERIOD

INT

I, Q, M, D, L or constant

Period of the frequency

measurement loaded
when PERIOD =
TRUE.

BUSY

BOOL

I, Q, M, D, L

Processing status

STATUS

WORD

I, Q, M, D, L

Status of the operation

Description
With the "Control high-speed counters" instruction, you can make parameter settings and control the
high-speed counters supported by the CPU by loading new values into the counter. Execution of the
instruction requires that the high-speed counter to be controlled is enabled. You cannot execute multi
ple "Control high-speed counters" instructions simultaneously in the program for a given high-speed
counter.
You can load the following parameter values into a high-speed counter using the "Control high-speed
counters" instruction:

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CTRL_HSC: Control high-speed counters (S7-1200, S7-1500)

Count direction (NEW_DIR): The count direction defines whether a high-speed counter counts up
or down. The count direction is defined by the following values at the NEW_DIR input: 1 = up, -1 =
down.
A change to the count direction with the "Control high-speed counters" instruction is only possible
when direction control is set in the parameters by the program. The count direction specified at the
NEW_DIR input is loaded into a high-speed counter when the bit at the DIR input is set.

Count value (NEW_CV): The count value is the initial value at which a high-speed counter starts
counting. The count value can be in the range -2147483648 to 2147483647.
The count value specified at the NEW_CV input is loaded into a high-speed counter when the bit at
the CV input is set.

Reference value (NEW_RV): You can compare the reference value with the current counter value
to trigger an alarm. Similar to the counter value, the reference value can be in the range
-2147483648 to 2147483647.
The reference value specified at the NEW_RV input is loaded into a high-speed counter when the
bit at the RV input is set.

Period of the frequency measurement (NEW_PERIOD): The period of the frequency measurement
is specified by the following values at the NEW_PERIOD input: 10 = 0.01s, 100 = 0.1s, 1000 = 1s.
The time period can be updated if the "Measure frequency" function for the specified high-speed
counter is configured. The time period specified at the NEW_PERIOD input is loaded into a highspeed counter when the bit at the PERIOD input is set.

The "Control high-speed counters" instruction is only executed if the signal state at the EN input is "1".
As long as the operation is executing, the bit at the BUSY output is set. Once the operation has exe
cuted completely, the bit at the BUSY output is reset.
The ENO enable output is set only when the EN enable input has signal state "1" and no errors occur
during execution of the operation.
When inserting the "Control high-speed counters" instruction, an instance data block is created in
which the operation data is saved.

Parameter STATUS
At the STATUS output, you can query whether errors occurred during execution of the "Control highspeed counters" instruction. The following table shows the meaning of the values output at the STA
TUS output:

Error code (hexadecimal)

Description

No error

80A1

Hardware identifier of the high-speed counter invalid

80B1

Count direction (NEW_DIR) invalid

80B2

Count value (NEW_CV) invalid

80B3

Reference value (NEW_RV) invalid

80B4

Period of the frequency measurement (NEW_PERIOD) invalid

80C0

Multiple access to the high-speed counter

80D0

The high-speed counter (HSC) is not enabled in the CPU hard

ware configuration.

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