Designing inverter in cadence

Objective:
To know about cadence ,use of cadence and simulate simulate the inverter in cadence.

Cadence:
The goal of the Cadence is to easy access to leading electronic design automation (EDA) tools for
educational institutions around the world.

cmos inverter:

Starting work in cadence:

The Library Manager:
First we will create library from the tools->Library Manager. The library manager will open.

Figure 1. The library manager

Creating a Project Library:

To create an Inverter we will create a project library. The project library is the library where we store the
cells we create.

Figure2: New project library

After this we will select these options

Figure 3: Attaching and choosing a technology file

Creating a New Cell:

Selecting the project library and creating a new cell view using the File->New->Cell View menu in the
library manager.

Figure 4: New cellview form

Inserting Components:
Than we will select inserting a component which are cmos and pmos using the ishort command.
Selecting Browse to go to the Library Manager.

Figure 5: Insert a component

Insert Wire:
Pressing p (path) to create connection and click where you want the connection to be,

Figure 6. Insert wires and creating labelsInsert

Pin:
Schematics can In order to create ports interfacing the schematic,by using the Add pin
command, accessed by the ctrl+p short command. Typing the name of the pin and choosing the
direction. The power supply and ground are chosen to be bidirectional (select inputOutput for the
Direction)

Figure 7. Creating Pins

Check and Save:

Then we will check and save over program to create the
Generating a symbol:
By Selecting Design -> Create Cellview -> From Cellview to create a symbol for our schematic
so that we can able to insert it in other designs as a library cell .
l

Figure
819
. Creating symbol

Figure 9. Inverter symbol

Create a test bench:

Creating a new cell inv_tb, with the schematic view in the my Inverter library using Library Manager
window

Figure 10. Create the test bench cell

Figure 11. Test bench schematic

Simulation and Analog Design Environment:

To simulating the design start up the Analog Design Environment (ADE) from the menu Tool -> Analog
Design Environment. From this window we control which simulations to run, sets control variables and
analyse the simulation results.
In order to run a simulation we must specify which device models to use. Specify the model libraries
from the menu of the ADE window, Setup -> Model Libraries

Figure 12. Model library specification

Selecting Analyses -> Choose from the menu of the ADE window for analysis setup. When selecting
different analysis types from the form, the lower part of the window change allowing we to control the
analysis in more detail. In this exercise, we select transient simulation. Set the stop time to 100ns.

Figure 13. Set the transient analysis parameters

Setup the outputs by going to Outputs > To Be Plotted > Selecting On Schematic and select the input
and output nets from the schematic

Figure 14. Final ADE view

Saving the state of the ADE by selecting Session > Save State so that you can load and reuse it later. In
the form, select Save State Option to Cellview. Choosing a name and clicking OK to save the state

Figure 15. Save the state

To run the simulation, selecting Simulation->Netlist and Run.

The circuit simulator in the Cadence is Spectre. When the simulation finished, simulation results will be
shown in the waveform window

Figure16. Waveform window

Observation:

From wave form it is clear when we give high input at gate so invert convert
it in low and when we give low so it makes it high.