Chap 1 Basic Structure of Comp

Faculty of Electrical and Electronic Engineering
Semester II, Session 2015/2016
BEC30303
Computer Architecture and Organization
Chapter 1:
Basic Structure of Computers
Mohamad Hairol Jabbar
Department of Computer Engineering
http://fkee.uthm.edu.my/mhjabbar
COURSE CHAPTERS
In this chapter, we will discuss about the overview of computer such as

basic elements, performance, and how it has been evolving.
Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers
OUTLINE
Computer types
Functional units
Basic operational concepts
Performance
Computer evolution
COMPUTER TYPES
WHAT IS A COMPUTER?
An electronic device that can input, process,
output and store data.
It takes data and converts it into information
Data is a single fact of idea
Information is data that has been processed
so that it can be presented in an organized
and meaningful way.
Data = pieces of jigsaw puzzle, information =
finished puzzle
Source: Go! All in One: Computer Concepts
and Applications, Pearson Education, 2012
BASIC COMPUTER FUNCTIONS

Input gathers data/allows a user to add data
Process data is converted into information
Output display/present the processed
results
Storage data/information is stored for future
use
Source: Go! All in One: Computer Concepts

and Applications, Pearson Education, 2012
COMPUTER TYPES
Embedded computers application specific
computers
Personal computers general purpose
computers
Servers and enterprise systems
Supercomputers and grid computers
highest performance computers
What is the number 1 supercomputer in

the word? And how fast is it (teraflops)?
FUNCTIONAL UNITS
FUNCTIONAL UNIT BLOCKS
Input
Memory
Output
Arithmetic
and
logic
Control
I/O
Processor
Basic functional units of a computer: processor, IO, and memory,

used to perform basic functions (input, process, output, storage)
INFORMATION HANDLED
Instructions/machine instructions:
Govern the transfer of information within a
computer (between functional unit blocks)
Specify the arithmetic and logic operations to be
performed by the computer
It is the program
Data:
Used as operands by the instructions
It is the source of the program
10
MEMORY UNIT
Store programs and data
Two classes of storage:
Primary storage: fast, store program in memory
while they are being executed, large number of
semiconductor storage cells
Secondary storage: larger and cheaper
Primary storage
Secondary storage
11
ALU
Arithmetic logic unit
Execute most computer operations add,
sub, multiply
Primary functions:
Load operands into memory, bring them to the
processor, perform operations in ALU, store the
results back to memory or retain in the processor
12
CONTROL UNIT
Control all computer operations
Also manage timing signals for IO transfers
Operation of computer:
Accept information in the form of programs and
data through an input unit and store it in the
memory
Fetch the information stored in the memory,
under program control, into an ALU, when data is
processed
Output the processed data through an output unit
Control all activities inside the machine through a
control unit
13
CONTROL UNIT IN A PROCESSOR
14
DATA PATH AND CONTROL PATH
Two types of functional units:

elements that operate on data values (combinational) ALU
elements that contain state (state elements) memory
15
EXECUTION STEPS
Step name
Action for R-type

instructions
Instruction fetch
Action for Memoryreference Instructions
Action for
branches
IR = MEM[PC]
PC = PC + 4
Instruction decode/
register fetch
Execution, address
computation, branch /
jump completion
A = Reg[IR[25-21]]
B = Reg[IR[20-16]]
ALUOut = PC + (sign extend (IR[15-0])<<2)
ALUOut = A op B
ALUOut = A+sign
IF (A==B)
extend(IR[15-0])
Then PC =
ALUOut
Memory access or
R-type completion
Reg[IR[15-11]] =
ALUOut
Memory read
5 completion
Action for
jumps
Load: MDR =
Mem[ALUOut]
or
Store: Mem[ALUOut] =
B
Load: Reg[IR[20-16]] =
MDR
16
PC =
PC[3128]||(IR[2
5-0]<<2)
BASIC OPERATIONAL CONCEPTS
REVIEW UNDERSTANDING
Activity in a computer in governed by
instructions
To perform a task, a program consists of a list
of instructions is stored in the memory
Individual instructions are brought from the
memory into the processor, which executes
the specified operations
Data to be used as operands are also stored
in the memory
18
EXAMPLES OF TYPICAL INSTRUCTION

Add LOCA, R0
Add the operand at memory location LOCA to
the operand in a register R0 in the processor.
Place the sum into register R0.
The original contents of LOCA are preserved.
The original contents of R0 is overwritten.
Instruction is fetched from the memory into
the processor the operand at LOCA is
fetched and added to the contents of R0 the
resulting sum is stored in register R0.
19
SEPARATE MEMORY ADDRESS

Load LOCA, R1
Add R1, R0
Whose contents will be overwritten?
For x86 architecture:
ADD destination, source = destination <- destination + source
Be careful with instruction set, different architectures
have different concepts for executing instructions!
20
PROCESSOR-MEMORY CONNECTION
Memory
MAR
MDR
Control
PC
R0
R1
Processor
IR
ALU
Rn -
n general purpose
registers
Connection between
processor and memory
21
REGISTERS
Common registers in processors:
Instruction register (IR)
Program counter (PC)
General purpose register (R0-Rn-1)
Memory address register (MAR)
Memory data register (MDR)
22
TYPICAL OPERATION STEPS (1/2)

Program resides in the memory through input
devices
PC is set to point to the first instruction
The contents of PC are transferred to MAR
A read signal is sent to the memory
The first instruction is read out and loaded
into MDR
The contents of MDR are transferred to IR
Decode and execute the instruction
23
TYPICAL OPERATION STEPS (2/2)

Get operands for ALU
General purpose register
Memory (address to MAR, read, MDR to ALU)
Perform operation in ALU

Store the result back
To general purpose register
To memory
24
INTERRUPT
Normal execution of programs may be
preempted if some devices requires urgent
servicing
The normal execution of the current program
must be interrupted the device raises an
interrupt signal
The process interrupt service routine
Examples:
Current system information backup and restore
(PC, general purpose registers, control
information, specific information)
25
BUS STRUCTURES
There are many ways to connect different
components inside a computer
A group of lines that serves as a connecting
path for several devices is called a bus
Address/data/control bus
26
BUS STRUCTURE EXAMPLE
Input
Output
Memory
Processor
Block diagram of single bus structure
27
SPEED ISSUE FOR BUS

Different devices have different
transfer/operation speeds
If the speed of bus is bounded by the slowest
device connected to it, the efficiency will be
very low
How to solve this?
A common approach use buffers (temporary
data storage in the communication lines)
28
PERFORMANCE
PERFORMANCE
The most important measure of a computer
is:
How quickly it can execute programs
How many instructions it can execute within a
period of time
Three factors affect performance:

Hardware design
Instruction set
Compiler
30
PERFORMANCE HARDWARE
Processor time to execute a program
depends on the hardware involved in the
execution of individual machine instructions.
Main
memory
Cache
memory
Processor
Bus
31
PERFORMANCE MEMORY
High speed and high capacity of primary
memory can improve the performance of a
computer
The processor and a relatively small cache
memory can be fabricated on a single
integrated circuit.
Consideration when integrating cache
memories:
Speed
Cost
Memory management
32
PERFORMANCE PROCESSOR CLOCK

High clock rate can improve the performance
of a computer
The execution of each instruction is divided
into several steps, each of which completes in
one/several clock cycles
Hertz cycle per second
33
PERFORMANCE EQUATION
T processor time required to execute a
program that has been prepared in high level
language
N number of actual machine language
instructions needed to complete the execution
S average number of basic steps needed to
execute one machine instruction. Each step
completes in one clock cycle
R clock rate/speed T = N S How to improve T?
R
34
PIPELINE/SUPERSCALAR PROCESSOR
Instructions are not necessarily executed one
after another
The value of S does not have to be the
number of clock cycles to execute one
instruction
Pipeline overlapping the execution of
successive instructions
Superscalar multiple instruction pipelines
are implemented in the processor
Goal reduce S (could become <1!)
35
CLOCK RATE/SPEED
Increase clock rate:
Improve the IC technology to make circuits faster
Reduce the amount of processing done in one
basic step (but may increase the number of basic
steps needed)
Increase R that are entirely caused by

improvements in IC technology affect all
aspects of the processors operation equally
except the time to access the main memory
36
CISC/RISC
CISC Complex instruction set computers

RISC Reduce instruction set computers
RISC vs CISC = trade off between N and S
A key consideration is the use of pipelining:
S close to 1 even though the number of basic
steps per instruction may be considerably larger
It is much easier to implement efficient pipelining
in processor with simple instruction sets
37
COMPILER
A compiler translates a high level program
into a sequence of machine instructions
To reduce N, we need a suitable machine
instruction set and a compiler that makes
good use of it.
Goal reduce N x S
A compiler may not be designed for a specific
processor, but a high quality compiler is
usually designed for specific processor
38
PERFORMANCE MEASURE
T is difficult to measure depends on various
elements
Measure computer performance using
benchmark programs
System performance evaluation corporation
(SPEC) selects and publishes representative
application programs for different applications
domains, together with test results for many
commercial available computers
39
SPEC MEASUREMENT
Running time on the reference computer

SPEC rating =
Running time on the computer under test
n
SPEC rating = ( SPEC i )
1
n
i =1
40
MULTIPROCESSOR COMPUTER
Can be:
Execute a number of different application tasks in
parallel
Execute subtasks of a single large task in parallel
All processors have access to all memory

shared memory
Cost processors, memory units, complex
interconnection networks
41
COMPUTER EVOLUTION
COMPUTER EVOLUTION
First generation vacuum tube

Second generation transistor
Third generation integrated circuit
Later generation LSI, VLSI, ULSI
43
1ST GENERATION VACUUM TUBE

ENIAC: electronic numerical integrator and
computer
Designed and constructed at the Univ. of
Pennsylvania (started 1943, completed 1946)
Source: http://classes.soe.ucsc.edu/
Structure of vacuum tube
44
VACUUM TUBE AS A SWITCH

Heated cathode send electrons to the
anode. Electron mobility is controlled by a
filament (called a grid). If the grid power is
off, electrons flow to anode (switch on),
otherwise, no electrons flow (switch off).
To picture the
relative size of a
vacuum tube.
45
ENIAC CHARACTERISTICS
Weight 30 tons
1500 sq feet of area
Why it is so large?
18,000 vacuum tubes
140 kW power consumption
5,000 addition operations per second
Decimal machine
Memory consists of 20 accumulator, each
with 10 digit number
Manual programming setting switches,
plug/unplug cables
46
EDVAC
Electronic discrete variable computer
Completed 1945
Stored program concept:
Attributed to ENIAC designers, most notably the
mathematician John Von Neumann
Program represented in a form suitable for
storing in memory alongside the data
IAS computer:
Princeton Institute of Advanced Studies (IAS)
Prototype of all subsequent general-purpose
computers
47
EDVAC PICTURE
Source: http://web.soi.city.ac.uk/archive/image/lists/computers.html
48
VON NEUMANN MACHINE
Structure of the IAS computer, implemented

Von Neumann computer architecture model
49
IAS MEMORY FORMAT

The memory of the IAS
consists of 1000 storage
locations (called words) of
40 bits each
Both data and instructions are

stored in the memory
Numbers are represented in
binary form and each instruction
is a binary code
IAS memory formats

50
IAS COMPUTER STRUCTURE
Detailed structure
of IAS computer
51
IAS REGISTERS
Memory buffer register
(MBR)
Memory address
register (MAR)
Instruction register (IR)
Contains a word to be stored in memory or sent to the I/O

unit
Or is used to receive a word from memory or from the I/O unit
Specifies the address in memory of the word to be written

from or read into the MBR
Contains the 8-bit opcode instruction being executed
Instruction buffer
register (IBR)
Employed to temporarily hold the right-hand instruction from a

word in memory
Program counter (PC)
Contains the address of the next instruction pair to be fetched

from memory
Accumulator (AC) and

multiplier quotient (MQ)
Employed to temporarily hold operands and results of ALU

operations
52
IAS OPERATIONS
Flowchart of IAS
operation
53
IAS INSTRUCTION SET
Instructions to be
executed on the IAS
computer
54
COMMERCIAL COMPUTERS
UNIVAC:
Universal automatic computer
First commercial general purpose computers
For both scientific and commercial applications
Several version: UNIVAC I (1951), UNIVAC II
(1958), UNIVAC III (1962)
55
IBM COMPUTERS
IBM 700 series computers:
Based on vacuum tubes technology
IBM 701:
1953, for scientific applications
Known as Defense Calculator
IBM 702:
Targeted for business applications
56
2ND GENERATION TRANSISTOR

Transistor is invented at Bell Labs in 1947
Is a solid state device made from silicon
Advantages:
Dissipates less heat than a vacuum tube
Smaller
Cheaper
Source: www.nobelprize.org
57
2ND GENERATION CHARACTERISTICS

More complex arithmetic/logic/control units
The use of high level programming languages
(assembly languages):
FOTRAN
COBOL
Provision of system software which provided

the ability to:
Load programs
Move data to peripherals and libraries
Perform common computations
58
2ND GENERATION COMPUTERS

Appearance of the digital equipment
corporation (DEC) in 1957
PDP-1 (programmed data processor) was
DECs first computer
This began the mini-computer phenomenon
that would become so prominent in the third
generation
59
IBM 7000 COMPUTER SERIES
IBM 7090 Computer

60
IBM 7094 CONFIGURATION
An IBM 7094
configuration
61
3RD GENERATION INT. CIRCUIT

1958, invention of IC
Discrete component:
single, self-contained transistor
Manufactured separately, packaged in their

own containers, soldered or wired together
onto circuit boards
Most important 3rd generation computer
IBM System/360 and DEC PDP-8
62
INTEGRATED CIRCUIT
A computer consists of gates, memory cells,
interconnection among this elements
The gates and memory cells are constructed
of simple digital electronic components
Many transistors can be produced at the
same time on a single silicon wafer
Transistors can be connected with a
processor metallization to/from circuits
63
WAFER/CHIP/GATE
Relationship among
silicon wafer, chip and
logic gate
64
CHIP GROWTH
Continuous growth of
transistor count in IC for
DRAM memory
Transistor
number
Year
65
TRANSISTOR GROWTH TREND

Observed by Gordon Moore, 1965, later
known as Moores Law
The number of transistors that could be put
on a single chip was doubling in 18 months
Moores Law, 1965

66
MOORES LAW EFFECT

The cost of computer logic and memory
circuitry has fallen at a dramatic rate
Electrical path length is shortened in the IC
and increasing operating speed
Computer becomes smaller and is more
convenient to use in a variety of environments
Reduction in power and cooling requirements
Fewer interchip connections
67
IBM SYSTEM/360 COMPUTERS
68
DEC PDP-8 COMPUTERS
69
DEC PDP-8 BUS STRUCTURE
PDP-8 bus structure
70
LATER COMPUTER GENERATIONS
LSI (Large scale integration)

VLSI (Very large scale integration)
ULSI (Ultra large scale integration)
Semiconductor memory microprocessors
Still using IC technology, but with

more advanced transistor technology
71
CHARACTERISTICS
Source: http://www.csi.ucd.ie/
72
INTEL PROC. REVOLUTION (1/4)
1970s Processors
73
1980s Processors
74
1990s Processors
75
Recent Processors
76
COMPUTER EVOLUTION SUMMARY
The trend is from increasing number

of switching elements in an IC
77
IT IS ALL ABOUT SWITCH
The future of electronic technology

relies on the new switch technology!
Source: http://www.csi.ucd.ie/
78
PERFORMANCE BALANCE (1/2)

Adjust the organization and architecture to
compensate for the mismatch among the
capabilities of the various components
Architecture examples includes:
Increase the number of bits that are retrieved at
one time by making DRAMs wider rather than
deeper and by using wide bus data paths
Reduce the frequency of memory access by
incorporating increasingly complex and efficient
cache structures between the processor and
main memory
79
PERFORMANCE BALANCE (2/2)

Change the DRAM interface to make it more
efficient by including a cache or other buffering
scheme on the DRAM chip
Increase the interconnect bandwidth between
processors and memory by using higher speed
buses and a hierarchy of buses to buffer and
structure data flow
80
IMPROVEMENT IN CHIP ARCHITECTURE

Increase hardware speed of processor:
Fundamentally due to shrinking logic gate size
More gates, packed more tightly, increase clock
rate
Reduce signal propagation time
Increase size and speed of caches:

Reduce cache access time
Change processor organization/architecture:

Increase effective speed of instruction exec.
Parallelism
81
X86 ARCHITECTURE
Results of decades of design effort on

complex instruction set computers (CISCs)
Incorporates the sophisticated design
principles once found only on mainframes
and supercomputers
82
X86
EVOLUTION (1/2)
8080:
First general purpose microprocessor
8 bits machine with 8 bits data path to memory
8086:
16 bits machine
Used an instruction cache or queue
80286:
Enabled addressing a 16 MB memory instead of
just 1 MB
83
X86
EVOLUTION (2/2)
80386:
Intels first 32 bit machine
First Intel processor to support multitasking
80486:
More sophisticated cache technology and
instruction pipelining
Built-in math coprocessor
84
X86
EVOLUTION PENTIUM
Pentium
Superscalar
Multiple
instructions
executed in
parallel
Pentium Pro
Increased
superscalar
organization
Aggressive
register
renaming
Branch
prediction
Data flow
analysis
Speculative
execution
Pentium II
MMX
technology
Designed
specifically to
process video,
audio, and
graphics data
Pentium III
Additional
floating-point
instructions to
support 3D
graphics
software
Pentium 4
Includes
additional
floating-point
and other
enhancements
for multimedia
85
PROBLEMS CLOCK/LOGIC (1/2)

Power:
Higher density logic and faster clock: increase
power
Dissipating heat
Memory latency:
Memory speeds lag processor speed
86
PROBLEMS CLOCK/LOGIC (2/2)

RC delay:
Speed at which electrons flow limited by
resistance and capacitance of metal wires
connecting them
Delay increases as RC product increases
Wire interconnects thinner, increasing resistance
Wire closer together, increasing capacitance
87
PROCESSOR-MEMORY SPEED GAP
Huge speed
gap and
increasing!
Source: Patterson D., Anderson T. et al.: A Case

for Intelligent RAM: IRAM. IEEE Micro (1997)
88
X86
EVOLUTION MULTICORE
Instruction set
architecture is
backward
compatible with
earlier versions
X86 architecture
continues to
dominate the
processor
market outside
of embedded
systems
Core
First Intel x86 microprocessor
with a dual core, referring to
the implementation of two
processors on a single chip
Core 2
Extends the architecture to 64
bits
Recent Core offerings have up
to 10 processors per chip
89
PROCESSOR SPEED TRENDS
Frequency
has stalled
Number of
processor cores
is increasing
Year
90
MULTICORE
Strategy use two (or more) simple
processors on the chip rather than one more
complex processor
The use of multiple processors on the same
chip provides the potential to increase
performance without increasing the clock rate
Increasing performance through parallel
execution/processing
91
MANY INTEGRATED CORE (MIC)

Leap in performance as well as the
challenges in developing software to exploit
such a large number of cores
> 50 cores per die/chip
512 bit SIMD instructions
Source: intel.com
92
GPU
Graphic processing unit
Core designed to perform parallel operations
on graphics data
Used as vector processors for a variety of
applications that require repetitive
computations
High computational density and high memory
bandwidth
Throughput processor: many concurrent
threads
93
EMBEDDED SYSTEMS
General definition:
A combination of computer hardware and
software, and perhaps additional mechanical or
other parts, designed to perform a dedicated
function.
In many cases, embedded systems are part of a
larger system of product, as in the case of an
antilock braking system in a car.
94
EMBEDDED SYSTEMS EXAMPLE

Embedded System Examples in different market segments
Almost all electronic devices other than desktop computer

and server are embedded system devices!
95
ARM PROCESSORS
Advanced RISC Machine
Family of RISC-based microprocessors and
microcontrollers
Design microprocessors and license them to
manufacturers
Most widely used embedded processor
architecture
Why RISC is used widely in
embedded system devices?
www.arm.com
96
ARM PROCESSORS EVOLUTION

Family
ARM1
ARM2
ARM3
ARM6
ARM7
ARM8
Notable Features
32-bit RISC
Multiply and swap
instructions;
Integrated memory
management unit,
graphics and I/O
processor
First use of processor
cache
First to support 32-bit
addresses; floatingpoint unit
Integrated SoC
5-stage pipeline; static
branch prediction
ARM9
ARM9E
ARM10E
ARM11
Cortex
XScale
Cache
Typical MIPS @
MHz
None
None
7 MIPS @ 12 MHz
4 KB unified
12 MIPS @ 25 MHz
4 KB unified
28 MIPS @ 33 MHz
8 KB unified
8 KB unified
60 MIPS @ 60 MHz
84 MIPS @ 72 MHz
16 KB/16 KB
300 MIPS @ 300

MHz
220 MIPS @ 200
MHz
Enhanced DSP
instructions
6-stage pipeline
9-stage pipeline
16 KB/16 KB
13-stage superscalar
pipeline
Applications
processor; 7-stage
pipeline
Variable
740 MIPS @ 665

MHz
2000 MIPS @ 1 GHz
32 KB/32 KB L1
512 KB L2
1000 MIPS @ 1.25

GHz
32 KB/32 KB
Variable
97
FINISH

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Faculty of Electrical and Electronic Engineering

Semester II, Session 2015/2016

In this chapter, we will discuss about the overview of computer such as

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

BASIC COMPUTER FUNCTIONS

Source: Go! All in One: Computer Concepts

What is the number 1 supercomputer in

FUNCTIONAL UNIT BLOCKS

Basic functional units of a computer: processor, IO, and memory,

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

CONTROL UNIT IN A PROCESSOR

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

DATA PATH AND CONTROL PATH

Two types of functional units:

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Action for R-type

Action for Memoryreference Instructions

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

BASIC OPERATIONAL CONCEPTS

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

EXAMPLES OF TYPICAL INSTRUCTION

SEPARATE MEMORY ADDRESS

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

TYPICAL OPERATION STEPS (1/2)

TYPICAL OPERATION STEPS (2/2)

Perform operation in ALU

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

BUS STRUCTURE EXAMPLE

Block diagram of single bus structure

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

SPEED ISSUE FOR BUS

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Three factors affect performance:

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

PERFORMANCE PROCESSOR CLOCK

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Increase R that are entirely caused by

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

CISC Complex instruction set computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Running time on the reference computer

SPEC rating = ( SPEC i )

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

All processors have access to all memory

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

First generation vacuum tube

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

1ST GENERATION VACUUM TUBE

Structure of vacuum tube

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

VACUUM TUBE AS A SWITCH

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

Computer Architecture and Organization (BEC30303) | Chapter 1: Basic Structure of Computers

VON NEUMANN MACHINE