Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
(IJECET)
Volume 7, Issue 1, Jan-Feb 2016, pp. 87-100, Article ID: IJECET_07_01_009
Available online at
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Journal Impact Factor (2016): 8.2691 (Calculated by GISI) www.jifactor.com
ISSN Print: 0976-6464 and ISSN Online: 0976-6472
IAEME Publication
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1. INTRODUCTION
The conventional machining done in the past like lathe and milling operations were
done manually. With the advent of processor and controllers, came the CNC
machines, with the advantage of using universally accepted G code machining
language to machine the parts. It became really easy to produce the parts with same
accuracies and consistency on different machines with the same G code being used.
The Heart of Industrial Automation Devices like CNC Machines are Motion
Controllers, which sequentially executes G codes to machine the parts. Motion
controllers control the motion conveyed through G code in a predetermined direction
through motors. The circular motion of the motor is translated to the CNC tool
linearly in small steps. A motor each is required for motion in one particular axis.
Therefore, for a 3D motion, the tool is controlled by providing varying rate of pulses
to each of the three motors, corresponding to an axis. The controlled motion (line/arc)
along the required path trajectory is achieved through various interpolation algorithms
run in 2D or 3D space, which are responsible for providing varying rate of pulses to
corresponding axis.
Till date available CNC systems are implemented using controllers and
processors. These processors implement CNC motions using software interpolation.
Most of the interpolation algorithm uses complex parametric function like sine and
cosine for necessary calculations. Software implementation of such algorithms by
serial pipelined processors is time consuming and as well as difficult and impractical
for real time applications. As employment with single CPU in traditional control
system, the CPU is busy with kinds of tasks; in this case, the high requirement for real
time in interpolation is impractical and difficult. Thus the efficient, real time complex
computation approach is only feasible with hardware logic circuits like FPGA or
ASIC having parallel and lower power processing architectures. As compared to
ASIC, FPGAs have lower time to market and simpler design cycle making it an
excellent solution for the implementation of motion controllers.
The FPGA-based implementation of control algorithm offers advantages such as
high speed computation, complex functionality and real-time processing capabilities.
Takahashi and Goetz presented the design and implementation of FPGA based high-
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Design and Implementation of FPGA Based G Code Compatible CNC Lathe Controller
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2.1. UART
UART (Universal Asynchronous Receiver Transmitter) is used for asynchronous
serial data communication to configure the G code Processor and its instruction
memory. Its a generic UART supporting all baud rates. Our design uses the 115200
baud rate. A moving average low pass filter is used to remove noise samples from
data samples at receiver. Reference 4 gives more detail on the implementation.
Pulse_x
Start lin
Feedrate, displacement
coefficient, axis
parameters
Done lin
Tx
UART
Tx_int Rx_int
Direction_2 axis
Pulses_2 axis
Pulse_z
Start cir
Feedrate, displacement
coefficient, axis
parameters
Done cir
Cicular
Interpolation
Start rapid
Feedrate, displacement
coefficient, axis
parameters
Done rapid
Rapid
Positioning
Direction_2 axis
Mux
Pulses_2 axis
Direction_2 axis
Direction_x
Pulses_2 axis
Direction_z
Sbuf_in(7:0)
wr
Sbuf_out(7:0)
Rx
Linear
Interpolation
Interpolation_selection
UART reg interface
Application Specific G
Code Processor
Principal axis
control
Direction_spindle
Instr (63:0)
wr
Pulse_spindle
Principal axis
parameters
RAM
Coolant on
Coolant off
Lubricant on
Lubricant off
Tailstock forward
Cycle_start
Tailstock backward
Instruction_valid
Instruction
Address
Chuck released
24 programmable outputs
Address valid
24 programmable inputs
24 programmable inputs alarm
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Design and Implementation of FPGA Based G Code Compatible CNC Lathe Controller
2.3. RAM
RAM used is a simple dual port RAM with one side read only and other write only.
It's a 128 bit width and 512 deep synchronous block RAM of Artix 7 FPGA. It is used
to hold instructions. Instructions are written in RAM by UART register interface
through UART, while they are read by G code processor. G code processor fetches
the next bunch after it has positioned the two servo motors according to the
instruction fetched previously.
3. G CODE PROCESSOR
Application G code processor is designed to support the G, M, S and T codes used in
a standard lathe machines. It is a 32 - bit, 4 stage pipeline, CISC (Complex Instruction
Set Computers) processor. It is implemented on Xilinx Artix 7 FPGA.
Its basic features are:
16 - bit Program Counter.
128 bit Instruction Register.
Four stage pipeline architecture:
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Instruction Fetch: 128 bit instructions are fetched from the external memory in this stage.
Execute: Instructions depending on their type are executed in single clock or multiple
clock.
Current position update: If the instructions are any of the G code interpolation or M
code program end then depending on the motion executed the current position is
updated.
X 0000 0001
branch_taken
Adder
32 bit
Program Counter
Sig_Program Counter
Instruction register(63:0)
Instruction
Fetch
clr
Q
Immed_data(31:0)
branch_taken
PC
mux
D
clk
Current position
Start lin
Coolant on
Coolant off
Lubricant on
Lubricant off
Instruction Decoder
Tailstock backward
Principle axis forward rotation
Principle axis backward rotation
Principle axis stop
Chuck clamped
Chuck released
Feedrate mm/min
calculation
Instruction
Decode
Start rapid
Tailstock forward
Non_restoring_divider
Interpolation_selection
24 programmable outputs
Current
position
Timer
Timer_up
Done lin
Done cir
24 programmable inputs
Done rapid
Cycle start
opcode
Instruction
Execute
Pipeline Registers
Timer
paramet
ers
opcode
done
Instruction
write back
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Design and Implementation of FPGA Based G Code Compatible CNC Lathe Controller
waits for the done signals and accordingly updates the current position register. The
program counter increments by 1 to fetch the next instruction. If there is block change
instruction, it is decoded in the instruction decode stage and accordingly instruction is
fetched from the next decoded address. For the M codes depending on whether they
are control instructions or programmable input output instructions they are executed
in single or multiple clock cycles. Tool selection and offset instruction is executed in
single clock.
Instruction
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
M codes
M00
M30
M98
M99
M03
M04
M05
M08
M09
M10
M11
M12
M13
M32
M33
M88
M89
Program Pauses
Program Ends
Subroutine calling
Return from subroutine
Principal axis forward direction
Principal axis backward direction
Principal axis stop
Coolant on
Coolant off
Tailstock forward
Tailstock backward
Chuck clamped
Chuck released
Lubricant on
Lubricant off
Check the signal of specified input pin
Control the switch of specified output pin
18
T Code
T
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
G Code
G00
G01
G02
G03
G04
G28
G32
G33
G50
G90
G92
G94
G96
G97
G98
G99
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126
125
124
123
122
Opcode
M - 00
121
120
119
118
...
117
Unused
Bits
M-Code No.
3.3.2. M88
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
9 9 9 9 9 9 9 9 9
2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
9 8 7 6 5 4 3 2 1
7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
Op
Code
M
00
Input
Value
To
Wait
For
Input
Port
Address
M-Code No.
88
Q
Op
Code
..
Millisecond
Value For
Waiting
Unused
Bits
3.3.3. M89
127
126
125
124
123
Opcode
M
00
122
121
120
119
118
117
116
M-Code No.
89
115
114
113
112
..
111
Output
Value
Output Port
Address
Unused
Bits
3.3.4. M98
1
2
7
1
2
6
1
2
5
1
2
4
Op
Code
M
00
1
2
3
1
2
2
1
2
1
1
2
0
1
1
9
1
1
8
1
1
7
1
1
6
1
1
5
1
1
4
1
1
3
1
1
2
1
1
1
1
1
0
1
0
9
1
0
8
1
0
7
1
0
6
1
0
5
1
0
4
1
0
3
Repeat
Subroutine
Value
M-Code No.
98
1
0
2
1
0
1
1
0
0
9
9
9
8
9
7
9
6
9
5
9
4
9
3
Subroutine
Address
9
2
9
1
..
Unused
Bits
3.3.5. M99
1
2
7
1
2
6
1
2
5
Op
Code
M
00
1
2
4
1
2
3
1
2
2
1
2
1
1
2
0
1
1
9
1
1
8
M-Code No.
99
1
1
7
1
1
6
1
1
5
1
1
4
1
1
3
1
1
2
1
1
1
1
1
0
1
0
9
P Opcode
1010
1
0
8
1
0
7
1
0
6
1
0
5
1
0
4
1
0
3
1
0
2
1
0
1
1
0
0
9
9
Subroutine
Address
9
8
9
7
..
Unused
Bits
3.3.6. T
127
126
Opcode
T - 00
125
124
123
Tool
Number
122
121
120
119
118
117
Unused
Bits
Tool Offset
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3.3.7. G97/50
1
2
7
1
2
6
1
2
5
1
2
4
1
2
3
Op
code
G
01
1
2
2
1
2
1
1
2
0
1
1
9
1
1
8
1
1
7
1
1
6
G-Code No.
97/50
1
1
5
1
1
4
1
1
3
1
1
2
1
1
1
1
1
0
1
0
9
1
0
8
1
0
7
1
0
6
1
0
5
1
0
4
1
0
3
..
Unused
Bits
3.3.8. G98/99
1
2
7
1
2
6
1
2
5
1
2
4
1
2
3
Op
code
G
01
1
2
2
1
2
1
1
2
0
1
1
9
1
1
8
1
1
7
1
1
6
1
1
5
1
1
4
1
1
3
1
1
2
1
1
1
1
1
0
1
0
9
1
0
8
1
0
7
1
0
6
1
0
5
1
0
4
1
0
3
..
G-Code No.
98/99
Unused
Bits
3.3.9. G04
1
2
7
1
2
6
1
2
5
1
2
4
1
2
3
Op
code
G
01
1
2
2
1
2
1
1
2
0
1
1
9
1
1
8
1
1
7
1
1
6
1
1
5
1
1
4
1
1
3
1
1
2
1
1
1
G-Code No.
04
1
1
0
1
0
9
1
0
8
1
0
7
1
0
6
1
0
5
1
0
4
1
0
3
1
0
2
1
0
1
..
Unused
Bits
Timer Value
3.3.10 G00/28
1
2
7
1
2
6
1
2
5
1
2
4
Op
Code
G
01
1
2
3
1
2
2
1
2
1
1
2
0
1
1
9
1
1
8
1
1
7
G-Code No.
00/28
1
1
6
1
1
5
1
1
4
1
1
3
1
1
2
1
1
1
1
1
0
x/u
Opcode
1
0
9
1
0
8
1
0
7
1
0
6
1
0
5
1
0
4
1
0
3
1
0
2
1
0
1
1
0
0
9
9
9
8
9
7
9
6
9
5
9
4
9
3
z/w
Op
Code
Value
9
2
9
1
9
0
8
9
8
8
8
7
8
6
8
5
...
Unused
Bits
Value
3.3.11. G01
1
2
7
1
2
6
Op
Code
G
01
1
2
5
1
2
4
1
2
3
1
2
2
1
2
1
1
2
0
1
1
9
1
1
8
1
1
7
G-Code No.
01
1
1
6
1
1
5
1
1
4
x/u
Opcode
1
1
3
...
1
0
2
1
0
1
1
0
0
9
9
9
8
9
7
z/w
Op
Code
Value
...
8
6
8
5
8
4
8
3
8
2
8
1
F
Op
Code
Value
...
6
8
6
7
...
Unused
Bits
f
Value
3.3.12. G02/03/90/94
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 1 1 1 1 1 1 1
7 6 5 4 3 2 1 0 9 8 7 6 5 4 3
Op
Cod
e
G
01
G-Code No.
02/03/90/
94
x/u
Opcode
...
1 1 1
9 9 9
0 0 0
9 8 7
2 1 0
Value
z/w
Op
Code
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...
Value
95
8 8 8 8 8 8
6 5 4 3 2 1
...
7 6 6 6 6 6
0 9 8 7 6 5
...
Value
F
Op
Code
f
Value
5 5
2 1
...
Unused
Bits
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4. RESULTS
4.1. Synthesis Report - Device utilization summary:
Selected Device:
Slice Logic Utilization:
Number of Slice Registers:
Number of Slice LUTs:
Number used as Logic:
IO Utilization:
Number of bonded IOBs:
Specific Feature Utilization:
Number of Block RAM/FIFO:
Number of BUFG/BUFGCTRLs:
Number of DSP48A1s:
7a100tcsg324-1
1489 out of 126800
3111 out of 63400
3111 out of 63400
1%
4%
4%
38 out of
210
4%
2 out of
1 out of
26 out of
135 1%
32 12%
240 37%
Test Case
M03 - Principal axis forward direction
M00 - Pause
4.2.2. G01
Test Case
G98 500
G01 X 3 Z 13
G01 X 5 Z 9 F 1000
M 00
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Design and Implementation of FPGA Based G Code Compatible CNC Lathe Controller
5. CONCLUSION
A G Code based motion controller was implemented to control a multiple-axis motion
system for a CNC Lathe machine for the first time in FPGA, with its heart being a 4
stage Multi Instruction Multi Data (MIMD) Complex Instruction Set computers
(CISC) G code processor. The G Code Processor supports most of the G codes, M
codes, T code, F code and S code required for performing Lathe machining operation.
It was designed using Verilog and implemented on Xilinx Artix 7, 7a100tcsg324-1
FPGA. It consumed 3277, 6 input LUTs and 1580 Flip Flops and was able to achieve
maximum frequency of 52.35 MHz. The feasibility to realize reconfigurable G code
based CNC system within FPGA were validated.
Simulation results show the precision and performance to be excellent. Synthesis
report also shows it to be hardware efficient by consuming fewer Flip Fops and
LUTS. Excellent real time operation, good precision and optimum hardware resources
makes the FPGA-based CNC Lathe controller have excellent performance and useful
for any motion controller for CNC machines.
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