International Journal of Electronics and Communication Engineering & Technology

(IJECET)
Volume 7, Issue 1, Jan-Feb 2016, pp. 01-09, Article ID: IJECET_07_01_001
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ISSN Print: 0976-6464 and ISSN Online: 0976-6472
IAEME Publication

EFFECTIVE AES IMPLEMENTATION

Ayushi Arya
Dept ECE, Student
Royal Institute of Management & Technology
V.P.O Chidana, Gohana, Haryana, India
Mohinder Malhotra
Dept. ECE, H.O.D
Royal Institute of Management & Technology
V.P.O Chidana, Gohana, Haryana, India
ABSTRACT
The importance of cryptography knuckle down to the security in electronic
data transmissions has gained an essential relevance during past years.
Cryptography security mechanisms uses some algorithms to muddle the data
into unreadable text with a key which can only be decoded/decrypted by one
who has that associated key for the locked data. Cryptography techniques are
of two types: Symmetric & Asymmetric. In this paper weve used symmetric
cryptography method-Advance Encryption Standard algorithm with 200 bit
block size as well as 200 bit key size. Weve used 5*5 matrix to implement
same 128 bit conventional AES algorithm for 200 bit block size. After
implementing the algorithm, the proposed work is compared with 128,192 &
256 bits AES techniques in context with Encryption and Decryption Time &
Throughput at both Encryption and Decryption ends.
Key words: Block Cipher, Plain Text, Cipher Text, AES, S-Box, Inverse SBox
Cite this Article: Ayushi Arya and Mohinder Malhotra. Effective AES
Implementation. International Journal of Electronics and Communication
Engineering & Technology, 7(1), 2016, pp. 39-42.
http://www.iaeme.com/IJECET/issues.asp?JType=IJECET&VType=7&IType=1

1. INTRODUCTION
From a global perspective there exists a growing awareness and need to prepare for
and react to domestic and international security threats for wireless communication,
which is directly attributed to continuously increasing demand for high quality
security services and devices to protect user data transmitted over wireless channels.
Cryptography has emerged as a solution which plays mandatory role in information

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Ayushi Arya and Mohinder Malhotra

security against various attacks. For this purpose two types of cryptography systems
has been developed: Symmetric (secret key) & asymmetric (public key). Symmetric
key uses homogenous key for sender and receiver to encrypt the plain text and to
decrypt the cipher text, as in DES, 3DES, AES. Asymmetric key uses different key
for encryption and decryption of data such as in RSA algorithm. Symmetric
cryptography is more worthy for the encryption of a huge amount of data. AES is the
most recent of the four current algorithms approved for federal in the United States by
the National Institute of Standards and Technology (NIST) and widely accepted to
replace old standard DES as the new symmetric encryption algorithm [2]. The AES
algorithm is a symmetric block cipher that processes data blocks of 128 bits using a
cipher key of length 128, 192, or 256 bits. Each data block consists of a 4 4 array of
bytes called the state, on which the basic operations of the AES algorithm are
performed [2].The proposed AES algorithm in this paper differs from conventional
AES as it is using 200 bits block size and 200 bits key size both. Number of rounds is
constant and equal to ten in this algorithm. The key expansion and substitution box
generation are done in the same manner as in conventional AES block cipher. AES
has 10 rounds for 128-bit keys, 12 rounds for 192-bit keys, and 14 rounds for 256-bit
keys [3].

2. PROPOSED ALGORITHM
Initiating Phase: Encryption Algorithm
At the beginning of encryption step, input of 200 bit is copied to the state array of 5*5
matrix. The data bytes are filled initially in columns then in rows. After that next step
initial round key addition is performed, following to that ten rounds of encryption is
performed. The first nine rounds are similar with minor difference in its final round.
As described below in fig1 each of the first nine rounds follows four transformations:
Sub byte;
Shift rows;
Mix columns;
Add round Key.
In last and final step mix column transformation is not performed.

Figure 1 Encryption Phase for AES algorithm

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Effective AES Implementation

2.1 Sub bytes Transformation

In this transformation step, each of the byte in the state matrix is replaced with
another byte as per the S-box (Substitution Box) as its name implied. The S-box is
generated initially by calculating the respective reciprocal of that byte in GF (2^8) and
then affine transform is applied. The S-box used for this transformation is given in
table 1 below:

Table 1 S Box [3]

2.2. Shift Rows Transformation

In this step, bytes in the first row of the State remains unchanged. The second, third,
fourth and fifth rows of the state shift cyclically to the left by one byte, two bytes,
three bytes and four bytes respectively, as illustrated below In Fig. 2 [1].

Figure 2 Shift Row Transformation

2.3 Mix Column Transformations

As the name implies this operation mixes the bytes in each column by multiplication
of the state with a fixed polynomial matrix [2]. It completely alters the scenario of the
cipher even if all the bytes looks very similar to each other. The Inverse Polynomial
Matrix is the reciprocal of the polynomial matrix does exist in order to reverse the
mix column transformation. Here, both of the matrixes are drawn below in fig.3 and
fig.4 respectively.

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Ayushi Arya and Mohinder Malhotra

Figure 3 Polynomial Matrix for mix column transformation [3]

Figure 4 Inverse polynomial matrix for Mix Column Transformation

2.4. AddRoundKey Transformation

In AddRound Key transformation, a round key is added to the State by using bit wise
Exclusive-OR (XOR) operation.

3. DECRYPTION ALGORITHM
Decryption is the process of decoding the data into plain text that has been encrypted
into the secret form. The Decryption structure for proposed algorithm as shown below
in figure.5 is obtained by simply inverting the encryption structure which is explained
above. In accordance with the transformations steps in the encryption, Inv Sub Bytes,
Inv Shift Rows, Inv Mix Columns, and Add RoundKey are the transformations used
in the decryption as shown in Fig. below. The round keys are the same as those in
encryption generated by Key Expansion, but are inverted before use (used in reverse
order )[1].

Figure 5 Decryption Structure of Proposed Algorithm

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Effective AES Implementation

3.1. Inv SubBytes Transformation

Inv Sub Bytes is the inverse transformation of Sub Bytes, in which the inverse S-box
is applied to individual bytes in the State. The inverse S-box is constructed by first
applying the inverse of the affine transformation in (1), then computing the
multiplicative inverse in GF(2^8). The inverse S-box used for this transformation is
given in table 2 below:
Table 2 Inverse S-Box

3.2. Inv Shift Rows Transformation

Inv Shift Rows as its name implied is the inverse transformation of Shift Rows. In this
step , the bytes in the first row of the State remains same; while second row is shifted
cyclically by one byte , same as third row by two bytes fourth row by three bytes and
fifth rows are shifted cyclically by four bytes to the right Direction [1].

3.3. Inv Mix Columns Transformation

Inv Mix Column is the inverse transformation step of Mix Columns. Function. Mix
Column transformation is little bit complicated as compared to other steps as it
involves severely the byte multiplication under GF (2^8). The whole state is to be
multiplied with pre-defined matrix called Inverse Polynomial Matrix as illustrated in
Figure 4.
Key Expansion: Key expansion in AES is difficult task to perform, as it uses several
transformations. The key is expanded in the same manner as in conventional AES
algo. Following is the Pseudo code for the key expansion:
Key Expansion (byte Key [5*Nk] word W [Nb*(Nr+1)])
{
for (i = 0; i<Nk; i++)
W[i] = (Key [5*i], Key [5*i+1], Key [5*i+2], Key [5*i+3]), Key [5*i+4]);
for (i = Nk; i<Nb * (Nr + 1); i++)
{
temp = W [i - 1];
if (i % Nk == 0)
temp = SubByte(RotByte(temp)) ^ Rcon[i / Nk];

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W[i] = W [i - Nk] ^ temp;

}

4. EXPERIMENT AND RESULT

4.1. Encryption and decryption time
The encryption and decryption time is one of the very important parameter while
observing performance of any kind cipher. Although encryption takes long time as
compared to decryption. Several symmetric block ciphers (specifically ones like AES,
DES, Blowfish, RC5) will take the same amount of time (within measurement error)
for encryption and decryption, when operating on a single block (e.g., 128-bits for
AES). It appears different when encrypting/decrypting multiple blocks.
Fig 6.1 and Fig 6.2 below shows how much time the various AES standards will
take in encryption process and in decryption process for large data size respectively

Figure 6.1. Comparison of encryption time of algorithms for large data

Figure 6.2 Comparison of decryption time of algorithms for large for large data
From the above graphs, it can be observed that for large block of data AES-200
encryption time per bit is reduced up to 20% and decryption time per bit is increased
up to 25%.

4.2. Throughput
The throughput is defined as number of bits that can be encrypted or decrypted during
one unit of time. As it was explained previously hat all AES variant has equal block

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Effective AES Implementation

size of 128 bits and the proposed algorithm has block size of 200 bits. Thus, in form
of equation the throughput may be defined as:
=128/
=200/
Where,
is representation of throughput for conventional algorithms,
is representation of throughput for proposed algorithm,
denotes the
time taken to encrypt the 128 bit block message,
represents time taken to
encrypt the 200 bit block message of conventional algorithm. In Fig 7.1 below,
throughput for encryption side is drawn while the throughput at the decryption side is
plotted in Fig 7.2.

Fig 7.1: Comparison of throughput at Encryption side

Figure 7.2 Comparison of Throughput at Decryption side

From the above plots, it is observed that the throughput at encryption end of AES200 is 15% more than AES-128, 20% more than AES-192 and 30% more than AES256. The decryption process of AES-200 is slower than conventional AES. It can be
seen from the graph that the proposed algorithm is 50% slower from AES-128, 40%
from AES-192, and 25% from AES-256.

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5. CONCLUSION
The work explained in this paper represents a new AES model using large block size
with 200 bits instead of conventional AES using 128 bit block size. The block used in
this model comprises of 5 no. of rows as well as columns i.e. 5*5 matrix. Increased
matrix size doesnt cause any change to the basic functional operations. Thus all the
steps are same as used in conventional AES algorithm excluding the Mix Column
Step transformation only. In mix column transformation function in finite filed
diffusion occurs n form of multiplication of matrix. As weve used large block size,
thus it requires a new 5* 5 matrix to enable the matrix multiplication [3] . In this
paper initially we have compared encryption and decryption time for various AES
standards and then compared the same with our proposed algorithms time. Generally
encryption time is longer than decryption time because encryption takes place
sequentially while decryption takes place in parallel manner. Weve concluded that
for large block of data AES-200 encryption time per bit is reduced up to 20% and
decryption time per bit is increased up to 25% than conventional AES. Later on, we
compared the throughput of various AES standards and concluded that that the
throughput at encryption end of AES-200 is 15% more than AES-128, & 20% more
than AES-192 and 30% more than AES-256. The decryption process of AES-200 is
slower than conventional AES. On the basis of Security the proposed model is tested
by performing: Strict Avalanche Criterion and Bit Independence Criterion. SAC
reveals the probability of the bit change while the BIC reveals the correlation that
output bit possess. Both criteria analyzed that the proposed algorithm falls within the
desired level of security. Hence, it can be said that the proposed model is secure and
can be highly preferred for huge data communication.

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AUTHOR PROFILE
AYUSHI ARYA Received her B. Tech Degree in Bio Medical Engineering from
CITM, Faridabad, (Maharishi Dayanand University) in 2012 and she is M. Tech
student now in Royal Institute of Management and Technology affiliated to
DCRUST, Haryana, respectively. She had worked as an Application and service
engineer for Medical Devices Industries. Her research interests include medical with
electronics, Telecommunication, cryptography, Scope of electronics and
communication in field of medical devices.
MOHINDER MALHOTRA Head of Department, (Dept. of Electronics and
Communication Engineering), Royal Institute of Management and Technology,
Affiliated to DCRUST, Haryana.

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