CHAPTER

1
INTRODUCTION

Automatic car parking system helps to minimize the car parking

area. In the modern world, where parking-space has become a very big
problem and in the era of miniaturization, it is become a very crucial
necessity to avoid the wastage of space in modern, big companies and
apartments etc. In places where more than 100 cars need to be
parked, this system proves to be useful in reducing wastage of space.
If this automatic car parking system if implemented to many floors,
enables the parking of vehicles floor after floor and thus reducing the
space used. Here any number of cars can be parked according to the
requirement. This makes the system modernized and even a space-
saving one.

In this project, it is implemented only to a single floor with two

slots representing two parking areas. Path following principle is used to
keep the car in track itself to avoid any possibility of crash. Using
Infrared (IR) transmitters and receivers, the model checks for the free
space and sends the signal to the vehicle, if available. A LED is
mounted at the entrance of the lot. If there are no free spaces
available for parking, then it will glow. In this case, the driver of the car
should not leave the car to park. If any car is left to park in the lot even
after the LED is glowing, then the car will simply goes to the exit place
of the parking lot.

1
 CHAPTER 2
BLOCK DIAGRAM

This project uses Infrared(IR) transmitter and receiver units to

trace the path and to check whether or not the free space is available.
The heart of the project is the microcontroller ATMEL89c52 which
controls the whole system. Further the signal from the controller to the
vehicle is sent through DC motor driver (ULN 2003) and which in turn is
connected to the relay circuit. Two ends of each motor are connected
to two relay circuits to capture the signal from the processor.
Block diagram of automatic car parking system is as shown
below in fig. 2.1.

Fig 2.1: Block diagram of automatic car parking system

Details of the block diagram:

It consists of following units:

2
IR Transmitter and receiver:

For path following purpose or to check the existence of free

space (The parking area).

Controller:

Core of the project. It controls all the activities taking place in

this project.

Motor Driver:

Used for controlling the DC motor. It is connected to the relay

unit first which is further connected to the motor of the vehicle which is
to be driven.

Relay:

Relay-switches contacts when powered by a driver. The relay

subsystem is an electrically-operated switch. The relay switches when
the signal coming into the driver is high.

Left and Right Motors:

Used to run the vehicle as for the requirement. These are directly
connected to the back wheels of the vehicle for controlling purpose.

Software used:

3
 Assembly level programming of AT8052 microcontroller.

CHAPTER 3
HARDWARE DESCRIPTION

3.1 MICROCONTROLLER ATMEL 89C52:

The AT89C52 microcontroller is the main part of this project. The

chip that processes the user data and executes the same. The software
inherited in this chip manipulates the data and sends the result for
visual display.

Introduction to Microcontroller:

The general definition of a microcontroller is a single chip

computer, which refers to the task that they contain all of the
functional sections (CPU, RAM, ROM, I/O, PORTS and timers) of a
traditionally defined computer on a single integrated circuit. Some
experts even describe them as special purpose computers with several
qualifying distinctions that separate them from other computers.

Microcontrollers are dedicated to one task and run one specific

program. The program is stored in ROM and generally does not
change. Microcontrollers are often low power devices.

A microcontroller has a dedicated input device and often has a

LCD display for output. A microcontroller also takes input from the
device it is controlling and controls the device by sending signals to
different components in the device. A microcontroller is often small
and low cost. The components are chosen to minimize and to be as

4
inexpensive as possible. Microcontroller chips are manufactured with
powerful capabilities and the end user determines exactly how the
device will function. Often this makes a dramatic difference in the cost
and complexity of a particular design.

Microcontroller 89C52 Features:

 Compatible with MCS-51™ Products

 8K Bytes of In-System Reprogrammable Flash Memory
 Endurance: 1,000 Write/Erase Cycles
 Fully Static Operation: 0 Hz to 24 MHz
 Three-level Program Memory Lock
 256 x 8-bit Internal RAM
 32 Programmable I/O Lines
 Three 16-bit Timer/Counters
 Eight Interrupt Sources
 Programmable Serial Channel
 Low-power Idle and Power-down Modes

Description of ATMEL 89C52:

The AT89C52 is a low-power, high-performance CMOS 8-bit

microcomputer with 8K bytes of Flash programmable and erasable
read only memory (PEROM). The device is manufactured using Atmel’s
high-density nonvolatile memory technology and is compatible with
the industry-standard 80C51 and 80C52 instruction set and pinout. The
on-chip Flash allows the program memory to be reprogrammed in-
system or by a conventional nonvolatile memory programmer. By
combining a versatile 8-bit CPU with Flash on a monolithic chip, the
Atmel AT89C52 is a powerful microcomputer which provides a highly-

5
flexible and cost-effective solution to many embedded control
applications.

Fig 3.1: Pin Configurations of ATMEL 89C52

6
 Fig 3.2: Architecture of ATMEL 89C52

Pin diagram of the microcontroller AT89C52 is as shown in fig.

3.1 and the architecture is as given in 3.2.

7
 The AT89C52 provides the following standard features: 8K bytes
of Flash, 256 bytes of RAM, 32 I/O lines, three 16-bit timer/counters, a
six-vector two-level interrupt architecture, a full-duplex serial port, on-
chip oscillator, and clock circuitry. In addition, the AT89C52 is designed
with static logic for operation down to zero frequency and supports two
software selectable power saving modes. The Idle Mode stops the CPU
while allowing the RAM, timer/counters, serial port, and interrupt
system to continue functioning. The Power-down mode saves the RAM
contents but freezes the oscillator, disabling all other chip functions
until the next hardware reset.

Pin Description:

VCC:
Supply voltage, 6V DC.

GND:
Ground, 0V DC.

Port 0:

Port 0 is an 8-bit open drain bi-directional I/O port. As an output

port, each pin can sink eight TTL inputs. When 1s are written to port 0
pins, the pins can be used as high impedance inputs. Port 0 can also be
configured to be the multiplexed low order address/data bus during
accesses to external program and data memory. In this mode, P0 has
internal pull ups.

Port 0 also receives the code bytes during Flash programming

and outputs the code bytes during program verification. External pull
ups are required during program verification.

8
Port 1:

Port 1 is an 8-bit bi-directional I/O port with internal pull ups. The
Port 1 output buffers can sink/source four TTL inputs. When 1s are
written to Port 1 pins, they are pulled high by the internal pull ups and
can be used as inputs. As inputs, Port 1 pins that are externally being
pulled low will source current (IIL) because of the internal pull ups. In
addition, P1.0 and P1.1 can be configured to be the timer/counter 2
external count input (P1.0/T2) and the timer/counter 2 trigger input
(P1.1/T2EX), respectively, as shown in the table 3.1. Port 1 also
receives the low-order address bytes during Flash programming and
verification.

Table 3.1: Alternate functions of port 1

Port 2:

Port 2 is an 8-bit bi-directional I/O port with internal pull ups. The
Port 2 output buffers can sink/source four TTL inputs. When 1s are
written to Port 2 pins, they are pulled high by the internal pull ups and
can be used as inputs. As inputs, Port 2 pins that are externally being
pulled low will source current (IIL) because of the internal pull ups.

9
 Port 2 emits the high-order address byte during fetches from
external program memory and during accesses to external data
memory that uses 16-bit addresses (MOVX @ DPTR). In this
application, Port 2 uses strong internal pull-ups when emitting 1s.
During accesses to external data memory that uses 8-bit addresses
(MOVX @ RI), Port 2 emits the contents of the P2 Special Function
Register. Port 2 also receives the high-order address bits and some
control signals during Flash programming and verification.

Port 3:

Port 3 is an 8-bit bi-directional I/O port with internal pull ups. The
Port 3 output buffers can sink/source four TTL inputs. When 1s are
written to Port 3 pins, they are pulled high by the internal pull ups and
can be used as inputs. As inputs, Port 3 pins that are externally being
pulled low will source current (IIL) because of the pull ups.

Port 3 also serves the functions of various special features of the

AT89C51, as shown in the table 3.2. Port 3 also receives some control
signals for Flash programming and verification.

Table 3.2: Alternate functions of port 3

10
RST:
Reset input. A high on this pin for two machine cycles while the
oscillator is running resets the device.
ALE/PROG:

Address Latch Enable is an output pulse for latching the low byte
of the address during accesses to external memory. This pin is also the
program pulse input (PROG) during Flash programming.
In normal operation, ALE is emitted at a constant rate of 1/6 the
oscillator frequency and may be used for external timing or clocking
purposes. Note, however, that one ALE pulse is skipped during each
access to external data memory.
If desired, ALE operation can be disabled by setting bit 0 of SFR
location 8EH. With the bit set, ALE is active only during a MOVX or
MOVC instruction. Otherwise, the pin is weakly pulled high. Setting the
ALE-disable bit has no effect if the microcontroller is in external
execution mode.

PSEN:

Program Store Enable is the read strobe to external program

memory. When the AT89C52 is executing code from external program
memory, PSEN is activated twice each machine cycle, except that two
PSEN activations are skipped during each access to external data
memory.

EA/VPP:

External Access Enable. EA must be strapped to GND in order to

enable the device to fetch code from external program memory
locations starting at 0000H up to FFFFH. Note, however, that if lock bit

11
1 is programmed, EA will be internally latched on reset. EA should be
strapped to VCC for internal program executions.

This pin also receives the 12-volt programming enable voltage

(VPP) during Flash programming when 12-volt programming is
selected.

XTAL1:

Input to the inverting oscillator amplifier and input to the internal

clock operating circuit.

XTAL2:

Output from the inverting oscillator amplifier.

Special Function Registers:

A map of the on-chip memory area called the Special Function

Register (SFR) space is shown in Table 3.3. Note that not all of the
addresses are occupied, and unoccupied addresses may not be
implemented on the chip. Read accesses to these addresses will in
general return random data, and write accesses will have an
indeterminate effect.
User software should not write 1s to these unlisted locations,
since they may be used in future products to invoke new features. In
that case, the reset or inactive values of the new bits will always be 0.

12
Table 3.3: AT89C52 SFR Map and Reset Values

13
Timer 2 Registers:

Control and status bits are contained in registers T2CON is

shown in Table 3.4 for Timer 2. The register pair (RCAP2H, RCAP2L) are
the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-
bit auto-reload mode.

Table 3.4: T2CON – Timer/Counter 2 Control Register

Interrupt Registers:

The individual interrupt enable bits are in the IE register. Two

priorities can be set for each of the six interrupt sources in the IP
register.

14
Data Memory:

The AT89C52 implements 256 bytes of on-chip RAM. The upper

128 bytes occupy a parallel address space to the Special Function
Registers. That means the upper 128 bytes have the same addresses
as the SFR space but are physically separate from SFR space.

When an instruction accesses an internal location above address

7FH, the address mode used in the instruction specifies whether the
CPU accesses the upper 128 bytes of RAM or the SFR space.
Instructions that use direct addressing access SFR space.
For example, the following direct addressing instruction
accesses the SFR at location 0A0H (which is P2).

MOV 0A0H, #data

Instructions that use indirect addressing access the upper 128

bytes of RAM. For example, the following indirect addressing
instruction, where R0 contains 0A0H, accesses the data byte at
address 0A0H, rather than P2 (whose address is 0A0H).

MOV @R0, #data

Note that stack operations are examples of indirect addressing,

so the upper 128 bytes of data RAM are available as stack space.

Timer 0 and 1:

Timer 0 and Timer 1 in the AT89C52 operate the same way as

Timer 0 and Timer 1 in the AT89C51.

15
Timer 2:

Timer 2 is a 16-bit Timer/Counter that can operate as either a

timer or an event counter. The type of operation is selected by bit C/T2
in the SFR T2CON [shown in Table 3.4]. Timer 2 has three operating
modes: capture, auto-reload (up or down counting), and baud rate
generator, as shown in table 3.5. The modes are selected by bits in
T2CON, as shown in Table 3. Timer 2 consists of two 8-bit registers,
TH2 and TL2. In the Timer function, the TL2 register is incremented
every machine cycle. Since a machine cycle consists of 12 oscillator
periods, the count rate is 1/12 of the oscillator frequency.

Table 3.5: Timer 2 Operating Modes

In the Counter function, the register is incremented in response

to a 1-to-0 transition at its corresponding external input pin, T2. In this
function, the external input is sampled during S5P2 of every machine
cycle. When the samples show a high in one cycle and a low in the
next cycle, the count is incremented. The new count value appears in
the register during S3P1 of the cycle following the one in which the
transition was detected. Since two machine cycles (24 oscillator
periods) are required to recognize a 1-to-0 transition, the maximum
count rate is 1/24 of the oscillator frequency. To ensure that a given
level is sampled at least once before it changes, the level should be
held for at least one full machine cycle.

16
Capture Mode:

In the capture mode, two options are selected by bit EXEN2 in

T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon
overflow sets bit TF2 in T2CON. This bit can then be used to generate
an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a
1- to-0 transition at external input T2EX also causes the current value
in TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively.
In addition, the transition at T2EX causes bit EXF2 in T2CON to be set.
The EXF2 bit, like TF2, can generate an interrupt. The capture mode is
illustrated in Figure 3.3.

Auto-reload (Up or Down Counter):

Timer 2 can be programmed to count up or down when

configured in its 16-bit auto-reload mode. This feature is invoked by
the DCEN (Down Counter Enable) bit located in the SFR T2MOD as
shown in table- 3.6. Upon reset, the DCEN bit is set to 0 so that timer 2
will default to count up. When DCEN is set, Timer 2 can count up or
down, depending on the value of the T2EX pin.

Figure 3.3: Timer 2 in Capture Mode

17
 Figure 3.4 shows Timer 2 automatically counting up when DCEN
= 0. In this mode, two options are selected by bit EXEN2 in T2CON. If
EXEN2 = 0, Timer 2 counts up to 0FFFFH and then sets the TF2 bit
upon overflow. The overflow also causes the timer registers to be
reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in
Timer in Capture ModeRCAP2H and RCAP2L are preset by software. If
EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by
a 1-to-0 transition at external input T2EX. This transition also sets the
EXF2 bit. Both the TF2 and EXF2 bits can generate an interrupt if
enabled. Setting the DCEN bit enables Timer 2 to count up or down, as
shown in Figure3.5. In this mode, the T2EX pin controls the direction of
the count. Logic 1 at T2EX makes Timer 2 count up. The timer will
overflow at 0FFFFH and set the TF2 bit. This overflow also causes the
16-bit value in RCAP2H and RCAP2L to be reloaded into the timer
registers, TH2 and TL2, respectively.

Figure 3.4: Timer 2 Auto Reload Mode (DCEN = 0)

18
 Logic 0 at T2EX makes Timer 2 count down. The timer
underflows when TH2 and TL2 equal the values stored in RCAP2H and
RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be
reloaded into the timer registers. The EXF2 bit toggles whenever Timer
2 overflows or underflows and can be used as a 17th bit of resolution.
In this operating mode, EXF2 does not flag an interrupt.

Table 3.6: T2MOD – Timer 2 Mode Control Register

Figure 3.5: Timer 2 Auto Reload Mode (DCEN = 1)

Baud Rate Generator:

19
 Timer 2 is selected as the baud rate generator by setting TCLK
and/or RCLK in T2CON (Table 3.4). Note that the baud rates for
transmit and receive can be different if Timer 2 is used for the receiver
or transmitter and Timer 1 is used for the other function. Setting RCLK
and/or TCLK puts Timer 2 into its baud rate generator mode, as shown
in Figure 3.6.

Figure 3.6: Timer 2 in Baud Rate Generator Mode

The baud rate generator mode is similar to the auto-reload

mode, in that a rollover in TH2 causes the Timer 2 registers to be
reloaded with the 16-bit value in registers RCAP2H and RCAP2L, which
are preset by software. The baud rates in Modes 1 and 3 are
determined by Timer 2’s overflow rate according to the following
equation. The Timer can be configured for either timer or counter
operation. In most applications, it is configured for timer operation

20
(CP/T2 = 0). The timer operation is different for Timer 2 when it is used
as a baud rate generator.

Normally, as a timer, it increments every machine cycle (at 1/12

the oscillator frequency). As a baud rate generator, however, it
increments every state time (at 1/2 the oscillator frequency).

The baud rate formula is given below.

where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L

taken as a 16-bit unsigned integer. Timer 2 as a baud rate generator is
shown in Figure 3.6. This figure is valid only if RCLK or TCLK = 1 in
T2CON. Note that a rollover in TH2 does not set TF2 and will not
generate an interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition
in T2EX will set EXF2 but will not cause a reload from (RCAP2H,
RCAP2L) to (TH2, TL2). Thus when Timer 2 is in use as a baud rate
generator, T2EX can be used as an extra external interrupt.

Note that when Timer 2 is running (TR2 = 1) as a timer in the

baud rate generator mode, TH2 or TL2 should not be read from or
written to. Under these conditions, the Timer is incremented every
state time, and the results of a read or write may not be accurate. The
RCAP2 registers may be read but should not be written to, because a
write might overlap a reload and cause write and/or reload errors. The
timer should be turned off (clear TR2) before accessing the Timer 2 or
RCAP2 registers.

21
Oscillator characteristics:

XTAL1 and XTAL2 are the input and output, respectively. Either a
quartz crystal or ceramic resonator may be used. To drive the device
from an external clock source, XTAL2 should be left unconnected while
XTAL1 is driven, as shown in Figure 3.7. There are no requirements on
the duty cycle of the external clock signal, since the input to the
internal clocking circuitry is through a divide-by-two flip-flop, but
minimum and maximum voltage high and low time specifications must
be observed.

Figure 3.7: Oscillator Connections

Note: C1, C2 = 30 pF ± 10 pF for Crystals = 40 pF ± 10 pF for Ceramic

Resonators

Idle Mode:

In idle mode, the CPU puts itself to sleep while all the on chip
peripherals remain active. The mode is invoked by software. The
content of the on-chip RAM and all the special functions registers

22
remain unchanged during this mode. The idle mode can be terminated
by any enabled interrupt or by a hardware reset.

Note that when idle mode is terminated by a hardware reset, the

device normally resumes program execution from where it left off, up
to two machine cycles before the internal reset algorithm takes
control. On-chip hardware inhibits access to internal RAM in this event,
but access to the port pins is not inhibited. To eliminate the possibility
of an unexpected write to a port pin when idle mode is terminated by a
reset, the instruction following the one that invokes idle mode should
not write to a port pin or to external memory.

Power-down Mode:

In the power-down mode, the oscillator is stopped, and the

instruction that invokes power-down is the last instruction executed.
The on-chip RAM and Special Function Registers retain their values
until the power-down mode is terminated. The only exit from power-
down is a hardware reset. Reset redefines the SFRs but does not
change the on-chip RAM. The reset should not be activated before VCC
is restored to its normal operating level and must be held active long
enough to allow the oscillator to restart and stabilize. Status of
external pins during idle and power down modes is as shown in table
3.7.

23
 Table 3.7: Status of external pins during idle and power down
modes

3.2 Circuit To Control Operation of The Robot:

+5V
1K

IR
Fig 3.8: Connection from controller to sensors & motor driver

Connections from the controller to sensors and motor driver are

PD
100
shown in fig.3.8. It contains six IR transmitters and five IR receivers in
total. Two sets of transmitter and receivers are used for following the
path, one set is for getting the signal from the parking lot if the free

24
space is available and the remaining are to check whether or not the
free space is available.

Microcontroller is the core of this project. When the car is left at

the entrance, it follows the black path until it receives the signal
indicating availability of free space to park. Two set of IR transmitter
and receivers are used to indicate the path to the vehicle from the
bottom portion of it. If left sensor is low, controller assumes that
vehicle has moved left from the track and it sends signals to turn the
vehicle right and in the case if right sensor is low, then it sends the
signal to turn the vehicle left until both the sensors get activated. If
both the sensors are high, it indicates that vehicle is exactly on the
required path and thus it moves forward and in the case if both the
sensors are low, it is the indication that vehicle is entirely away from
the track and thus to avoid collision, controller sends the signal to stop
the vehicle.

One IR transmitter and one receiver are mounted on both sides

of the parking area in line of sight condition. If the receiver receives
the signal transmitted from the transmitter, it is the indication that
there is no obstacle and the free space is available. If so, it activates
another IR transmitter to send the signal to the vehicle, and if not, this
IR transmitter will be low and thus vehicle will not get any signal from
that parking slot.

In the entrance of the parking lot, one LED is mounted to indicate

if there is no space available for parking. Viz, if all the parking areas
are occupied, then it will be glowing. In this case, the driver should not
leave the vehicle in the lot for parking. Even after seeing the LED
signal, if one leaves the car to park in fully occupied condition, then
the car will simply come to the exit bay.

25
 If in case, after following the path given and the car receives the
signal indicating the availability of the free space, it will go and park in
that particular area using the fixed assembly code for it and after some
delay, using exactly opposite principle used in entry side, the car will
go back to the exit bay of the parking lot and stops at the exit.

3.3 IR transmitter:

Fig 3.9: Circuit Diagram of IR transmitter

IR transmitter is designed by using IC555 in astable state.

Working and circuit diagram of IR transmitter is given in fig 3.9.

Components used:

Resistor R1 1.2K ohms

26
 R2 1K POT
R3 1K ohms
RO1 150 ohms
RO2 20 ohms
Capacitor C1, C2 0.1Uf

Design:

In astable state, ON-time ton = 0.693*(R1+R2)*C

Take C=0.1uF and ton= 150 usec,
Then we get R1=1.2 K AND R3=1K ohms.

555 Timer Astable Circuit:

Fig. 3.10 shows an astable 555 timer circuit. The astable 555
timer circuit outputs a series of pulses.

Fig 3.10: Astable 555 Timer Circuit

27
 When the circuit is first turned on, the discharge pin is
disconnected from ground and output pin is set high because the
trigger pin is below 33% Vcc Voltage. The capacitor, C, starts to charge
through resistors R1 and R2. The threshold pin is used to detect when
the voltage across the capacitor reaches 66.6% Vcc voltage. When the
voltage across the capacitor reaches 66.6% Vcc voltage, the output pin
is set low and the discharge pin is connected back to ground. When the
discharge pin is connected back to ground, the capacitor starts
discharging though resistor R2. When the voltage across the capacitor
reaches 33.3% Vcc voltage, the cycle repeats and creates a series of
output pulses. An astable circuit triggers from previous output pulse
whereas a monostable circuit requires an externally applied trigger.

The output pin oscillates from high to low creating a series of

output pulses. The duration the output pin
stays high , tHIGH, is given below:

The duration the output pin stays low, tLOW, is given below:

The frequency, f, of the series of pulses is:

The astable 555 timer circuit can be used in the following

applications:
• Modulate transmitters such as ultrasonic and IR transmitters
• Create an accurate clock signal (Example: There is a pulse
accumulator pin on the 68HC11 microcontroller that counts pulses. You
can apply an astable 555 timer circuit set at 1 Hz frequency to the

28
pulse accumulator pin and create a seconds counter within the
microcontroller. The pulse accumulator will be covered in later in the
course.)
• Turn on and off an actuator at set time intervals for a fixed duration.

Working:

IR transmitter is designed by using IC 555 in astable state. In the

astable Operation, the trigger terminal and the threshold terminal are
connected so that a self-trigger is formed, operating as a multi
vibrator. When the timer output is high, its internal discharging Tr
turns off and the VC1 increases by exponential function with the time
constant (R1+R2)*C.

3.4 IR receiver:

IR receiver is designed by using IC555 in monostable state.

Working and circuit diagram of IR receiver is as given in fig 3.11.

29
 Fig 3.11: Circuit Diagram of IR receiver

Components used:

Resistor R1 100 ohms

R2, R3 10K ohms
Ro 470 ohms
Transistor BC 548
Capacitor C1, C2 0.01u F
LED

IR receiver is designed by using timer 555 in monostable state.

555 Timer Monostable Circuit:

30
 Fig. 3.12 shows a monostable 555 timer circuit. The monostable
circuit outputs one pulse for each high to low transition of the trigger
pin.

Fig 3.12: Monostable 555 Timer Circuit

The discharge pin is internally connected to ground. The
discharge pin is disconnected from ground and output pin is set high
when the trigger pin transitions from Vcc to 33% Vcc Voltage. The
capacitor, C, starts to charge through resistor, R. The threshold pin is
used to detect when the voltage across the capacitor reaches 66.6%
Vcc voltage. When the voltage across the capacitor reaches 66.6% Vcc
voltage, the output pin is set low and the discharge pin is connected
back to ground. When the discharge pin is connected back to ground,
the capacitor is discharged.

The length of the output pulse depends on when the capacitor

reaches 66.6% Vcc voltage. This rate is determined by the charge

31
capacity of the capacitor, C, and resistance, R. The length of the output

pulse, is:

The monostable 555 timer circuit can be used in the following

applications:
• Debounce a momentary/pushbutton switch
• Turning on an actuator for a set period of time
• Turn an output from a resistive sensor from analog signal to digital
signal. ( Example: A potentiometer is a variable resistor. A project
requires determining the position of a potentiometer used for user
input. All analog to digital (A/D) converters on a microcontroller have
already been used but there are some digital inputs and outputs
available. The potentiometer can be used as the resistor in a
monostable 555 timer circuit.

The microcontroller can then trigger the monostable circuit and

measure tP since tP now depends on the position of the
potentiomenter.)

Working:

When both transmitter and receiver are in line of sight, receiver

directly gets IR signal from the transmitter and during this the
transistor is turned off. Hence pin2 is connected to Vcc and it will not
trigger timer555. During this the output at the receiver will be low (LED
is OFF).

32
 When IR transmitter and receiver are not in line of sight,
transistor at the receiver side is turned on and a logic low signal is
applied to pin2 of timer555 (pin2 is grounded). It will trigger timer555
and the output at the receiver side will be high (LED is ON).

3.5 Driver Circuit:

Motor means a permanent-magnet, direct-current (DC) motor of

the sort used in toys, models, cordless tools, and robots. These motors
are particularly versatile because both their speed and direction can be
readily controlled; speed by the voltage or duty cycle of their power
supply, and direction by its polarity. DC motors also work as
generators. Since generators slow down when they are heavily loaded,
DC motors can be electronically breaked. Basic connection to DC motor
is as showm in fig. 3.13. Control means at least on/off and direction
control. Variable speeds are also desirable.

When the motor is disconnected from the battery, it is off; when

it is connected with the red wire to the + terminal and black to – it
turns forward; and when the wires are reversed, the motor turns
backwards. The motor/generator braking effect can also be
demonstrated. Disconnect the
battery and spin the motor shaft with
the fingers, noticing how freely it
spins. Now connect (short) the
motor power wires together and
try it again. The motor is harder to
spin. The short circuit
load on its generator output
makes it harder to turn.

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 Figure 3.13: DC Motor Basics

Manual Motor Controllers:

Figure3.14 shows how the understanding of DC motor control

translates into five manual motor-control circuits using switches. Fig.
3.14A is the most closely related to the science-fair demo. A single-
pole, single-throw (SPST) switch turns power to the motor on or off,
while a double-pole, double-throw (DPDT) switch controls the polarity
of the motor connections. The component that call a switch can
actually contain several switches, all activated by the same handle.
These joined switches are indicated on a schematic by a dotted line
joining their symbols. Each joined switch is referred to as a pole. So a
switch component containing two switches is a double-pole unit.

Throws refer to the number of circuits a switch can make. An

ordinary on/off switch makes or breaks just one connection, so it’s a

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single-throw switch. The direction switches at the top of Figure select
one of two connections, so they are double-throw switches.

Fig. 3.14 B uses a pair of SPDT switches to control direction and

on/off. If the two switches are set so that they both connect to the
same power-supply rail, the circuit breaks the motor using the
motor/generator principle. Fig. 3.14C is very similar, but uses four SPST
switches. These switches must be turned on and off in specific
combinations to run and stop the motor. Note that a couple of switch
settings are not allowed, because they would short out the power
supply.

It might consider Figures 3.14D and 3.14E to be cheater’s

solutions to the motor-controller problem. They use a second battery to
reverse the motor, thereby simplifying the arrangement of switches.
However, extra batteries mean extra weight and expense. And the
batteries may wear out at different rates, since in most applications
motors spend more time going in one direction or the other. Still, the
half-bridge design is worth knowing, because it can be very useful in
cheap, efficient, dual-motor designs.

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 Figure 3.14: Motor Controllers Using Manual Switches
3.6 RELAY (DPDT):

Schematic representation of relay connection is as given below

in fig. 3.15.

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 Fig 3.15: Schematic representation of relay connection

Relay-switches contacts when powered by a driver. The relay

subsystem is an electrically-operated switch. The relay switches when
the signal coming into the driver is high. It must be connected to a
Darlington or transducer driver subsystem.

Understanding the relay circuit:

The relay circuit uses a DPDT (Double-Pole, Double-Throw) relay.

Fig 3.16: Double Pole Double Throw Relay Switches

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 Fig 3.17: Relay Circuit

Relays use an electromagnetic coil to move the poles of a switch

when powered. There are three pairs of connections known as
common, normally open and normally closed as shown in fig.3.17. The
centre terminal block is the common (CO) connection and is connected
to either the upper or lower terminal block depending on the state of
the relay. When not switched, the centre terminal block is connected to
he normally closed (NC) lower terminal block. When switched, he
centre terminal block is connected to normally open (NO) upper
terminal block.

Switching Operation of Relay:

The relay coil is connected between the supply rail (+V) and the
input signal. This acts as load on the driver. When the input signal
coming into the relay subsystem is low, a potential difference across
the relay coil causes current to flow. It is this flow of current that
causes contacts to switch.
Connection from motor driver to the DPDT relay is as given in
fig.3.18. Output from the two points RLY1 and RLY1 are connected to
the same points of fig. 3.15. The remaining two points are connected
to same sets of another relay.

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Fig 3.18: Connection from Motor driver to DPDT Relay

39
 CHAPTER 4
SOFTWARE DESCRIPTION

4.1 KEIL SOFTWARE

Keil software is the leading vendor for 8/16 bit development tools
(ranked at first position in the 2004 embedded market study of the
embedded system and EE times magazine). Keil software is
represented worldwide in more than 40 countries. Since market
introduction is in 1988, the keil C51 compiler is the defacto industry
standard and supports more than 500 current 8051 device variants.

Keil software makes C compilers, macro assemblers, real time

kernels, debuggers, simulators, integrated environments and
evaluation boards for the 8051, 251, ARM and XC16X/C16X/ST10
microcontroller families.

Keil software is pleased to announce simulation support for the

ATMEL AT91 ARM family of microcontroller. The keil uvision debugger
simulates the complete ARM instruction sets well as the on-chip
peripherals each device in the AT91 ARM/thumb microcontroller family.
The integrated simulator provides completed peripheral simulation.
Other new features in the u vision debugger include:

1. An integrated software logic analyzer that measure I/O signals as

well as program variables and helps developers to create complex
signal processing algorithms.

40
 2. An execution profiler that measures time spent in each function,
source line and assembler instruction. Now developers can find
exactly where the program spends the most time.

“Using nothing more than the provided simulation support and

debugging scripts, developers can create a high fidelity simulation of
their actual target hardware and environment. No extra hardware or
test equipment is needed. The logic analyzer and execution profiler will
help developers when it comes time to develop and test signaling
algorithms” said Jon wards, president of keil software USA, Inc.

4.2 Flow Chart

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Flow chart for Right subroutine:

42
Flow chart for Left subroutine:

43
Flow chart for Park subroutine:

44
 CHAPTER 5
TESTING AND RESULT

This project has been tested in open environment. To check

working of the model, a two slot parking area has been made.

Initially when the car is left at the entrance of the parking area, it
checks each and every parking area. The car will be kept in a fixed
track using the path following principle over a black path. The parking
areas which come near to the entrance will have higher priority. If a
parking space is free then the car receives a signal from the IR
transmitter, goes and parks over there by following a fixed subroutine.
After some delay, it will come back using exactly opposite routine
which has been followed while parking the car and goes to exit path.

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 CHAPTER 6
APPLICATION, ADVANTAGES AND
LIMITATIONS

6.1 Applications of this project:

 It is a general project and can be implemented on any vehicle

(The vehicle must contain ECU).
 It will be more useful in the places where time is the important
criteria than the money.
 Parking strength can be increased by increasing the parking
area.
 This project can be implemented in the areas like: shopping
malls, movie theaters, hospitals, airports, railway stations etc.

6.2 Advantages:

 As the whole system is fully automatic, there will be no need of

any man power at any stage.
 The driver leaves the car in the entrance itself. So lot of his time
will be saved.
 No need for searching the free space.
 As whole system is controlled by microcontroller, chances of
collision are less.
 As it is fully machine controlled and there is no man power
involved, the parking space can be utilized efficiently.
 Added comfort to the driver.

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6.3 Limitations:

 At a time, only a single car can either park or exit.

 If the power supply to the lot is interrupted, then this system
goes down. So it requires an uninterrupted power supply to the
parking lot.
 If one single sensor is damaged, then the processor assumes
that particular parking area is occupied by another car only. So it
is necessary to continuously monitor working of those sensors.

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 CHAPTER 7
SCOPE FOR FUTURE IMPROVEMENTS

 Here in this project, in assembly code itself, it is made the

vehicle to go to exit bay. One can use a remote controller for
efficiently doing this work.
 Here an LED indicates if the parking area is full. A display unit
can be used instead of it.
 The parking area can be increased to any numbers in both
left and right sides. This project only two parking areas in the
left side.

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 CHAPTER 8
CONCLUSION

This is a general purpose car and one can implement this project
on any car. By implementing this project, one can save the work and
time of the driver/owner of the vehicle. If the driver wants to park the
vehicle manually and does not want to use this system, then it can
switched off. This project will work only if both the parking lot as well
as the car has been mounted with required set of sensors and the
driving circuitry.

Thus the head ache of searching free space and the time of the
driver of the vehicle will be saved to the great extent by using this
project.

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50