CHIEF PATRON

Dr.G.Tulasi Ram Das

Registration details

Honble Vice Chancellor,JNTUK, Kakinada

Registration fee:
For PG students &

PATRONS
Dr. E. V. Prasad

Research scholars
For faculty

Rector, JNTUK, Kakinada

Dr. G. V. R. Prasada Raju

Registrar, JNTUK, Kakinada

CO-PATRONS
Dr. K. Padma Raju

Principal, UCEK, JNTUK, Kakinada

200/500/-

:
:

Last date of Registration through E-mail

(without payment)
:26-03-2013
Intimation of selected candidates
: 29-03-2013
(by E-mail)
Last date of Registration (with required payment)
:15-04-2013

Dr. P. Subba Rao

Vice Principal, UCEK, JNTUK, Kakinada

CHAIRMAN
Dr. K. Babulu, Prof & Head
Department of ECE, UCEK, JNTUK, Kakinada

CO-ORDINATORS
Mr. K. Durga Ganga Rao, Asst. Professor
Ms. P. Pushpa Latha, Asst. Professor
ADVISORY COMMITTEE
Dr.K. Satya Prasad, Professor
Dr.B.Prabhakara Rao, Professor
Dr.S.Srinavas Kumar, Professor
Dr. I. Santi Prabha, Professor
Dr.M.Sailaja, Professor
Dr. A. Mallikharjuna Prasad, Professor
Sri. E.V. Narayana, Asst. Professor
Smt.U.V.Ratna Kumari, Asst. Professor,
ORGANIZING COMMITTEE
Dr. B. T. Krishna, Assoc. Professor
Smt. K. Rama Devi, Asst. Professor
Mr. K. Rajasekhar, Asst. Professor
Sri. P. Vinay Kumar, Asst. Professor
Sri. R. Madhu, Asst. Professor
Smt. A. Rajani, Asst. Professor
Smt. K. Jhansi Rani, Asst. Professor
Smt. B. Leela Kumari, Asst. Professor

Selected candidates in attending the workshop

should send the filled registration form along with DD in
favor of Coordinator, NW-AVLSIT 2013, Payable at SBI,
Govt. Engg. College Campus, Kakinada, (Code No.1358) on
or before 15th April 2013. The registration fee includes Tea,
lunch and workshop material. All other expenses are to be
borne by the participants. Accommodation will be provided
on prior request, on chargeable basis and subject to
availability.
Contact details:
Mr. K. Durga Ganga Rao
Ms. P. Pushpa Latha
E-mail ID :

9390961488
9705510601
nwavlsit@yahoo.com

RESOURCE PERSONS:
1.

Dr.K S R Krishna Prasad

Professor , Department Of ECE,
NIT, Warangal.

2.

Sri. K.Kranthi Kumar,

Senior Application Engineer,
Trident Tech Labs,
Hyderabad.

3.

Sri.N.Bala Dastagiri,
Application Engineer,
Trident Tech Labs,
Hyderabad.

ABOUT THE COLLEGE

WORKSHOP ON ADVANCED VLSI TECHNOLOGY

Jawaharlal Nehru Technological University Kakinada is

formed in the year 2008. JNTU College of Engineering,
Kakinada, is one of the constituent colleges of this
University playing a significant role since 1946 in
imparting technological education in the state of Andhra
Pradesh. It was a constituent college of Jawaharlal Nehru
Technological University, Hyderabad and recently this
Institute has been upgraded as Jawaharlal Nehru
Technological University Kakinada. It is located in the
costal districts of Andhra Pradesh having nearly 300
Engineering Colleges affiliated to this University. The
college won appreciation for judicious effective utilization
of TEQIP - I funds and has been under TEQIP - II, with
academic milestones to be scaled.

Nowadays VLSI Technology has been successfully

enjoying an exponential growth paralleled by the advances
in semiconductor fabrication. VLSI Technology has shown
its superiority in the design and development of industry
at cheaper cost. Educators at the Worlds most prestigious
engineering colleges and universities adopt Mentor
Graphics Tools not only because they easy to learn and
affordable to own- but because their specialty to develop
better Electronic products, faster and more cost- effective
powerful tools and methodologies to address the
challenges for next generation designs.

ABOUT THE DEPARTMENT

The Department of Electronics and Communication
Engineering in this Institute is the first department
established in the state of Andhra Pradesh as
Telecommunication Engineering Department in 1958 and
is one of the oldest in the country and later renamed as
Department of Electronics and Communication
Engineering. The Department of Electronics and
Communication Engineering, University College of
Engineering, Kakinada, JNTU Kakinada has contributed
many a stalwart to serve the mankind all throughout the
world through its committed academic legacy. Both the
Department of Electronics and Communication
Engineering and its alumni are mutually proud of their
achievements. The department has celebrated Golden
Jubilee Year in 2008.
The Department of Electronics and Communication
Engineering has well qualified and experienced faculty with
excellent infrastructural facilities. The Department offers
both Under Graduate and Post Graduate programme and
also International Integrated Master Degree Programme
(IIMDP) in association with Blekinge Institute of
Technology, Sweden (BTH). The Department is known for
organizing academic interactions through conferences,
seminars, symposiums and workshops.

This Workshop is a gesture of such an attempt to

provide a chance to the interested, inquisitive and talented
generation in the universities to educate, inspire them to
pursue their ambitions and make a great impression on
the countrys future.

Registration Form

A Two-day National workshop on

Advanced VLSI Technology

26th-27th April, 2013
Name: ------------------------------------------------------------

IMPORTANCE OF THE WORKSHOP

It covers essential aspects of VLSI system, which is

introduced in educational institutions in India as
well as massively growing core domain for
electronics.
It updates the faculty with recent trends in VLSI
system.
Hands on session covers concept of VLSI system &
other IC technologies.
It provides platform to bring experts form industry
and academic institutions.

Designation: ---------------------------------------------------Educational qualification: -----------------------------------Address for communication: ----------------------------------------------------------------------------------------------------Phone: -----------------------------------------------------------

TOPICS BEING COVERED

Analog and Custom IC Designs

Tanner/Mentor Graphics Tools
Layout creation using Hyper silicon
Schematic Capture
S-Edit Schematic Capture Tools
DRC / LVS, Rules Sets
Modelsim
Questasim, Precision Synthesis, IC Station, Eldo,
Calibre, HDL Design
Parasitic Extraction and Physical Verification

Fax: --------------------------------------------------------------E-mail:------------------------------------------------------------Details of DD :
Date

Signature