IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 27, NO.

3, JULY 2012

1377

ECT Evaluation by an Error Measurement System

According to IEC 60044-8 and 61850-9-2
Tatsuji Yamada, Saytaro Kon, Naoki Hashimoto, Tatsushi Yamaguchi, Kenichi Yazawa, Reishi Kondo, and
Kiyoshi Kurosawa

AbstractA high-accuracy error measurement system for calibration of digital-output equipped electronic current transformers
(ECTs) is described. The system has been developed in conformity
with the requirements for digital information networks in IEC
61850-9-2 and for accuracy class and error measurement procedures in IEC 60044-8. The system has also been designed to achieve
simultaneous and synchronous samplings between an ECT/MU
and a reference measuring unit, a procedure for capturing and
filtering sampled value (SV) packets and data processing using
the discrete Fourier transform with error compensations for an
integrating analog-to-digital converter. The system employs a
prototype commercial digital-output equipped ECT consisting of
an optical current transformer (OCT) and a merging unit (MU).
The error sources of the system are discussed for the error compensations and uncertainty estimations. Based on the principle
of the system, the accuracy and temperature dependence of the
prototype OCT/MU are evaluated and are confirmed to be within
the limits of errors of accuracy class 0.2S.
Index TermsElectronic current transformer (ECT), error
measurement system, IEC 61850-9-2, IEC 60044-8, merging unit
(MU), optical current transformer (OCT).

I. INTRODUCTION

LECTRONIC current transformers (ECTs) [1], [2], such

as optical current transformers (OCTs) and Rogowski
coils, are expected to serve as the next generation of current instrument transformers in substations. Especially, ECTs
equipped with digital output components are important devices for automating substations, and must comply with IEC
61850-9-2 [3], [4] and IEC 60044-8 [1] standards. The IEC
61850-9-2 standard regulates the sampled value (SV) packet
frame structure and its property configurations on the digital
output of merging units (MUs). Meanwhile, the IEC 60044-8
standard states the requirements of the accuracy classes, the
synchronous signal of one pulse per second (1 PPS), and an
error measurement procedure for obtaining current amplitude
and phase errors with a reference measuring unit consisting of
a reference CT as well as a shunt and sampling voltmeter [1].
Thus, the accuracy of ECTs with digital output must be evaluated by an error measurement system conforming to both of
Manuscript received June 29, 2011; revised December 16, 2011; accepted
February 20, 2012. Date of publication April 10, 2012; date of current version
June 20, 2012. Paper no. TPWRD-00559-2011.
T. Yamada and S. Kon are with the National Metrology Institute of Japan,
Tsukuba, Ibaraki 305-8563, Japan.
N. Hashimoto, T. Yamaguchi, and K. Yazawa are with Toko Electric Corporation, Hasuda, Saitama 349-0192, Japan.
R. Kondo and K. Kurosawa are with Tokyo Electric Power Company, Yokohama, Kanagawa 230-8510, Japan.
Digital Object Identifier 10.1109/TPWRD.2012.2189590

the standards. Many studies on ECT calibration methods have

been done, but most of them have introduced systems without
MUs, and so do not comply with IEC 61850-9-2, or without
estimating measurement uncertainties [5][7]. A calibration
system, the uncertainties of which are evaluated in amplitude
and phase errors, has been proposed [8], but the paper focused
on the introduction of the system and uncertainty estimation,
and did not show any measurement results or evaluations for
the ECT/MU, which was uniquely designed for the system with
a traditional CT, I/V converter, digital sampling system, and
Ethernet interface.
The National Metrology Institute of Japan (NMIJ), which
provides electrical measurement standards, is currently establishing an error measurement procedure for digital-output
equipped ECTs. This paper evaluates the uncertainty of the error
measurement system developed for calibration according to
both standards, by employing a prototype commercial OCT/MU
as a digital-output equipped ECT. This paper also introduces
some methods which the system adopts: a simultaneous and
synchronous sampling method, an SV packet-processing
method, and an error compensation method for an integrating
analog-to-digital converter (ADC). Based on the principle of
the calibration, the temperature dependence of the ECT is then
evaluated through a temperature cycle from 40 C to 80 C.
The test verifies the feasibility of the system.
II. ECT AND MU
To evaluate the performance of the error measurement
system, which is described later, prototype commercial devices
of an OCT and MU fabricated by Toko Electric Corporation
(Toko) are used as a commercial ECT with digital output.
The OCT, which has been developed based on technologies
from Tokyo Electric Power Company (TEPCO) [5], [6], has
high performance for measuring large currents of more than
3000 A, consisting of a flint glass optical fiber and a reflection
mirror surrounded by a ring-shaped aluminum case. The mirror
attached at the end of the optical fiber is used for canceling
several effects, such as photoelasticity and temperature by
reflection of the light passing through it. It has been reported
that the OCT can be used for fault detection [9][11].
The MU has a built-in secondary converter (SC) for the OCT.
The SC provides all necessary components for current sensing
with the optical sensor head: an optical source, an optical-electrical converter (OEC), and other electronics of a low-pass filter
(LPF), an ADC, etc. The MU also has a phase-locked loop
(PLL) circuit for generating a 4-kHz sampling trigger signal,
which is used to synchronize the sampling of the ADC of the

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Fig. 1. Block diagram of the error measurement system.

SC. The SC generates digital sampling data at a rate of 80 samples/cycle synchronous with the 1 PPS signal through the lowpass filter and ADC. The latency between the 1 PPS and the
sampling and the rated phase offset depending on its electronics
are internally compensated. The MU receives the sampling data
from the SC, puts each of them in an SV packet, and then sends
them via Ethernet at the same rate. Telnet access to the MU allows its configuration and measurement start/stop timing to be
controlled.
III. ERROR MEASUREMENT SYSTEM
A. System Overview
A block diagram of the error measurement system for digital-output equipped ECTs, according to IEC 61850-9-2 and
60044-8, is shown in Fig. 1. The system consists of a test current
source, a reference measuring unit, and a computer. The system
is operated on a LabVIEW platform for controlling the instruments connected via general-purpose interface bus (GPIB) and
Ethernet and processing the sampling data obtained.
An ac test current of 50 Hz is generated by the test current
source, which consists of a three-channel signal generator, a
power amplifier, and a step-down transformer. The signal generator is designed to achieve synchronization between the 1 PPS,
an external sampling trigger signal of 4 kHz, and a low-level
signal for a test current. These three signals are in reference to a
10-MHz reference clock. This synchronization setting is important for two reasons: 1) synchronization between the 1 PPS and

trigger signal is needed for the simultaneous sampling procedure between the reference measuring unit and ECT/MU, and 2)
the other synchronization with the test current is for ensuring the
repeatability of phase results and avoiding the effects of asynchronous samplings and frequency fluctuations.
The reference measuring unit in the system consists of a reference CT, a reference shunt, and a reference digital voltmeter
(DVM). The reference CT has a two-stage structure comprised
of two magnetic cores and an electronically compensated circuit
[12]. The CT is calibrated by the NMIJ national current ratio
standard. (The calibration results are described in Section IV.)
The reference shunt is a four-terminal shunt consisting of highprecision metal foil resistors in parallel [13]. The shunt is also
calibrated by the NMIJ shunt calibration system. (The calibration results are also described in Section IV.) The reference
DVM (Agilent 3458A) with a multislope integrating ADC provides an effective precision of 24 bits with the least-significant
. The DVM carries out the process of sampling
bit weighted
the voltage signal across the shunt through which the secondary
current of the CT flows, at the timing of the external sampling
trigger from the signal generator.
The software for the system controls the simultaneous and
synchronous samplings with the DVM and MU (SC), by referring to the external trigger signal and 1 PPS, respectively. Then,
the software deals with the sampling data from the DVM and
the SV packets from the MU. The details of the sampling flow
and data processing are described in Section III-B. The software also processes the amplitude and phase calculations, using
the discrete Fourier transform (DFT) with error compensations
for the reference measuring unit and the fast Fourier transform
(FFT) for the ECT/MU, as described in Section III-C.
B. Sampling Flow
The simultaneous and synchronous samplings carried out between the DVM and MU (SC) progress as shown in Fig. 2, and
the SV packet processing and the sampling data processing are
shown in Fig. 3. Especially, in order to achieve simultaneous
samplings during the same period of 1 PPS, some techniques are
required because an SC is always sampling the signal detected
by the sensor head of the ECT without any trigger functions to
control the timing of its sampling, once the measurement gets
started. For this reason, the sampling procedure in the system is
as follows:
The software of the system orders the MU to start the SC sampling immediately after the DVM sampling is ready for holding
until the next positive edge of the 1 PPS. Once the SC sampling
starts, the MU multicasts the SV packets enclosing the sampling
data from the SC at the frequency of 4 kHz. At this time, it is
important that a packet capturing and filtering procedure is embedded in the software of the system, because the software is required to determine the timing of capturing the IP packets which
are always coming to the PC through Ethernet, in order to acquire only the SV packets obtained by simultaneous sampling.
The timing is acquired by controlling open/close of its network
interface card (NIC). Then, according to the instruction of the
software, the IP packets captured in promiscuous mode are filtered to extract the SV packets from them. A set of sampling data

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Fig. 2. Sampling procedures of the error measurement system.

next measurement, while the current amplitude and phase values

for the reference measuring unit and ECT are calculated and
then the error estimation is made.
C. Current Amplitude and Phase Calculations

Fig. 3. SV packet capturing and sampling data processing.

and its sample count value is extracted from each SV packet, and
then the system checks whether the count value is zero.
At the moment of the next positive edge of the 1 PPS, the
4-kHz external trigger signal is generated by the signal generator, and the DVM starts sampling at the negative edge of the
trigger signal. At an instant, the PC detects the sample count
value of zero and then starts saving the sampling data extracted
from the packets up to the sampling count value of 3999. While
the sampling of the DVM continues, it stores all of the sampling
data up to 4000 samples in its internal memory.
After the samplings are made during the period of 1 PPS,
the PC stops the capturing and extracting processes for the SV
packets and then receives the sampling data from the DVM,
which stops the sampling because the trigger stops. The DVM
sampling is finished while the SC continues sampling. The software initializes the settings of the DVM and prepares for the

The calculations of the current amplitude and phase values

from the ECT/MU are processed by the FFT program in the LabVIEW library. With the OCT/MU fabricated by Toko, the amplitude and phase errors resulting from the analog filter, trigger latency, and other electronics are compensated inside before multicasting the SV packets. Therefore, no compensation is made
in the calculations by the system. For the ECTs provided with
its rated time delay and rated phase offset, the phase calculation
is made using these values.
In the current amplitude and phase calculation process for the
reference measuring unit, special handling of its error sources
is performed to ensure the accuracy of the system. The known
errors of the reference CT and the reference shunt, the known
phase shifts, and the known latencies, which are described in
Section IV, are used for compensation after the DFT process in
the calculation process of the system.
For the amplitude and phase errors in the sampling data,
which arise in the sampling process of the integrating ADC of
the DVM, the following method is employed to compensate
those errors in the DFT process. The voltage samples of a
are measured by the integrating ADC
signal
and then the amplitude and phase errors of are obtained from
the equation

(1)
where and are the sampling time and integration (aperture)
time of the ADC, respectively. As shown in the equation, the
causes an amplitude error and
sinc function of
causes a phase error.

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From this equation, it is clear that these error components deis not a pure sine waveform
pend on frequency. If the signal
but a distorted waveform, error compensation during the DFT
process is a better approach. Therefore, when calculating the
amplitude and phase values for the input voltage derived from
the test current (although, in the case of Fig. 1, the input voltage
across the reference shunt can be considered as ac voltage), the
software calls a DLL file of the DFT program which is written
according to the following equation [14]:

Fig. 4. Phase displacement resulting from the LPF and reaction time of the
DVM.

(2)
(3)
where is the number of sampling data. In (2), the improved
DFT performs amplitude compensation by the sinc function of
and phase compensation by the exponen.
tial function of
IV. UNCERTAINTY OF THE SYSTEM
A. Internal DC Reference Deviation
The deviation of the internal dc reference used in the integrating ADC is attributed to dc calibration uncertainty, its drift
C). It is aswith time and temperature (for a maximum of
sumed that it follows a Gaussian distribution with 0.5 V/V of
full scale [14].
B. Gain Error
The influence of sampling time on the gain error has been
studied by P. Espel et al. [15]. With reference to their study,
here the gain error is determined to be 5 V/V for the sampling
time of 250 s.
C. Indetermination of the Cutoff Frequency of the LPF
Since the DVM has a second-order LPF at the input stage
[16], the input signal passing through the filter and reaching
the ADC has an amplitude error and a phase displacement as
shown in Fig. 4, although the amplitude error is small enough
to be ignored at the power frequencies. The cutoff frequency ,
which is obtained by measuring the frequency characteristics
of the DVM with a reference ac generator, is determined to be
120 kHz 5 kHz. From this, the phase displacement due
to the LPF can be calculated by the following equation and is
determined to be 1.432 0.062 min.
(4)

D. Latency
The time delay between the positive edge of the 1 PPS and
the negative edge of the trigger signal is measured by a digital

oscilloscope and is determined to be 562

ns (0.607 0.001
min), considering the time accuracy of the oscilloscope. This
time delay seems large in the error measurement system, and
will be improved in future work.
The latency from the trigger to the sampling start, which
is the reaction time, in the DVM is 175 50 ns for the integrating ADC [17]. The reaction time has been validated by the
square-wave method developed by Juvik [18], [19]. Therefore,
the phase offset attributed to the above latency is determined to
be 0.189 0.054 min.
E. Errors of the Reference CT
The reference CT is calibrated by the NMIJ current ratio
standard based on the calibration principle with a current comparator [20]. The current ratio error and phase displacement are
estimated to be 4.9 0.4 parts per million (ppm) and 2.5
0.4 rad ( 0.009 0.001 min), respectively.
F. Errors of the Reference Shunt
The reference shunt is calibrated by the NMIJ shunt calibration system, which consists of a reference CT, current comparator, and reference resistor [21]. The relative resistance error
and phase displacement are estimated to be 2.6 1.7 ppm and
1.6 4.3 rad ( 0.006 0.015 min), respectively.
G. Frequency Fluctuation
In the system shown in Fig. 1, the test current is sufficiently
stable in amplitude and frequency for the influence of the
frequency fluctuation to be ignored. However, for the system
shown later, the influence should be addressed considering
the fluctuation from 99% to 101% of the rated frequency
according to IEC 60044-8. The fluctuation affects two error
sources: 1) the errors of the reference CT and shunt, and 2) the
spectrum leakage due to asynchronous sampling. The influence
of the former is estimated to be 1.7 ppm in amplitude error
and 0.015 min in phase error as the maximum effect on both
NMIJ standards. For the latter, the spectrum leakages, which
appear, respectively, in the amplitude and phase errors of the
reference measuring unit and ECT/MU, cancel each other out
because the sampling times of the DVM and SC are the same
and synchronous.

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TABLE I
UNCERTAINTY BUDGET OF THE ECT ERROR MEASUREMENT SYSTEM AT THE
RATED CURRENT AND RATED FREQUENCY

Fig. 5. Evaluation results obtained by the error measurement system.

accuracy of the ECT/MU meets the requirements of accuracy

class 0.2S under the test conditions of current and temperature.
In the aforementioned evaluation, the ECT/MU does not fully
satisfy the requirements of IEC 60044-8. The ECT/MU should
be evaluated within the temperature range stated in the standard.

H. Others
Other contributions, such as noise, quantization, trigger jitter,
and sampling time resolution can be ignored because they are
very small compared with the aforementioned ones. The contribution of harmonic variation is also ignored since the ECT
evaluation in the system is based on the DFT.
From the previous discussions, the uncertainty of the system
is estimated and the uncertainty budget is illustrated in Table I.
Note that the uncertainty can apply to the error measurement for
the rated current. At other currents, such as 1% rated current, the
effects on the aforementioned error sources will be considered.
V. EXPERIMENTAL RESULTS
Using the error measurement system described before, the
current amplitude and phase errors of the ECT/MU were
measured by making 20 repeat measurements between 1% and
120% of the rated current of 2000 A, in a test room where
the temperature was controlled to 23.0 0.5 C. Fig. 5 shows
the results with the limits of each error according to accuracy
class 0.2S. The error bars indicate the maximum errors in the
repeat measurements. From the figure, the results seem stable
although they vary slightly at 1% of the rated current; they
are less than 0.1% and 6 min, respectively. Consequently, the

VI. TEMPERATURE DEPENDENCE TEST

The normal conditions of ambient air temperature, where
ECTs are installed and operated in substations, are stated in
IEC 60044-8. The conditions are divided into three temperature
categories and the most severe condition is the temperature
category 40/40 (minimum and maximum temperature of
40 and 40 C, respectively). Over the temperature range, the
errors of ECTs are required to be within the error limits of the
accuracy classes. In this paper, the test was conducted at the
temperature range of 40 to 80 C in view of the situation of
other countries.
To meet the accuracy requirement under the aforementioned
temperature conditions, ECTs to be used in substations may
need a temperature compensation algorithm where the temperature dependencies of each component of ECTs are compensated.
Therefore, a temperature dependence test is important not only
to verify the compatibility with the standard but also to develop
such an algorithm.
The error measurement system for the temperature dependence test is shown in Fig. 6. The system is constructed by
Toko based on the aforementioned calibration principle by

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Fig. 6. Error measurement system using a thermostatic chamber and a current

source with a Variac.

NMIJ. In the system, a test thermostatic chamber is used and

the source in Fig. 1 is replaced by another test current source.
The temperature of the thermostatic chamber is adjusted from
40 to 80 C with the sensor head of the ECT enclosed in
it. The current source is designed to supply higher ac currents
with a step-up transformer, Variac, and step-down transformer.
The fundamental frequency of the test current fluctuates within
50.0 0.2 Hz. The fluctuation causes asynchronous samplings
although the synchronization between the DVM and MU is
realized with the trigger and 1 PPS from a two-channel signal
generator. Furthermore, the system uses a commercially available reference CT and shunt which are different from those in
Fig. 1. The uncertainties of the system are estimated from the
calibration results of the reference CT and shunt. The errors of
the CT, which are calibrated by its manufacturer, are 80 45
ppm and 0.1 0.15 min, while those of the shunt, calibrated by
NMIJ, are 0.2 3.1 ppm and 104.3 4.8 rad (0.359 0.017
min). Consequently, the uncertainties
of the system, which
cover a level of confidence of approximately 95%, result in
0.009% in amplitude and 0.35 min in phase for the rated current
of 3000 A.
80 C
40 C
A temperature cycle test 20 C
20 C was conducted at 20% of the rated current. The test
results are shown in Fig. 7. The temperature change was done
with 10 C at the rate of 1 K/min, leaving it to stand for
one hour until the next change, which slightly differs from the
requirements of IEC 60044-8 (minimum temperature variation
rate of 5 K/h), but our test was a more strict condition.

Fig. 7. Temperature cycle accuracy test at the frequency of 50 Hz and the test
current of 600 A.

From the figure, all of the current amplitude errors (10 800
data) obtained at 10-s intervals meet the requirements of accuracy class 0.2S, although the rate of temperature change has
some impact on the amplitude error. Regarding the phase errors, most of them meet the requirement (within 10 min) except for only three data, which deviated from the requirement by
about 20 min. This problem does not result from the ECT/MU
itself but from a temporary defect of the sampling process in the
system, since no such substantial phase errors have been seen in
the same cycle test with a different system. Another problem of
slightly larger errors seen at about 5 h after the test started is also
under investigation. The rate of temperature change appeared to
have no impact on the phase error.
Fig. 8 shows the evaluation results obtained before and after
the above temperature cycle at the test current from 1% to 120%
of the rated current, with the limits of each error of accuracy
class 0.2S. The error bars in the figures indicate three sigma
limits because only five repeat measurements were made for
this test, and a statistical evaluation for a manufacturing process
is desired. Both the current amplitude and phase errors before
and after the temperature cycle meet the requirements, and the
differences are small enough. However, the differences between
the results of Figs. 5 and 8 are rather large for 5% or less of the
rated current.

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1383

compensate the leakage error for uncertainties in the order of

less than 0.01% and 0.1 min. Such an interpolated DFT is under
investigation.
VII. CONCLUSION
A high-accuracy error measurement system for calibrating
digital-output equipped ECTs, according to IEC 60044-8 and
IEC 61850-9-2, has been presented. The simultaneous and synchronous samplings between the DVM and MU(SC) with the
SV packet capturing and filtering process serve as a sampling
procedure and packet processing of systems required in the
aforementioned standards. Also, some compensation considered for the error sources of the system, including the sampling
error compensation for the integrating ADC, are sufficient for
ensuring the accuracies of amplitude and phase measurements.
of the system at NMIJ are estimated to
The uncertainties
be 0.001% in amplitude and 0.17 min in phase, while the uncertainties of the onsite calibration system at Toko are 0.009% and
0.35 min. The evaluation results by both systems are confirmed
to meet the requirements of accuracy class 0.2S. This system is
also applicable to other types of ECTs.
An additional test of the simultaneous temperature cycling
for the ECT/MU is needed to evaluate the temperature dependence of the SC. The problem of the departure behavior of the
phase error seen in the long-run test must also be solved. Improvements are also needed for reducing the spectrum leakage.
Fig. 8. Temperature dependence of the OCT.

The main cause of the difference is considered to be the temperature dependence of the SC in the MU because the SC has
some components that are affected by temperature, such as the
optical source and OEC. The MU operated at the temperature
of 23.0 0.5 C during the test by NMIJ while it was used at
26.4 4.6 C during the test by Toko. For small test currents,
thermal effects would appear due to the small signal-to-noise
ratio (SNR). From this consideration, it is found that a simultaneous temperature cycle test of the ECT and its SC over their
respective temperature ranges is important, for example, temperature category 40/40 for the ECT and 5/40 for its SC. It
is especially advisable to take measures to improve the temperature dependence of the SC through temperature cycling.
Another desired improvement is to take suitable countermeasures against the spectrum leakage caused by the DFT
under frequency fluctuations. In usual cases, a test current
is supplied from the electricity supply through a step-down
transformer without a transconductance amplifier. As discussed
in the aforementioned uncertainty estimation, offsetting both
spectrum leakages was confirmed experimentally and can be
confirmed theoretically because the sampling rates of the DVM
and SC are the same and synchronized. However, a straightforward approach may be to compensate the error component of
each spectrum leakage or to reduce them sufficiently prior to
evaluating the error of an ECT. One proposed approach is to use
the fourth-order convolution window algorithm [7]. Another
efficient way is to introduce an interpolated DFT which can

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Naoki Hashimoto received the B.S. degree in electrical engineering from Kogakuin University, Tokyo,
Japan, in 1988.
He joined Toko Electric Corporation, Hasuda,
Saitama, Japan, in 1988. He has been engaged in the
development of digital signal processing and image
processing.

Tatsushi Yamaguchi received the B.S. degree in

electrical engineering from the Shibaura Institute of
Technology, Tokyo, Japan, in 1986.
He joined the Toko Electric Corporation, Hasuda,
Saitama, Japan, in 1986. He has been engaged in the
development of power-electronic apparatus as well as
optical voltage and current sensors.

Kenichi Yazawa received the B.S. degree in electrical engineering from Kogakuin University, Tokyo,
Japan, in 1986.
He joined Toko Electric Corporation, Hasuda,
Saitama, Japan, in 1986. He has been engaged in
the development on communication technology and
equipment.

Tatsuji Yamada was born in Gifu, Japan, in 1972. He

received the M.S. and Ph.D. degrees in electric engineering from the Nagoya University, Aichi, Japan, in
1999 and 2001, respectively.
Since 2003, he has been a member of the Advanced
Industrial Science and Technology (AIST), Tsukuba.
His current research interests include power-quality
measurements, sampling measurement system,
voltage ratio, and current ratio measurements.

Reishi Kondo received the B.S. degree in electrical

engineering from the Tokyo Electric Power Institute,
Tokyo, Japan, in 1995.
He joined the Tokyo Electric Power Company,
Yokohama, Kanagawa, Japan, in 1986. Since 2006,
he has been engaged in research and development of
optical-fiber current sensors and their applications.

Saytaro Kon was born in Aomori, Japan, in 1980.

He received the B.S. degree in physics from Tokyo
University of Science, Tokyo, Japan, in 2005, and the
M.S. degree in environmental sciences from Tsukuba
University, Tsukuba, Japan, in 2007.
He joined the National Metrology Institute of
Japan (NMIJ), the National Institute of Advanced
Industrial Science and Technology (AIST), Tsukuba,
in 2007. He is currently engaged in highly precise
current impedance and power measurements, mainly
in the ac shunt standard.

Kiyoshi Kurosawa graduated from the Engineering

Course of Tokyo Electric Power Institute, an institute
of Tokyo Electric Power Company Inc. (TEPCO),
Yokohama, Kanagawa, Japan, in 1980. He received
the D.Sc. degree in engineering from Tokyo Electric
Power Institute, The University of Tokyo, Tokyo,
Japan, in 1998.
He joined TEPCO in 1971. Since 1981, he has been
with the R&D Center, TEPCO, where he has been
engaged in the research and development of opticalfiber current sensors and their applications.