CHAPTER 3: Bipolar Junction Transistor

III-1-9) Transistor biasing circuit

Specific objectives:
-

Identify base/fixed bias circuit and collector feedback bias circuit

Draw the dc load line of base/fixed bias circuit and collector feedback bias circuit
Determine the quiescent/operating point of base/fixed bias and collector feedback bias

a) Base bias
The base-bias or fixed bias circuit consists of a single base resistor R B between VCC and
the base terminal. The emitter is directly connected to the ground and the currents are as
shown in the figure below:

Circuit analysis:

Applying Kirchhoffs voltage law, we get,

VCC RBIB VBE = 0

RB =

V CCV CE
IB

(I)

As VCC and IB are known and VBE can be seen from the transistor manual, therefore, value of
RB can be readily found from expression above.
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Since VBE is generally quite small as compared to VCC, VBE can be neglected with little error.
It then follows from ( I ) that:
RB =

V CC
IB

It may be noted that V CC is a fixed known quantity and I B is chosen at some suitable value.
Hence, RB can always be found directly, and for this reason, this method is sometimes called
fixed-bias method.

Dc load line:

VCE + ICRC - VCC = 0

IC =

V CC V CE
RC

which is the DC load line

Example 1: Plot the DC load line of the following circuit with IC = 15mA

Solution:
IC =

V CC V
RC

CE

Saturation point :

If VCE=0, we have:
I Csat =

V CC 15
=
=25 mA
RC 600

Cutoff point:

If IC=0, we have:
V CC V CE =0

VCC =VCE = 15V

Operating point:

We will the operating point for the example above where = 100.

VCC RBIB VBE = 0

I B=

V CC V CE 150.7
=
=0.143 mA
RB
100.10 3

Then you will have ICQ = IB = 100 0.143 = 14.3 mA

Thus you will have VCEQ = VCC ICQRC = 15 14.310-3600 = 6.42V

Advantages:
This biasing circuit is very simple as only one resistance RB is required.
Biasing conditions can easily be set and the calculations are simple.
There is no loading of the source by the biasing circuit since no resistor is employed

across base-emitter junction.

Disadvantages:

This method provides poor stabilisation. It is because there is no means to stop a selfincrease in collector current due to temperature rise and individual variations. For example, if
increases due to transistor replacement, then I C also increases by the same factor as I B is
constant.

b) Collector -feedback bias

The collector-feedback bias circuit is very similar to the fixed-bias circuit. Basically there
is only one difference, namely RB is connected to the collector (VC) instead of VCC as shown in
the figure below:

This brings about a circuit with a negative feedback, which is more insensitive to beta ()
variations and therefore has a relatively stable Q point.

Principle:
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An increase in temperature results in an increase in , therefore I C tends to increase. This

results in a higher voltage drop across RC, thereby causing VC to decreases. The lower value of
VC causes the base current to decrease and as a result, IC also decreases. The value of VC
affects VB directly, hence the name: collector feedback bias.
Any attempt to increase IC from a higher will be counteracted with o lower VC and base
current.

Analysis:

Using the external mesh, we have:

V CC I ' C RC I B R BV BE=0
Where IC = IC + IB
It is important to note that the current through R C is not IC but IC. However, the level of IC and
IC far exceeds the usual level of IB and the approximation IC IC is normally employed.
Substituting IC IC IB will result in:
V CC I B RC I B R BV BE=0

I B R B =V CC I B R C V BE

RB =

V CCV BE I B RC
IB

Alternatively,
V CE =V CB +V BE

And,

V CB =V CE V BE

RB =

V CB V CE V BE
=
IB
IB

Advantages:
It is a simple method as it requires only one resistance RB.
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 This circuit provides some stabilisation of the operating point.

Disadvantages:
The circuit does not provide good stabilisation, though it is lesser than that of fixed
bias. Therefore, the operating point does change, although to lesser extent, due to
temperature variations and other effects.
This circuit provides a negative feedback which reduces the gain of the amplifier.
During the positive half-cycle of the signal, the collector current increases. The
increased collector current would result in greater voltage drop across R C. This will
reduce the base current and hence collector current.

DC load and operating point:

Determine the dc load line and the operating point of this circuit for = 100.

M1

Solution:

DC load line:

Using the mesh M1,

V CC I C RC V CE =0

IC =

V CC V CE
RC

I Csat =

If VCE = 0,

If IC = 0,

V CC
20
=
=10 mA
RC 2 103

V CEcutoff =V CC =20 V

Operating point:

Using the external mesh,

V CC I B RC I B R BV BE=0

V CC I B ( RC + R B )V BE=0

I B=

V CC V BE
200.7
=
=0.077 mA
RC + R B 100 2 103 +50 103

Thus,
I CQ = I B=100 0.077=7.7 mA
Collector

emitter

voltage,

V CC I C RC V CE =0

V CEQ =V CCI CQ R C =207.7 103 2 103=4.6 V

CHAPTER 3: Bipolar Junction Transistor

III-1-9) Transistor biasing circuit
c) Voltage divider bias
Specific objectives:
-

Identify voltage divider bias circuit

Draw the dc load line of voltage divider bias circuit
Determine the quiescent/operating point of voltage divider bias

This is the most widely used method of providing biasing and stabilisation to a transistor.
In this method, two resistances R1 and R2 are connected across the supply voltage VCC and
provide biasing. The emitter resistance R E provides stabilisation. The name voltage divider
comes from the voltage divider formed by R 1 and R2. The voltage drop across R2 forward
biases the base emitter junction.

Analysis:

For circuit analysis, it is assumed that the base current IB is small enough to be neglected.

M2

M
1

Collector current:
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Using the external mesh, we have:

V CC I 1 ( R1 + R2 )=0

I1 =

V CC
R1 + R 2

The voltage across R2 is:

V R 2=

R 2 V CC
R 1+ R 2

Using the mesh M1, we have:

V R 2V BE V E =0

V R 2=V BE +V E

V R 2=V BE + I E R E

I E=

V R 2V BE
RE
I B + I C =I E

We know that

and due to the fact that IB can be neglected we get,

IC I E

IC =

V R 2V BE
RE

It is clear from expression above that IC does not at all depend upon . Though I C depends
upon VBE but in practice V2 >> VBE so that IC is practically independent of VBE. Thus IC in this
circuit is almost independent of transistor parameters and hence good stabilisation is ensured.
It is due to this reason that potential divider bias has become universal method for providing
transistor biasing.

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Collector emitter voltage VCE:

Applying Kirchhoffs voltage law to the mesh M2,

V CC I C RC V CE I E R E =0

V CE =V CC I C RC I E R E

V CE =V CC I C (RC + R E )

but IE IC

DC load line and operating point:

Draw the dc load line and determine the operating point.

Solution:

DC load line:

V CE =V CC I C ( RC + R E )

IC =

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V CC V CE
R C + RE

V CC
15
=
=2.14 mA
R C + RE (2+3)10 3

If VCE=0,

I Csat =

If IC=0,

V CC V CE =0

I CQ =

V CEcutoff =V CC =15V

Operating point:
V R 2V BE
RE

3
R2
5 10 15
V
=I
R
=
V
=
=5V
R2
1 2
But,
R1 + R2 CC (10+5)10 3

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I CQ =

50.7
=1.43 mA
3 103

We have,
V CEQ =V CCI CQ ( RC + R E )

V CEQ =151.43 103 ( 2+ 3) 103 =7.85V

Advantages:
Only one dc supply is necessary
Operating point is almost independent of variation
Operating point stabilized against shift in temperature.
Disadvantages:
The input resistance is reduced by perhaps 10%
The biasing potential divider may take 5 to10% current from supply, 5 to10% of

current in transistor.
Component count is higher.

Assignment:

=50

1- Give the name of the following circuits.

2- Draw the dc load line of each of the following circuits.
3- Find the operating point of each of them.

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(b)
(a)

(c)

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