Prepared By :

M.SAFA
AP/IT

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 The

microprocessor is a programmable device that

takes in numbers, performs on them arithmetic or
logical operations according to the program stored
in memory and then produces other numbers as a
result

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Microprocessor-based system From the

above description, we can draw the following
block diagram to represent a microprocessorbased system:

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 Internally,

the microprocessor is made up of

3 main units.
The Arithmetic/Logic Unit (ALU)
The Control Unit.
An array of registers for holding data while it is
being manipulated.

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 8085

is an 8-bit microprocessor.
It is capable of addressing 64KB of memory.
It requires a +5volts of power supply.
8085 operates on 3MHz -5MHz.
It has 16 address lines, out of which 8
address lines are multiplexed with data lines.
It is manufactured in NMOS technology
It is available in 40 pin dual in line (DIP)
package.

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The 8-bit 8085 CPU (or MPU Micro Processing Unit) communicates with the other
units using a 16-bit address bus, an 8-bit data bus and a control bus.

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 System

Bus wires connecting memory &

I/O to microprocessor
Address Bus :

Unidirectional
Identifying peripheral or memory location

Data

Bus :

Bidirectional
Transferring data

Control

Bus

Synchronization signals
Timing signals
Control signal

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1.

2.
3.
4.
5.
6.

7.

ALU
Timing and Control Unit
General Purpose Registers
Program Status word
Program Counter
Stack Pointer
Instruction Register and Decoder

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8. Interrupt Control
9.Serial I/O Control
10.Address Bus
11. Data Bus

PROGRAMMING MODEL OF 8085

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The Registers are of 8-bit & 16-bit size used for different
purposes

A- Accumulator This is an special

purpose register. All the ALU operations are
performed with reference to the contents of
Accumulator. (8 bit)
B,C,D,E,H,L General purpose registers.
These registers can also used for 16-bit
operations
in
pairs.
The
default
pairs are BC, DE & HL.

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SP Stack pointer:
The stack pointer is also a 16-bit register that is
used to point into memory.
The stack is array of memory location accessed
in a Last In First Out (LIFO) fashion.
The stack is an area of memory used to hold
data that will be retrieved soon.

Temporary register, W & Z These registers are

only used by 8085 and are not available for the
programmer.

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 Program Counter(16 bit) :

This is a register that is used to control the
sequencing of the execution of instructions.
This register always holds the address of the
next
Since it holds an addr instruction. ess, it must
be 16 bits wide.
PC

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ALU Arithmetic & Logic Unit

ALU of 8085 performs 8-bit arithmetic & logical
operations. The operations are generally performed
with Accumulator as one of the operands. The result
is saved in accumulator register.
Timing & Control Unit
This unit works as the brain of the CPU and
generates all the timing and control signals to
perform all the internal & external operations of the
CPU.
Instruction Decoder & Machine Cycle Encoder Unit
This unit decodes the op-code stored in the
Instruction Register (IR) and encodes it for the timing
& control unit to perform the execution of the
instruction.
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A15- A10

Chip Selection
Circuit

8085
CS

A15-A8
ALE

AD7-AD0

WR

RD

Latch

A9- A0

1K Byte
Memory
Chip

A7- A0

D7 - D0

IO/M

RD

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WR

Figure 3: Moving data form memory to MPU using instruction MOV C, A

(code machine 4FH = 0100 1111)
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 40

1.
2.
3.

4.
5.
6.

pins classified into 6 groups:

Data bus
Address bus
Control & status lines
Externally generated
Serial interface
Power supply & clock

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1) Address Bus (A15-A8 and AD7-AD0):

The microprocessor 8085 has 16 bit
address lines from A15-A8 and AD7-AD0. These
lines are used to transfer 16 bit address of
memory as well as 8-bit address of I/O ports.
2) Data Bus:
The lower 8 lines (AD7-AD0) are often
called as multiplexed data lines.

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RD : Read: This is active low signal which indicates

that the selected I/O or memory device is to be read
and also is available on the data bus.
WR : Write: This is active low signal which
indicates that the data on data bus are to be
written into a selected memory location.
IO/ M : (Input / Output / Memory): This is used to
select either Input / Output devices or memory
operation.
IO/M =1 ----- IO OPERATION
IO/M=0 ----- MEM OPERATION

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 ALE

(output) - Address Latch Enable.

It is an output signal used to give information
of AD0-AD7 contents.
It is a positive going pulse generated when a
new operation is started by uP.
ALE=1------- address
ALE=0------- Data

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 The

microprocessor 8085 has two status pins

as S1, S0 which is used to indicate the status
of microprocessor or operation which is
performed by microprocessor.
IO/M
0
0
0
1
1

S1
1
1
0
1
0

S0
1
0
1
0
1

Z
Z
Z

0
x
x

1
x
x

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OPERATION
Opcode fetch
Memory read
Memory write
I/O read
I/O write
Interrupt
acknowledge
Halt
Hold
Reset
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 Reset

In (input, active low):When the signal on this

pin goes low, The PC is set to ZERO, Buses are Tri
stated, and MP is reset.
Reset Out (Output):It indicates CPU is being reset.
The signal can be used to reset other device.
HOLD(I/P) :The Signal indicates that a peripheral
such as DMA controller is use of Address and Data
bus
HLDA(O/P): The Signal ACK the HOLD Request.

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 SID

(input) Serial input data line

SOD (output) Serial output data line.
These signals are used for serial
communication.

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 Vcc:

+ 5 volt power supply

Vss: Ground
X1, X2 : A Crystal is connected at these pins.
The frequency is internally divided by two.
Since the basic operating timing frequency is
3 MHz, a 6 MHz crystal is connected
externally.

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 Interrupt

is a mechanism by which an I/O or an

instruction can suspend the normal execution
of processor and get itself serviced. Generally,
a particular task is assigned to that interrupt
signal. In the microprocessor based system the
interrupts are used for data transfer between the
peripheral devices and the microprocessor.

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EXAMPLE:Main
program
ISR

p is
interrupt

X
Y
RET

HLT

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CLASSIFICATION OF
INTERRUPTS
Interrupts

Hardware

Maskable

Non-Maskable

TRAP

RST 7.5
RST 6.5
RST 5.5
INTR

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Software

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Interrupt Service Routine(ISR):-A Small program

or a routine that when executed services
the corresponding interrupting source is called
as an ISR.

Nonmaskable interrupt: The MPU is interrupted

when a logic signal is applied to this type of
input.

Maskable interrupt :The MPU is interrupted

ONLY if that particular input is enabled.
It is enabled or disabled under program control.
If disabled, an interrupt signal is ignored by the
MPU.

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Responding to an interrupt may be

immediate or delayed depending on
Interrupt Mask Vecto
whether the interrupt is maskable or
name
able
red
non-maskable and whether interrupts
are being masked or not.
INTR
Yes
No
There are two ways of redirecting the
RST 5.5 Yes
Yes
execution to the ISR depending on
whether the interrupt is vectored or RST 6.5 Yes Yes
non-vectored.

Vectored: The address of the subroutine is

already known to the Microprocessor
Non Vectored: The device will have to
supply the address of the subroutine to the
Microprocessor

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RST 7.5

Yes

Yes

TRAP

No

Yes

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 1.TRAP:-It

is non maskable edge and level

triggered
interrupt.
TRAP
has
the
highest priority and vectors interrupt.

Edge

and level triggered means that the TRAP

must go high and remain high until it is
acknowledged. In case of sudden power failure,
it executes a ISR and send the data from main
memory to backup memory.

TRAP

can not be masked but it can be delayed

using HOLD signal.This interrupt transfers the
microprocessor's control to location 0024H.

How

a TRAP interrupt may be masked???

Resetting the microprocessor.
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 RST7.5:-It

has the second highest priority. It is

maskable and edge level triggered interrupt.
The vector address of this interrupt is 003CH. Edge
sensitive means input goes high and no need to
maintain high state until it is recognized.
RST6.5 and RST5.5:-These are level triggered and
maskable interrupts. When RST6.5 pin is at logic 1,
INTE flip-flop is set. RST 6.5 has third highest
priority and RST 5.5 has fourth highest priority.
It can be masked by giving DI and SIM instructions
or by reseting microprocessor.
INTR:-It is level triggered and maskable interrupt.
It has the lowest priority. It can be disabled by
reseting the microprocessor or by DI and SIM
instruction.
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SIM(set interrupt mask) Instruction

This is a multipurpose instruction and used to
implement The 8085 interrupts 7.5, 6.5, 5.5, and serial
data output. The instruction interrupts the accumulator
contents as following:

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RIM(Read Interrupt Mask) instruction:

This is a multi purpose instruction used to read the
Status of interrupts 7.5, 6.5 ,5.5 and read serial data input
bit . The instruction loads eight bits in the accumulator
with the following interpretations:

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 The

software interrupts are program

instructions. These instructions are inserted at
desired locations in a program.
The 8085 has eight software interrupts from
RST 0 to RST 7. When microprocessor is
interrupt by giving instruction in the main
program. The it is called as software interrupt.
The processor multiplies by 8 to calculate the
vector address

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TABLE OF SOFTWARE INTERRUPT

Restart Instruction

Equivalent to

RST0

CALL 0000H

RST1

CALL 0008H

RST2

CALL 0010H

RST3

CALL 0018H

RST4

CALL 0020H

RST5

CALL 0028H

RST6

CALL 0030H

RST7

CALL 0038H

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EXAMPLE
:-

ISR

Main program
---

0008H

---

0009H

6107H

6108H

RST 1

6109H

.
.
.

2501H

--RET

2502H

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The various formats of specifying operands

are called addressing modes
Types of Addressing Modes Intel 8085 uses
the following addressing modes:

1. Direct Addressing Mode

2. Register Addressing Mode
3. Register Indirect Addressing Mode
4. Immediate Addressing Mode
5. Implicit Addressing Mode

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The format of a typical instruction is composed

of two parts: an operation code or op-code and
an operand.
Every instruction needs an opcode to specify the
operation of the instruction is and then an
operand that gives the appropriate data needed
for that particular operation code.
Depending upon the size of machine codes, the
8085 instructions are classified into three types.
(a) One byte (single) instructions.
(b)Two byte instructions.
(c) Three byte instructions.

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1 byte instruction include the opcode and

the operand in the 8 bits only which is one
byte.
Ex:
MOV C, A Hex code = 4FH (one byte)
ADD B Hex code = 80H (one byte)
CMA Hex code = 2FH (one byte)

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Two-byte instructions: The two byte instruction

is one which contains an 8-bit op-code and 8-bit
operand (Data).
Ex:
MVI A, 09
Hex code = 3E, 09 (two bytes)
ADD B, 07
Hex code = 80, 07 (two bytes)
SUB A, 05
Hex code = 97, 05 (two bytes)

Three-byte instructions: In a three byte

instruction the first byte is opcode and second
and third bytes are operands i.e. 16-bit data or
16-bit address.
LDA 8509
Hex code = 3A, 09, 85 (Three bytes)
LXI 2500
Hex code = 21, 00, 25 (Three bytes)
STA 2600
Hex code = 32, 00, 26 (Three bytes)

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The
instructions
that
direct the assembler to
do something.
GENERAL DIRECTIVES:
Assembler origin
ORG
Symbol Definition
EQU

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Memory Reservation

DS
Data Definition
DB
DW
Assembler Termination
END

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ORG : The Next block of instructions or data

should be stored in Mem locations .Either
HEX or DEC Numbers are acceptable
Eg : ORG 8000
END - END directive is placed after the last
statement of a program to tell the assembler
that this is the end of the program module.
The assembler will ignore any statement
after an END directive .
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 EQU

- This EQU directive is used to give a

name to some value or to a symbol. Each
time the assembler finds the name in the
program, it will replace the name with the
value or symbol you given to that name.
Eg:lookup equ 2
DB - DB directive is used to declare a byte
type variable or to store a byte in memory
location
Eg: Data DB 34
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 DW

- The DW directive is used to define a

variable of type word or to reserve storage
location of type word in memory.
eg:Long:DW 2050
DS: Reserves a specified number ofMemory
location .
Eg: Table:ds 10.

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 Entering

the instructions using hexadecimal

is quite easier than entering the binary
combinations.
The mnemonic for each instruction is usually
a group of letters that suggest the operation
performed.
Using
the
same
example
from
before,00111100 translates to 3C in
hexadecimal (OPCODE)
Its mnemonic is: INR A.
INR stands for increment register and A is
short for accumulator.
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Program:
MVI A, 04H
MVI B, 06H
MVI C, 00H
ADD B
JNC LP1
INR C
LP1: STA 4500H
MOV A, C
STA 4501H
HLT
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Program:
MVI A, 06H
MVI B, 04H
MVI C, 00H
SUB B
JNC LP1
INR C
LP1: STA 4500H
MOV A, C
STA 4501H
HLT
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Problem 1: the instruction code 4FH = 0100 1111 is stored in the memory
location 2005H. Illustrate the data flow and list the sequence of events
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1. The program counter places the 16 bit address

2005H of the memory location on the address
bus
2. The control unit sends the memory read
signal(MEMR) to enable the output buffer of the
memory chip
3. The instruction stored in memory location is
placed on the data bus and transferred to the
instruction decoder of the microprocessor
4. The instruction is decoded and executed
according to the binary pattern of the
instruction

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 Illustrate

the steps and the timing diagram of

data flow when the instruction code 47H
stored at memory location 4080H, is being
fetched. MOV B,A

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 Step

1:The microprocessor places the 16 bit

memory address from the program
counter(PC) on the address bus.

At T1 the higher order memory address 40H is

placed on the address lines A15-A8, the lower
order memory address 80H is placed on the bus
AD7-AD0, and the ALE signal goes high. Similarly,
the status signal IO/M goes low indicating this is
a memory related operation.

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 Step

2. The control unit send the control

signal RD to enable the memory chip.

The control signal RD is sent out during the

clock period T2 to enable the memory chip.
The RD signal is active during two clock period.

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 Step

3. The byte from memory location is

placed on the data bus.

When the memory is enabled the instruction byte

47H is placed on the bus AD7-AD0 and transferred
to the microprocessor. The RD signal causes 47H
to be placed on the bus AD7-AD0.

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 4.step

4: the byte is placed in the instruction

decoder of the microprocessor, and the task
is carried out according to the instruction.

The machine code or byte is(47H) is decoded by

the decoder and the contents of the accumulator
are copied into the register B. this task is
performed during the period T4.

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 Problem3:

Assume that the accumulator

contains data byte 82H, and the instruction
MOV C,A(4FH) is fetched. List the steps in
decoding and executing the instruction.

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4F Data bus

Internal data bus

from memory

Instructi
on reg
A :82h

4F

82h
Temp
Reg

Instruction
decoder

Timing and
control

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82H C

Places the contents of the data bus(4FH) in the

instruction register and decodes the instruction
Transfer the contents of the accumulator(82H) to
the temporary register in the ALU
Transfer the contents of the temporary register
to register C

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