IRFZ34N

Advanced Process Technology

Dynamic dv/dt Rating
175C Operating Temperature
Fast Switching
Fully Avalanche Rated

VDSS = 55V
RDS(on) = 0.040
ID = 26A
TO-220AB

Description
The TO-220 package is universally preferred for all commercial-industrial
applications at power dissipation levels to approximately 50 watts. The low
thermal resistance and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.

Absolute Maximum Ratings

Parameter
ID @ T C = 25C
ID @ T C = 100C
IDM
PD @T C = 25C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG

Max.

Continuous Drain Current, V GS @ 10V

Continuous Drain Current, V GS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.

Units

26
18
100
56
0.37
20
110
16
5.6
4.6
-55 to + 175

A
W
W/C
V
mJ
A
mJ
V/ns
C

300 (1.6mm from case)

10 lbfin (1.1Nm)

Thermal Resistance
Parameter
RJC
RCS
RJA

2014-8-9

Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient

Min.

Typ.

Max.

Units

0.50

2.7

62

C/W

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IRFZ34N
Electrical Characteristics @ TJ = 25C (unless otherwise specified)

RDS(ON)
VGS(th)
gfs

Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Forward Transconductance

IDSS

Drain-to-Source Leakage Current

V(BR)DSS
V(BR)DSS/TJ

Min.
55

2.0
6.5

Typ.

0.052

7.0
49
31
40

Qg
Qgs
Qgd
td(on)
tr
td(off)
tf

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time

LD

Internal Drain Inductance

4.5

LS

Internal Source Inductance

7.5

Ciss
Coss
Crss

Input Capacitance
Output Capacitance
Reverse Transfer Capacitance

700
240
100

IGSS

Max. Units
Conditions

V
VGS = 0V, I D = 250A
V/C Reference to 25C, I D = 1mA
0.040
VGS = 10V, I D = 16A

4.0
V
VDS = VGS, ID = 250A

S
VDS = 25V, ID = 16A
25
VDS = 55V, VGS = 0V
A
250
VDS = 44V, VGS = 0V, T J = 150C
100
VGS = 20V
nA
-100
VGS = -20V
34
ID = 16A
6.8
nC
VDS = 44V
14
VGS = 10V, See Fig. 6 and 13

VDD = 28V

ID = 16A
ns

RG = 18

RD = 1.8, See Fig. 10

Between lead,

6mm (0.25in.)
nH
from package

and center of die contact

VGS = 0V

pF
VDS = 25V

= 1.0MHz, See Fig. 5

Source-Drain Ratings and Characteristics

IS
ISM

VSD
trr
Qrr
ton

Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time

Min. Typ. Max. Units

26

100

57
130

1.6
86
200

V
ns
nC

Conditions
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25C, I S = 16A, V GS = 0V
TJ = 25C, I F = 16A
di/dt = 100A/s

Intrinsic turn-on time is negligible (turn-on is dominated by L

S+LD)

Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )

ISD 16 A, di/dt 420A/s, V DD V(BR)DSS,

T J 175C

VDD = 25V, starting T J = 25C, L = 610H

R G = 25, IAS = 16A. (See Figure 12)

Pulse width 300s; duty cycle 2%.

2014-8-9

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IRFZ34N
1000

1000

VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V

100

10

4.5V
20s PULSE WIDTH
TC = 25C

1
0.1

10

100

10

4.5V

100

2.4

R DS(on) , Drain-to-Source On Resistance

(Normalized)

I D , Drain-to-Source Current (A)

TJ = 25C
TJ = 175C

10

VDS = 25V
20s PULSE WIDTH
6

10

100

I D = 26A

2.0

1.6

1.2

0.8

0.4

VGS = 10V

0.0

-60 -40 -20

VGS , Gate-to-Source Voltage (V)

20

40

60

Fig 4. Normalized On-Resistance

Vs. Temperature

80 100 120 140 160 180

TJ , Junction Temperature (C)

Fig 3. Typical Transfer Characteristics

2014-8-9

10

Fig 2. Typical Output Characteristics,

TC = 175oC

100

VDS , Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics,

TC = 25oC

20s PULSE WIDTH

TC = 175C

1
0.1

VDS , Drain-to-Source Voltage (V)

VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
TOP

I , Drain-to-Source Current (A)

D

I , Drain-to-Source Current (A)

D

TOP

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IRFZ34N
1200

VGS , Gate-to-Source Voltage (V)

1000

C, Capacitance (pF)

20

V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
Ciss C oss = Cds + C gd

800

Coss
600

400

Crss
200

A
1

10

I D = 16A
V DS = 44V
V DS = 28V

16

12

FOR TEST CIRCUIT

SEE FIGURE 13

100

VDS , Drain-to-Source Voltage (V)

20

30

40

Q G , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs.

Drain-to-Source Voltage

Fig 6. Typical Gate Charge Vs.

Gate-to-Source Voltage

1000

1000

OPERATION IN THIS AREA LIMITED

BY RDS(on)

ID , Drain Current (A)

ISD , Reverse Drain Current (A)

10

100

TJ = 175C
TJ = 25C

10

100
10s

100s
10
1ms

VGS = 0V

1
0.4

0.8

1.2

1.6

2.0

10ms

A
10

100

VDS , Drain-to-Source Voltage (V)

VSD , Source-to-Drain Voltage (V)

Fig 7. Typical Source-Drain Diode

Forward Voltage

2014-8-9

TC = 25C
TJ = 175C
Single Pulse

Fig 8. Maximum Safe Operating Area

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IRFZ34N
RD

VDS
VGS

30

D.U.T.

RG
VDD

ID, Drain Current (Amps)

25

10 V
Pulse Width 1 s
Duty Factor 0.1 %

20

Fig 10a. Switching Time Test Circuit

15

10

0
25

50

75

100

125

150

175

TC , Case Temperature (C)

Fig 9. Maximum Drain Current Vs.

Case Temperature

Fig 10b. Switching Time Waveforms

Thermal Response (Z thJC )

10

D = 0.50
1
0.20
0.10
0.05
0.1

PD M

0.02
0.01

SINGLE PULSE
(THERMAL RESPONSE)

t2
N otes :
1 . D uty fac tor D = t

0.01
0.00001

/t

2. P ea k T J = P D M x Z thJ C + T C

0.0001

0.001

0.01

0.1

A
1

t 1 , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

2014-8-9

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EAS , Single Pulse Avalanche Energy (mJ)

IRFZ34N

10 V

Fig 12a. Unclamped Inductive Test Circuit

250

TOP
BOTTOM

200

ID
6.5A
11A
16A

150

100

50

VDD = 25V
25

50

A
75

100

125

150

175

Starting TJ , Junction Temperature (C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

10 V

Fig 13a. Basic Gate Charge Waveform

2014-8-9

Fig 13b. Gate Charge Test Circuit

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IRFZ34N
Peak Diode Recovery dv/dt Test Circuit
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer

D.U.T

RG

dv/dt controlled by R G
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test

VDD

* VGS = 5V for Logic Level Devices

Fig 14. For N-Channel HEXFETS

2014-8-9

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IRFZ34N
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)

2.87 (.113)
2.62 (.103)

10.54 (.415)
10.29 (.405)

-B-

3.78 (.149)
3.54 (.139)

4.69 (.185)
4.20 (.165)

-A-

1.32 (.052)
1.22 (.048)

6.47 (.255)
6.10 (.240)

4
15.24 (.600)
14.84 (.584)

1.15 (.045)
MIN
1

14.09 (.555)
13.47 (.530)

4.06 (.160)
3.55 (.140)

3X
1.40 (.055)
3X
1.15 (.045)

LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN

0.93 (.037)
0.69 (.027)

0.36 (.014)

3X
M

B A M

2.92 (.115)
2.64 (.104)

2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH

0.55 (.022)
0.46 (.018)

3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.

4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.

Part Marking Information

TO-220AB

EXAMPLE : THIS IS AN IRF1010

WITH ASSEMBLY
LOT CODE 9B1M

INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLY
LOT CODE

2014-8-9

PART NUMBER
IRF1010
9246
9B 1M

DATE CODE
(YYWW)
YY = YEAR
WW = WEEK

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