BUT11AX

Philips Semiconductors
Product specification
Silicon Diffused Power Transistor
BUT11AX
GENERAL DESCRIPTION
High-voltage, high-speed glass-passivated npn power transistor in a plastic full-pack envelope intended for use in
converters, inverters, switching regulators, motor control systems, etc.
QUICK REFERENCE DATA

SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
VCESM
VCEO
IC
ICM
Ptot
VCEsat
ICsat
tf
Collector-emitter voltage peak value

Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Collector saturation current
Fall time
VBE = 0 V
2.5
150
1000
450
5
10
32
1.5
-
V
V
A
A
W
V
A
ns
PINNING - SOT186A
PIN
Ths 25 C
PIN CONFIGURATION
SYMBOL
DESCRIPTION
case
base
collector
emitter
case isolated
1 2 3
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
VCESM
VCEO
IC
ICM
IB
IBM
Ptot
Tstg
Tj
Collector-emitter voltage peak value

Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
VBE = 0 V
Ths 25 C
MIN.
MAX.
UNIT
-65
-
1000
450
5
10
2
4
32
150
150
V
V
A
A
A
A
W
C
C
TYP.
MAX.
UNIT
3.95
K/W
55
K/W
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
Rth j-hs
Junction to heatsink
with heatsink compound
Rth j-a
Junction to ambient
in free air
November 1995
Rev 1.100
BUT11AX
ISOLATION LIMITING VALUE & CHARACTERISTIC

Ths = 25 C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
Visol
R.M.S. isolation voltage from all

three terminals to external
heatsink
f = 50-60 Hz; sinusoidal

waveform;
R.H. 65% ; clean and dustfree
Cisol
Capacitance from T2 to external f = 1 MHz

heatsink
MIN.
TYP.
MAX.
UNIT
2500
10
pF
MIN.
TYP.
MAX.
UNIT
1.0
2.0
mA
mA
450
10
-
mA
V
10
10
18
20
1.5
1.3
35
35
V
V
TYP.
MAX.
UNIT
0.6
3.5
0.6
s
s
s
1.5
150
s
ns
1.8
170
s
ns
STATIC CHARACTERISTICS
SYMBOL
ICES
ICES
IEBO
VCEOsust
VCEsat
VBEsat
hFE
hFE
PARAMETER
Collector cut-off current
CONDITIONS
1
VBE = 0 V; VCE = VCESMmax

VBE = 0 V; VCE = VCESMmax;
Tj = 125 C
Emitter cut-off current
VEB = 9 V; IC = 0 A
Collector-emitter sustaining voltage IB = 0 A; IC = 100 mA;
L = 25 mH
Collector-emitter saturation voltages IC = 2.5 A; IB = 0.5 A
Base-emitter saturation voltage
IC = 2.5 A; IB = 0.5 A
DC current gain
IC = 5 mA; VCE = 5 V
IC = 500 mA; VCE = 5 V
DYNAMIC CHARACTERISTICS
SYMBOL
PARAMETER
CONDITIONS
ton
ts
tf
Switching times (resistive load)

Turn-on time
Turn-off storage time
Turn-off fall time
ICon = 2.5 A; IBon = -IBoff = 0.5 A
Switching times (inductive load)
ICon = 2.5 A; IBon = 0.5 A; LB = 1 H;

-VBB = 5 V
ts
tf

Turn-off fall time
Switching times (inductive load)
ts
tf

Turn-off fall time
ICon = 2.5 A; IBon = 0.5 A; LB = 1 H;

-VBB = 5 V; Tj = 100 C
1 Measured with half sine-wave voltage (curve tracer).
November 1995
Rev 1.100
BUT11AX
ICon
90 %
+ 50v
100-200R
90 %
IC
10 %
ts
Horizontal
ton
tf
toff
Oscilloscope
IBon
IB
Vertical
10 %
300R
1R
tr
30ns
6V
30-60 Hz
-IBoff
Fig.4. Switching times waveforms with resistive load.
Fig.1. Test circuit for VCEOsust.
VCC
IC / mA
LC
250
200
IBon
LB
100
T.U.T.
-VBB
min
VCE / V
VCEOsust
Fig.2. Oscilloscope display for VCEOsust.
Fig.5. Test circuit inductive load.

VCC = 300 V; -VBE = 5 V; LC = 200 uH; LB = 1 uH
VCC
ICon
90 %
IC
RL
VIM
10 %
RB
T.U.T.
ts
toff
tp
IB
tf
IBon
t
-IBoff
Fig.6. Switching times waveforms with inductive load.
Fig.3. Test circuit resistive load. VIM = -6 to +8 V

VCC = 250 V; tp = 20 s; = tp / T = 0.01.
RB and RL calculated from ICon and IBon requirements.
November 1995
Rev 1.100
Normalised Derating
120
110
BUT11AX
100
with heatsink compound
IC / A
100
90
80
70
= 0.01
ICM max
60
10
P tot
50
40
IC max
tp =
10 us
II
30
20
10
100 us
(1)
0
0
20
40
60
80
Ths / C
100
120
140
1 ms
Fig.7. Normalised power derating and second

breakdown curves.
10 ms
0.1
(2)
500 ms
DC
IC / A
BUT11AX
III
0.01
10
1000
100
VCE / V
Fig.10. Forward bias safe operating area. Ths 25 C
(1)
(2)
I
II
III
2
1
0
0
400
VCE / V
800
1200
NB:
Fig.8. Reverse bias safe operating area. Tj Tj max
100
h FE
Ptot max and Ptot peak max lines.

Second breakdown limits.
Region of permissible DC operation.
Extension for repetitive pulse operation.
Extension during turn-on in single
transistor converters provided that
RBE 100 and tp 0.6 s.
Mounted with heatsink compound and
30 5 newton force on the centre of the
envelope.
BUT11AX
5V
1V
10
1
0.01
0.1
1
IC / A
10
100
Fig.9. Typical DC current gain.

hFE = f(IC); parameter VCE
November 1995
Rev 1.100
BUT11AX
Fig.11. Typical base-emitter and collector-emitter saturation voltages.

VBEsat = f(IC); VCEsat = f(IC); IC/IB = 5
Fig.12. Collector-emitter saturation voltage. Solid lines = typ values,

dotted lines = max values. VCEsat = f(IB); parameter IC
November 1995
Rev 1.100
BUT11AX
Fig.13. Typical base-emitter saturation voltage.

VBEsat = f(IB); parameter IC
Fig.14. Transient thermal impedance.

Zth j-hs = f(t); parameter D = tp/T
November 1995
Rev 1.100
BUT11AX
MECHANICAL DATA
Dimensions in mm
Net Mass: 2 g
10.3
max
4.6
max
3.2
3.0
2.9 max
2.8
Recesses (2x)
2.5
0.8 max. depth
6.4
15.8
19
max. max.
15.8
max
seating
plane
3 max.
not tinned
3
2.5
13.5
min.
1
0.4
1.0 (2x)
0.6
2.54
0.9
0.7
0.5
2.5
5.08
1.3
Fig.15. SOT186A; The seating plane is electrically isolated from all terminals.
Notes
1. Refer to mounting instructions for F-pack envelopes.
2. Epoxy meets UL94 V0 at 1/8".
November 1995
Rev 1.100
BUT11AX
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1997
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
November 1995
Rev 1.100

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Philips Semiconductors

Silicon Diffused Power Transistor

QUICK REFERENCE DATA

Collector-emitter voltage peak value

Collector-emitter voltage peak value

with heatsink compound

Silicon Diffused Power Transistor

ISOLATION LIMITING VALUE & CHARACTERISTIC

R.M.S. isolation voltage from all

f = 50-60 Hz; sinusoidal

Capacitance from T2 to external f = 1 MHz

VBE = 0 V; VCE = VCESMmax

Switching times (resistive load)

ICon = 2.5 A; IBon = -IBoff = 0.5 A

Switching times (inductive load)

ICon = 2.5 A; IBon = 0.5 A; LB = 1 H;

Turn-off storage time

Turn-off storage time

ICon = 2.5 A; IBon = 0.5 A; LB = 1 H;

1 Measured with half sine-wave voltage (curve tracer).

Silicon Diffused Power Transistor

Fig.4. Switching times waveforms with resistive load.

Fig.1. Test circuit for VCEOsust.

Fig.2. Oscilloscope display for VCEOsust.

Fig.5. Test circuit inductive load.

Fig.6. Switching times waveforms with inductive load.

Fig.3. Test circuit resistive load. VIM = -6 to +8 V

Silicon Diffused Power Transistor

with heatsink compound

Fig.7. Normalised power derating and second

Fig.10. Forward bias safe operating area. Ths 25 C

Fig.8. Reverse bias safe operating area. Tj Tj max

Ptot max and Ptot peak max lines.

Fig.9. Typical DC current gain.

Silicon Diffused Power Transistor

Fig.11. Typical base-emitter and collector-emitter saturation voltages.

Fig.12. Collector-emitter saturation voltage. Solid lines = typ values,

Silicon Diffused Power Transistor

Fig.13. Typical base-emitter saturation voltage.

Fig.14. Transient thermal impedance.

Silicon Diffused Power Transistor

Silicon Diffused Power Transistor

This data sheet contains final product specifications.

LIFE SUPPORT APPLICATIONS

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