Curriculum vitae

Prof. D. Boolchandani
Designation
Qualifications
Contact Detail
Email
Phone No.

: Professor
: Ph.D. from MNIT Jaipur
M.Tech. from IISc Banglore
B.E. from MREC Jaipur
: Dept. of Electronics & Comm.
: dbool@ieee.org
: 0141-2713334

Engineering,MNIT, Jaipur-302017

Research Interests
Macro modeling for Analog subsystems and interconnect, Digital and Analog CMOS circuits , MEMS
based Inertial sensors.

Brief Research Profile

MEMS based Inertial sensors

Journal Publication Details:

S.Khandelwal, L.Garg, D.Boolchandani ,"Reliability Aware Support Vector Machine Based High
Level Surrogate Model For Analog Circuits" , IEEE Transactions on Device and Material

Reliability Volume : PP, no.99, pp.1,1 2015 ISBN: 1530-4388.

Tarun Varma, Shashikant Sharma, C. Periasamy and Dharmendar Boolchandani, Performance

Analysis Of Pt/Zno Schottky Photodiode Using ATLAS Journal of Nanoelectronics

and Optoelectronics 07/2015; 10:1-5. DOI:10.1166/jno.2015.1836

Boolchandani, D., Garg, L., Khandelwal, S., Sahula, V. ,"Variability aware SVM macromodel based
design centering of analog circuits" ,Springer Analog Integrated Circuits and Signal
Processing Volume :73 / 77-87 / 2012 ISBN: 0925-1030

D. Boolchandani and Vineet Sahula ,"Exploring Efficient Kernel Functions for Support Vector
Machine Based Feasibility Models for Analog Circuits" , International Journal of Design,
Analysis and Tools for Integrated Circuits and Systems Volume :1 / 1-8 / 2011

Boolchandani, D., Ahmed, A., Sahula, V. ,"Efficient kernel functions for support vector machine
regression model for analog circuits performance evaluation" , Springer Analog Integrated
Circuits and Signal Processing Volume :66 / 117-128 / 2011 ISBN: 0925-1030

D.Boolchandani, A. Mundra, S.Chelawat, S.Das and P.Agarwal ,"D-MANAV : An Electronic Device

for Unmanned Railway Crossing" , IETE Journal of Education Volume :49 / 89-94 / 2008

Conference Publication Details:

Seema Yardi1, D.Boolchandani , Shantanu Bhattacharya ,"Polymer Waveguide and Optical Fiber
Coupling Using Whispering Gallery Modes in an Elliptical Micro- Sleeve" Optics in the Life
Sciences by OSA at Hawaii / / 2013

Lokesh Garg, Pramod Khandelwal, D. Boolchandani and V. Sahula ,"Improved Sampling

Methodology for Variability Aware Sizing of Analog Circuits" National Conference on VLSI
Design by CEERI at CEERI Pilani / / 2011

D. Boolchandani, Lokesh Garg, Sapna Khandelwal and Vineet Sahula ,"Variability Aware Yield
Optimal Sizing of Analog Circuits Using SVM-Genetic Approach" XI International Workshop on
Symbolic and Numerical Methods, Modeling and Application to Circuit Design by - at
Tunisia / / 2010

D.Boolchandani, A.Kumar and Vineet Sahula ,"Multi-Objective Genetic Approach for Analog Circuit

Sizing Using SVM Macro-Model"TENCON 2009 by IEEE at Singapore / / 2009

D.Boolchandani, Chandrakant Gupta and Vineet Sahula ,"Analog Circuit Feasibility Modeling Using
Support Vector Machine With Efficient Kernel Functions" International Conference on Design,
Analysis and Tools for Integrated Circuits and System by IMECS at Honkong / / 2009

Yashwant Singh and D. Boolchandani ,"Performance Evaluation of Leakage Reduction Technique

for a Single SRAM Cell at 45nm Technology" International Conference on Current Trends in
Technology at Nirma University by - at Ahmedabad / / 2009

D.Boolchandani, M.Ahmed and Vineet Sahula ,"Improved Support Vector Machine Regression for
Analog Circuits Macromodeling Using Efficient Kernel Functions" Workshop on Symbolic &
Numerical Methods, Modeling & Applications to Circuit Design by IEEE at Erfurt, Germany /
/ 2008

Seminar/Symposia/Workshop/Conference/STC Organized:

National Workshop on Analog System Design at MNIT , Jaipur, India from 26-08-2013 to 28-082013.

International Symposia on VDAT 2013 at MNIT & Radisson Blue, Jaipur, India from 27-07-2013
to 30-07-2013.

National Conference on VLSI Design and Test Symposium at MNIT, Jaipur, India from 27-072013 to 30-07-2013.

National Short Term Course on Instruction Enhancement Programme on Semiconductor

Memory Design and Test at MNIT, Jaipur, India from 14-12-2010 to 21-12-2010.

National Workshop on Learning Theory & Support Vector Machines at MNIT, Jaipur, India
from 28-05-2007 to 28-05-2007.

National Short Term Course on AICTE Faculty Development programme on Challanges in

System - on -Chip Design & Verification at MNIT, Jaipur, India from 19-12-2006 to 22-122006.

National Short Term Course on CMOS VLSI Subsystem Design at MNIT, Jaipur, India from 2209-2003 to 26-09-2003.

National Short Term Course on Instruction Enhancement Programme on Analog ICs at MNIT,

Seema Yardi on Enhanced Optical Signal Coupling Between Fibers using SU8
Microdroplet and Sensitive Detection of Analyte using Whispering Gallery Modes
Phenomenon of Optical Sensing Year - 2011 (Ongoing)
Shri Tarun Varma on Fabrication and characterization of Zinc Oxide thin film for
Jaipur, India fromdevice
07-09-2002
to 10-09-2002.
optoelectronics
applications
Year - 2010 (Ongoing)
Ms. Sapna Khandelwal on Reliability and Process aware SVM based Macro models for
analog circuits Year - 2012 (Ongoing)
Mr. Vimal Agarwal on MEMS based inertial Sensor Year - 2011 (Ongoing)
Mr. Raju Patel on Design and Development of MEMS Based Inertial Sensor year 2015
(Ongoing).
Mr. Arun Kishor Johar on Development of MEMS Based optical biosensor for
detection of impurity in water Year 2015(Ongoing).

Professional Affiliation:

Member of IEEE.

Life Member of IETE.

Life Member of ISTE New Delhi.

Research Supervised:

Ongoing Projects Details:

Chief Investigator Special Manpower Development Program For Chips To System Design

Project.

DECLARATION :

I here by declare that all the above information furnished is correct to my

knowledge.

Date:06/08/2015

Place: Jaipur, Rajasthan

Prof. D. Boolchandani