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1. Introduction
The first transistors built in 1947 were
over 1 cm in size; the smallest transistors
today are less than 30 nm long over three
hundred thousand times smaller. The results
of these efforts are billion-transistor
processors where a billion or more
transistor-based circuits are integrated into a
single chip. But this development cannot
continue for much longer. One of the
increasingly difficult problems that chip
designers are facing is that the high density
of components packed on a chip makes
interconnections increasingly difficult; and,
as conventional chip structures continue to
shrink; Moore's Law is on a collision course
with the laws of physics. The key to
fabricating a junctionless gated resistor is the
formation of a semiconductor layer that is
thin and narrow enough to allow for full
depletion of carriers when the device is
turned off. The semiconductor also needs to
be heavily doped to allow for a reasonable
amount of current flow when the device is
turned on. Putting these two constraints
together imposes the use of nanoscale
dimensions and high doping concentrations.
The key to success was the ability to
fabricate silicon nanowires with a diameter of
a few dozens of atomic planes, enabled by
the electron-beam writing techniques and
expertise available today. The electrical
current flows in this silicon nanowire, and the
flow of current is perfectly controlled by a
76
77
78
design [8].
Gate
Phase change material
Source
Drain
SOI box
SOI Box
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