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MICROPROCESSOR BASED SYSTEM DESIGN

FOR VARIOUS APPLICATIONS


INTRODUCTION
We know that microprocessor is the CPU of a computer. A microprocessor can perform
some operation on a data and give the output. But to perform the operation we need an
input to enter the data and an output to display the results of the operation. So we are using
a keyboard and monitor as Input and output along with the processor. Microprocessors
engineering involves a lot of other concepts and we also interface memory elements like
ROM, EPROM to access the memory.
The microprocessor (also called CPU for Central Processing Unit) is the principal element
of a computer, it execute a list of instructions, without any decision of its share. These
instructions lists are commonly called a program. Each model of microprocessor reads
specifics instructions to its design in the form of a basic language which one calls
assembler. This programming language is complex to use since it is specific "machine" and
coded into hexadecimal (as well as the data what still complicates the programming). The
software which we use is written in advanced languages (C, Visual BASIC...) which
transpose the programs out of comprehensible assembler by the processor. Except some
small improvements, all the microprocessors of the computers of the X86 family
include/understand the same assembly language (Pentium, Athlon). The processor does
not make any decision, only conditional instructions are influenced by external situations:
keyboard, request for service of a peripheral.

The interfaced circuit is varied: memory, I/O ports Nevertheless, all the electronic
microprocessor assemblies include a starting program in ROM memory (the contents are
not deleted without supply voltage of the circuit). This program makes it possible the
microprocessor to carry out its initiation with starting (what it must do like detecting the hard
disk, to test the memory). A microprocessor-based system thus consists of several
interfaced circuits, for example, ROM memory (obligatory), memory RAM (working memory
for the results), wearing of entry (keyboard), wearing of exit (bill-poster) put in parallel.

INTERFACING IN MICROPROCESSOR BASED


SYSTEMS

This work develops a new technique for interfacing the data exchange between the
microprocessor-based systems and the external devices. This technique exploits the great
capacity of interfacing of Extended Physical Addressing and uses the technique of Direct
Memory Access (DMA), increases the frequency of the new bus and improves the speed of
data exchange. This Fast Physical Addressing, based on the use of software/hardware
system in the microprocessor-based system, has two aims. First, the management of a
large external memory capacity, with a reduced use of physical addresses of the
microprocessor-based system. Second, the increase of the data exchange speed compared
to the Extended Physical Addressing. While using this architecture in microprocessor based
system or in computer, the input of the hardware part of our system will be connected to the
bus system, and the output, which is a new bus, will be connected to an external device.
The new bus is composed of a data bus, a control bus and an address bus.

Interfacing Types
There are two types of interfacing in context of the 8085 processor
Memory Interfacing.
I/O Interfacing.
Memory Interfacing:
While executing an instruction, there is a necessity for the microprocessor to access
memory frequently for reading various instruction codes and data stored in the memory. The
interfacing circuit aids in accessing the memory.
Memory requires some signals to read from and write to registers. Similarly the
microprocessor transmits some signals for reading or writing a data.
But what is the purpose of interfacing circuit here?
The interfacing process involves matching the memory requirements with the
microprocessor signals. The interfacing circuit therefore should be designed in such a way
that it matches the memory signal requirements with the signals of the microprocessor. For
example for carrying out a READ process, the microprocessor should initiate a read signal
which the memory requires to read a data. In simple words, the primary function of a
memory interfacing circuit is to aid the microprocessor in reading and writing a data to the
given register of a memory chip.

I/O Interfacing:

We know that keyboard and Displays are used as communication channel with outside
world. So it is necessary that we interface keyboard and displays with the microprocessor.
This is called I/O interfacing. In this type of interfacing we use latches and buffers for
interfacing the keyboards and displays with the microprocessor.
But the main disadvantage with this interfacing is that the microprocessor can perform only
one function. It functions as an input device if it is connected to buffer and as an output
device if it is connected to latch. Thus the capability is very limited in this type of interfacing.

Programmable Peripheral Devices


Programmable peripheral devices were introduced by Intel to increase the overall
performance of the system. These devices along with I/O functions, they perform various
other functions such as time delays, counters and interrupt handling. These devices are
nothing but a combination of many devices on a single chip. A programmable device can be
set up to perform specific function by writing a code in the internal register. As this code
controls the function of the device it's called control word and internal register in which it is
stored is called Control Register.
INTEL developed some peripheral devices for processors like 8085/8086/8088. The
peripheral devices includes
8255 - Parallel Communication Interface (PPI)
8251 - Serial communication Interface (USART- Universal Synchronous/Asynchronous
Receiver/Transmitter)
8257 - DMA Controller
8279 - Keyboard/Display Controller
8259 - Programmable Interrupt controller
8254 - Programmable Timer

Types of Communication Interface


There are two ways in which a microprocessor can connect with outside world or other
memory systems.
1.Serial Communication Interface
2.Parallel Communication interface

Serial Communication Interface:


In serial communication interface, the interface gets a single byte of data from the
microprocessor and sends it bit by bit to other system serially (or) the interface receives
data bit by bit serially from the external systems and converts the data into a single byte and
transfers it to the microprocessor.

Parallel Communication Interface:


This interface gets a byte of data from microprocessor and sends it bit by bit to the other
systems in simultaneous (or) parallel fashion. The interface also receives data bit by bit
simultaneously from the external system and converts the data into a single byte and
transfers it to microprocessor.
Consider that we have a microprocessor interfaced to both I/O device and also a memory
chip. Now how to select between the two devices according to the requirement?
For this purpose an address decoding circuit is used. An address decoding circuit aids in
selecting the required I/O device or a memory chip.

INTERFACING OF 8255 PROGRAMMABLE


PERIPHERAL INTERFACE WITH 8085
MICROPROCESSOR
1.The 8255 can be either memory mapped or I/O mapped in the system. In the schematic
shown in above is I/O mapped in the system.
2.Using a 3-to-8 decoder generates the chip select signals for I/O mapped devices.
3.The address lines A4, A5 and A6 are decoded to generate eight chip select signals (IOCS0 to IOCS-7) and in this, the chip select IOCS- 1 is used to select 8255.
4.The address line A7 and the control signal IO/M (low) are used as enable for the decoder.
5.The address line A0 of 8085 is connected to A0 of 8255 and A1 of 8085 is connected to
A1 of 8255 to provide the internal addresses.
6.The data lines D0-D7 are connected to D0-D7 of the processor to achieve parallel data
transfer.

INTERFACING OF 8279 KEYBOARD/DISPLAY


CONTROLLER WITH 8085 MICROPROCESSOR
1.The circuit can be used in 8085 microprocessor system and consist of 16 numbers of
hexa-keys and 6 numbers of 7-segment LEDs.
2.The 7-segment LEDs can be used to display six digit alphanumeric character.
3.The 8279 can be either memory mapped or I/O mapped in the system. In the circuit
shown is the 8279 is I/O mapped.
4.The address line A0 of the system is used as A0 of 8279.
5.The clock signal for 8279 is obtained by dividing the output clock signal of 8085 by a clock
divider circuit.
6.The chip select signal is obtained from the I/O address decoder of the 8085 system. The
chip select signals for 7.I/O mapped devices are generated by using a 3-to-8 decoder.
8.The address lines A4, A5 and A6 are used as input to decoder.
9.The address line A7 and the control signal IO/M (low) are used as enable for decoder.
10.The chip select signal IOCS-3 is used to select 8279.

INTERFACING OF 8259 PROGRAMMABLE


INTERRUPT CONTROLLER WITH 8085
MICROPROCESSOR
1.It requires two internal address and they are A =0 or A = 1.
2.It can be either memory mapped or I/O mapped in the system. The interfacing of 8259 to
8085 is shown in figure is I/O mapped in the system.
3.The low order data bus lines D0-D7 are connected to D0-D7 of 8259.
4.The address line A0 of the 8085 processor is connected to A0 of 8259 to provide the
internal address.
5.The 8259 require one chip select signal. Using 3-to-8 decoder generates the chip select
signal for 8259.
6.The address lines A4, A5 and A6 are used as input to decoder.

7.The control signal IO/M (low) is used as logic high enables for decoder and the address
line A7 is used as logic low enable for decoder.
First the 8259 should be programmed by sending Initialization Command Word (ICW) and
Operational Command Word (OCW). These command words will inform 8259 about the
following,
Type of interrupt signal (Level triggered / Edge triggered).
Type of processor (8085/8086).
Call address and its interval (4 or 8)
Masking of interrupts.
Priority of interrupts.
Type of end of interrupts.
Once 8259 is programmed it is ready for accepting interrupt signal. When it receives an
interrupt through any one of the interrupt lines IR0-IR7 it checks for its priority and also
checks whether it is masked or not. If the previous interrupt is completed and if the current
request has highest priority and unmasked, then it is serviced.
For servicing this interrupt the 8259 will send INT signal to INTR pin of 8085. In response it
expects an acknowledge INTA (low) from the processor. When the processor accepts the
interrupt, it sends three INTA (low) one by one. In response to first, second and third INTA
(low) signals, the 8259 will supply CALL opcode, low byte of call address and high byte of
call address respectively. Once the processor receives the call opcode and its address, it
saves the content of program counter (PC) in stack and load the CALL address in PC and
start executing the interrupt service routine stored in this call address.

DISADVANTAGES
1. It has limitations on the size of data.
2. Most Microprocessor does not support floating-point operations.
3. Over heating physically.
4. Not bit addressable.

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