2015 SEMI Market Trends Forum-04-Expanding The Role Fan-In and FO-WLP Technology and Infrastructure Developments-20150903

Expanding
the Role of Fan-in

and FO-WLP: Technology and
Infrastructure Developments
E. Jan Vardaman, President and
Founder, TechSearch InternaGonal
www.techsearchinc.com
2015 TechSearch International, Inc.
Mobile Products ConGnue to Get Thinner
Source: ASE.
iPhone Trends: Increasing Number of WLPs

iPhone Evolution
30
13
12
25
WLCSPs
10
15
9
10
8
5
6
1 /2007
3GS /2009
4S /2011
iPhone Model/year
iPhone 1
2007
2 WLPs
iPhone 3GS
2009
4 WLPs
iPhone 4S
2011
7 WLPs
iPhone 5
2013
11+ WLPs
iPhone 5S
2013
22 WLPs
iPhone 6
2014
26+ WLPs
5S /2013
WLPs
6 /2014
6+ /2014
Thickness
iPhone 6 Plus
2014
26+ WLPs
Source: ASE and TechSearch International, Inc., adapted from TPSS.
Shown to scale
5 /2012
Thickness (mm)
11
20
Drivers for WLP

Major applicaGons for WLP
Smartphones (highest volume applicaGon)
Digital cameras and camcorders
Laptops and tablets
Medical
AutomoGve
Wearable electronics such as watch
WLP meets system packaging needs
Small form factor
Need for low prole packages
Lower cost (less material)
Form Factor is Key
Low prole
Limited space on PCB
ConvenGonal WLP ApplicaGons

ConvenGonal WLPs for many device types (analog, digital,
sensor, discrete)
Power management IC (PMIC)
Audio CODEC
RF
IPD, ESD protecGon, lter
LED driver
Electronic compass
Controller
MOSFET
CMOS image sensors
Ambient light sensors
EEPROM
ConvenGonal WLPs trends
Highest I/O count 309 (Fujitsu power management IC)
Largest body size Qualcomm PMIC 6.5 mm x 6.5 mmx
0.71 mm, 0.4mm pitch
Increasing number of 0.4mm pitch parts, some 0.35mm
pitch
Fine pitch parts need high-density PCB to route signals
Source: ASE.
Fan-In WLP Market ProjecGons

50,000
Millions' of'Units
40,000
30,000
20,000
10,000
0
2013
2014
2015
2016
2017
2018
2019
Source:33TechSearch3International, Inc.
ConvenGonal fan-in WLP demand

Growth driven by greater adopGon in smartphones, tablets, and wearable
electronics
CAGR of almost 9% from 2014 to 2019

Drivers for FO-WLP

Smaller form factor, lower prole package: similar
to convenGonal WLP in prole (can be 0.4 mm)
Thinner than ip chip package (no substrate)
Can enable a low-prole PoP solu3on as large as
15mm x 15mm body
Support increased I/O density

Allows use of WLP with advanced semiconductor
technology nodes with die shrinks
With increased I/O and smaller die cant fan-in
using conven3onal WLP
Split die package or mulG-die package/SiP

Mul3ple die in package possible
Die fabricated from dierent technology nodes
can be assembled in a single package
Can integrate passives
Excellent electrical and thermal performance
Excellent high temperature warpage performance
Improved board-level reliability
Fine L/S (10/10m), roadmaps for (5/5m)
Source: STATS ChipPAC.
Intel Wireless
Division
LTE analog
baseband
5.32 x 5.04 x 0.7mm
eWLB
127 balls, 0.4mm
pitch
Source: TPSS.
NANIUMs eWLB Technology Roadmap

Package Size
(mm2)
12 x 12
Metallization
Layers
(RDL & UBM)
1x2 Single Side
Line / Space
(m/m)
10/10
1x3 Single Side

2x1 Double Side
Panel Size
(mm)
300 dia
Die-to-Die
(m)
120
Die-to-Pkg
(m)
75
Package
Construction
25 x 25 (SiP)
Single Die
8/8
30 x 30 (SiP)
1x4 Single Side
2x2 Double Side

5/5
2/2
300plus dia
450 dia
80
50
PoP
rectangular
50
30
Stacked-Die
Multi-Die SbS
w/ Passives
2014
2015
2016
2017
Source: Nanium
MulG-Die/SiP FO-WLP SoluGon
2 Layer-RDL InterconnecGon
2 AcGve Die + 10 Passives 0201 SMD
After Thin Film Processing,

Solder Ball Attach and Singulation
After Molding
After Pick & Place
Source: NANIUM
FO-WLP for AutomoGve ApplicaGon Drivers

Growth of acGve safety systems
for automoGve applicaGons
FO-WLP being adopted for
mmWave applicaGons
NXP radar module in FO-WLP
Parking slot measurement (SRR)

Blind spot detec3on (SRR)
Adap3ve cruise control (LRR
77GHz)
Emergency breaking
Lane correc3on
Volumetric shrink of current and

future systems (40 to 90%)
Increased funcGonality with
heterogeneous integraGon
Improved in system performance
Source: NXP.
Continental announced it is integrating

Freescales 77GHz radar technology
into its next generation short- and midrange automotive radar modules
Low parasi3cs
Low inductance
Improved board level reliability

Source: Freescale.
ApplicaGon Processor Packaging Trends

Thinner package and smaller footprint
Today 1.0mm height requirement
Future 0.8 mm
3D IC with TSV provides the ulGmate in
package height reducGon, but conGnues to
be pushed out
Silicon interposers too expensive for many
mobile products
PoP in high-end smartphones
Op3on 1: Con3nue with FC on thin
substrate
Op3on 2: Embedded AP in boaom
laminate substrate (MCeP)
Op3on 3: Fan-out WLP with
applica3on processor as boaom
package
Op3on 4: Some new format (SWIFT,
NTI, etc.)
FO-WLP AP in bokom PoP
Low prole
High rou3ng density
Handle high power
System integra3on with compe33ve
cost
Todays PoP (1.0mm)
FO-WLP as Bottom PoP (<0.8mm)
FO-WLP ProjecGons
2,100"
Millions'of'Units'
1,800"
1,500"
1,200"
900"
600"
300"
0"
2014"
2015"
2016"
2017"
2018"
2019"
Source:""TechSearch"Interna:onal,"Inc."
Early products included baseband processor (Inneon Wireless Division)

Device types include RF such as Bluetooth, NFC, GPS, PMIC, automoGve radar, future
applicaGon processors

FO-WLP Merchant Suppliers Status

Amkor Technology redeploying FO-WLP with new 300mm line
(eWLB) in K4 plant
ADL Engineering 200mm pilot line in Taiwan
ASE license for Inneons eWLB with 300mm in Taiwan, also oers
chip last panel version
Deca Technologies (300mm panel format)
FCI/Fujikura (embedded WLP in ex circuit)
NANIUM (300mm wafer) license for Inneons eWLB
NEPES (300mm line in Korea) based on Freescales RCP process
PTI (R&D on panel)
SPIL (300mm wafer)
STATS ChipPAC (300mm wafer) will be purchased by JCET, license for
Inneons eWLB
TSMC (300mm wafer InFO WLP)
New suppliers TBD
Industry Needs Same Package Choice from Suppliers

Success of McDonalds
Hamburgers
Looks the same
Taste the same
No maaer which
geographic region
Packages need to.
Look the same

Have the same reliability
No maaer which company/
country loca3on
ExcepGons to the McDonalds Hamburger Rule

When a foundry.
Provides its foundry customer a
packaging solu3on
Enables faster 3me to market
with silicon and package delivery
Provides a warranty accepted by
end customer
When a company is verGcally

integrated.
From silicon design and
fabrica3on to IC package and
assembly to end product
If same funcGon is accepted

Dierent process
Alterna3ve accepted with same
func3on, performance, and
reliability
AlternaGves to ReconsGtuted Wafer FO-WLP

Reconstituted Wafer FO
Amkors SWIFT
ASEs chip last
ConvenGonal ip chip
Source: Infineon.
Source: Amkor.
SPILs NTI
Molded Interconnect Substrate (MIS)
Embedded die soluGon/panel
processing

Source: ASE.
IC
IC
Source: TDK.
Source: SPIL.
Amkors SWIFT
Target Markets
Mobile, Networking
BB, AP, Logic + Memory, Deconstructed SoC
SWIFTTM Single Die Overmold
UGlizes ExisGng Bump and Assembly

Capability
SWIFTTM 2 Die Overmold
Polymer based
Flexible
Mul3-die and large die capability
Large package body capability
SWIFTTM 2 Die Exposed
Advanced die integra3on

Stepper capability down to 2um line/space
Die shig / orthogonal rota3on elimina3on
Down to 30um in-line copper pillar pitch
SWIFTTM 2 Die TMV PoP Overmold
3D capability
Package stack capability
using Cu pillars or TMV
SWIFTTM 2 Die Fan-in PoP
ASEs Chips Last Package
Source: ASE.
Uses low-cost coreless substrate

Fine pitch capable (15 L/S today, 12m L/S
development)
Manufactured in double panel format
Assembled in strip format
Mul3-die and passives possible
Can be boaom PoP
Thin package (<375 m)
High current and thermal handling capabiliGes
Due to thicker Cu (15-20 m)
Uses exisGng FC infrastructure
Flip chip with Cu pillar mounted on coreless
substrate
Mass reow and molded underll
Fan Out Chip Last Panel vs Wafer UGlizaGon

Panel Size: 510x410 mm (209, 100mm2) X 2
Strip Size: 240x76.2 mm (X2L)
Strip Array: 34x13 => 442 ea
Wafer size : 300mm(70,686mm2)
6:1 Area
Source: ASE.
Molded Interconnect Substrate

External%
Terminal
Top%View
Wire%bond%
Terminal
Bo5om%View
Inner)Lead)for)
WB)or)FC
Carrier
Outer)Lead)with)
NiPdAu)or)OSP
Outer)Lead)with)
NiPdAu)or)OSP
Source: JCET.
MIS-BGA oered by JCET (owns APS) and SPIL

Versions oered by other OSATs
Is Panel Processing a Viable AlternaGve?

What size panel is feasible?
Assembly of die on panel
Die placement accuracy may be more dicult to control with large panels
Large area bonders may be required
Throughput (3me required to pick and place die in panel)
How is placement accuracy impacted by tape and mold compound?
What level of inspec3on is required to verify accuracy? What speed?
Dielectric dispense methods?
How to control run-out at edge?
Need inspec3on for even coa3ng?
Molding materials and process?
Panel warpage
Warpage increases with panel size
Impact of materials (mold compound and ller)
What type of inspec3on is requires and how will it work with warped panels
Via formaGon method (minimum via diameter)
Via alignment
Metal plaGng
Metal to dielectric interface (what inspecGon requirements?)
How to spuker seed layer?
Interconnect reliability? InspecGon for broken metal traces etc.
SingulaGon method?
Solder ball placement and inspecGon method?
AddiGonal ConsideraGons for Panel Processing

Warpage (impacts assembly/
manufacturability)
Heterogeneous materials and non-
symmetric structures can cause
bowing
Polymer materials with adapted
CTE and modulus, plus low shrink
Accuracy/resoluGon (miniaturizaGon)
Improved op3cal recogni3on
systems for placement equipment
Imaging with high depth of focus
and high resolu3on
Yield (impacts cost)
Suited materials and components
Op3mized processes
Produc3on experience
Source: Fraunhofer IZM.

Conclusions
Mobile products require low prole packages
Fan-in WLP
FO-WLP
Demand for lower cost soluGons drives adopGon of new package
designs and formats
Round panels?
New chip last packages?
MIS on modied leadframe?
Large area processing?
Many package choices
Few standard op3ons except conven3onal WLP
Growing number of companies selec3ng FO-WLP with recons3tuted
wafer
Alterna3ves will con3nue to be developed

Thank you!
TechSearch Interna3onal, Inc.
4801 Spicewood Springs Road, Suite 150
Aus3n, Texas 78759 USA
+1.512.372.8887
tsi@techsearchinc.com

2015 SEMI Market Trends Forum-04-Expanding The Role Fan-In and FO-WLP Technology and Infrastructure Developments-20150903

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Expanding

the Role of Fan-in

2015 TechSearch International, Inc.

Mobile Products ConGnue to Get Thinner

2015 TechSearch International, Inc.

iPhone Trends: Increasing Number of WLPs

Source: ASE and TechSearch International, Inc., adapted from TPSS.

2015 TechSearch International, Inc.

Drivers for WLP

2015 TechSearch International, Inc.

ConvenGonal WLP ApplicaGons

2015 TechSearch International, Inc.

Fan-In WLP Market ProjecGons

ConvenGonal fan-in WLP demand

2015 TechSearch International, Inc.

Drivers for FO-WLP

Support increased I/O density

Split die package or mulG-die package/SiP

2015 TechSearch International, Inc.

Source: STATS ChipPAC.

NANIUMs eWLB Technology Roadmap

1x2 Single Side

1x3 Single Side

2x2 Double Side

2015 TechSearch International, Inc.

MulG-Die/SiP FO-WLP SoluGon

After Thin Film Processing,

2015 TechSearch International, Inc.

FO-WLP for AutomoGve ApplicaGon Drivers

NXP radar module in FO-WLP

Parking slot measurement (SRR)

Volumetric shrink of current and

Continental announced it is integrating

Improved board level reliability

2015 TechSearch International, Inc.

ApplicaGon Processor Packaging Trends

Todays PoP (1.0mm)

FO-WLP as Bottom PoP (<0.8mm)

2015 TechSearch International, Inc.

Early products included baseband processor (Inneon Wireless Division)

2015 TechSearch International, Inc.

FO-WLP Merchant Suppliers Status

2015 TechSearch International, Inc.

Industry Needs Same Package Choice from Suppliers

Packages need to.

Look the same

2015 TechSearch International, Inc.

ExcepGons to the McDonalds Hamburger Rule

When a company is verGcally

If same funcGon is accepted

2015 TechSearch International, Inc.

AlternaGves to ReconsGtuted Wafer FO-WLP

2015 TechSearch International, Inc.

SWIFTTM Single Die Overmold

UGlizes ExisGng Bump and Assembly

SWIFTTM 2 Die Exposed

Advanced die integra3on

SWIFTTM 2 Die TMV PoP Overmold

2015 TechSearch International, Inc.

ASEs Chips Last Package

Uses low-cost coreless substrate

2015 TechSearch International, Inc.

Fan Out Chip Last Panel vs Wafer UGlizaGon