STLD Lesson Plan

DATE
LESSON PLAN
UNIT 1
CHAPTER
PART
Review of Number systems
Representation of numbers of different radix, conversion
INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

Need and benefits of Numbering systems of different radix
Conversion procedure of numbering system
KEY CONCEPTS
A Representation in Binary number system
B Representation in Octal number system
C Representation in hexadecimal
D
E
F
CONTENT
PREPARED
BOOK LEADS
yes
VISUALAID
yes
PREPARED
Switching Theory & Logic Design
PPT PREPARED
( By A. Anand Kumar )

( By D.A.Godse A.P.Godse )
JOURNAL LEADS
INTERNET LEADS
http://www.electronics-tutorials.ws/
www.slideshare.net
www.Nptel.ac.in
HOME WORK / UNIT ASSIGNMENTS
9
Conversion of radix representation
10
CLASS ROOM QUIZ

A Give an example of representation radix in Binary code
B Give an example of representation radix in Binary Binary logic
C Give an example of representation radix in Binary Hex code
D Give an example of representation radix in Binary Octal code
E
F
DATE
LESSON PLAN
yes
PAGE
NO
PAGE
NO
22
1.1
UNIT 1
CHAPTER
radix, r-1s complement and rs complement of unsigned numbers subtraction,

problem solving.
PART

Problem of solving unsigned numbers
KEY CONCEPTS
A Diminished radix complement
B Subtraction with complements
C Signed binary numbers
D
E
F
CONTENT
PREPARED
BOOK LEADS
yes
VISUALAID
yes
PREPARED
PPT PREPARED

JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
http://www.electronics-tutorials.ws
www.Nptel.ac.in
9
Example problem solving
10
CLASS ROOM QUIZ

A What is radix?
B What is Rs compliment?
C What is Unsigned?
D
E
F
DATE
LESSON PLAN
yes
PAGE
NO
PAGE
NO
35
1.4
UNIT 1
CHAPTER
PART
4-bit codes: BCD, EXCESS 3, alphanumeric codes,9s complement, 2421, 8421

Introduction BCD, EXCESS 3, ,9s Complement,
Introduction Alphanumeric Codes
Introduction 2421, 8421
KEY CONCEPTS
A 2421
B 8421
C Binary coded decimal
D Xs 3 code
E
F
CONTENT
PREPARED
BOOK LEADS
yes
VISUALAID
yes
PREPARED
PPT PREPARED

JOURNAL LEADS
INTERNET LEADS
yes
PAGE
NO
PAGE
NO
64
1.3
1
www.slideshare.net
www.Nptel.ac.in
2421, 8421
Xs 3 code
Binary coded decimal
10
CLASS ROOM QUIZ

A What is 2421?
B What is excess 3?
C What is full form of BCD?
D
E
F
DATE
1
LESSON PLAN
UNIT 1
PART
CHAPTER
Logic operation: Basic logic operations NOT,OR,AND,Boolean theorems,

Complement and dual of logical expressions, NAND and NORGates, EX-OR, EXNOR Gates

Operation logics
NOT,OR,AND,Boolean theorems
dual of logical expressions
KEY CONCEPTS
A AND,NAND
B OR, NOR
C NOT
D DUALITY
E complement
F EX-OR,EX-NOR
CONTENT
PREPARED
BOOK LEADS
yes
VISUALAID
yes
PREPARED
PPT PREPARED

JOURNAL LEADS
INTERNET LEADS
yes
PAGE
NO
PAGE
NO
111
2.2
5
www.slideshare.net
www.Nptel.ac.in
AND,NAND OR, NOR
NOT DUALITY
DUALITY
10
CLASS ROOM QUIZ

A What is gate?
B What is logic?
C What is demorgans law?
D What is duality?
E
F
DATE
1
LESSON PLAN
UNIT 1
PART
CHAPTER
standard SOP and POS, Gray code

Need And Benefits Of Standard Sop And Pos, Gray Code
KEY CONCEPTS
A k-map
B Total complement realization
C Sum of products
D Product of sums
E Gray code
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
yes
PAGE
NO
PAGE
NO
150
2.5
5
www.Nptel.ac.in
www.slideshare.net
9
standard SOP and POS, Gray code notes preparation
10
CLASS ROOM QUIZ

A What is k-map
B What is Total complement realization
C What is Sum of products
D What is Product of sums
E What is Gray code
F
DATE
LESSON PLAN
UNIT 1
CHAPTER

Error detection and error correction codes, parity checking, Hamming code
PART

Introduction, Need And Benefits Of Hamming code
Introduction, Need And Benefits Of Error detection and error correction codes, parity checking, Hamming
code
Introduction, Need And Benefits Of parity checking,

4
KEY CONCEPTS
A Error detection
B Error correction
C Parity check
D Hamming code
E
F
CONTENT
PREPARED
BOOK LEADS
yes
VISUALAID
yes
PREPARED
PPT PREPARED

JOURNAL LEADS
INTERNET LEADS
yes
PAGE
NO
PAGE
NO
1.5
4
www.slideshare.net
www.Nptel.ac.in
9
Error detection and error correction codes examples
10
CLASS ROOM QUIZ

A What is Even parity?
B What is Odd parity?
C What is checksum?
D
E
F
DATE
LESSON PLAN
UNIT 1
CHAPTER

Two level NAND-NAND and NOR-NOR realizations
PART

Benefits Of Two level NAND-NAND and NOR-NOR realizations
KEY CONCEPTS
A Multi level gate
B NAND-NAND realization
C NOR_NOR realization
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
yes
PAGE
NO
PAGE
NO
130
2.6
5
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
NAND-NAND realization material gathering
NOR_NOR realization notes

10
CLASS ROOM QUIZ

A Define Sum of products?
B Define Product of sums?
C Define Nand?
D Define Nor?
E
F
DATE
LESSON PLAN
UNIT 2
CHAPTER
Minimisation of switching functions

Boolean theorems,principle of complementation,duality
PART
Introduction to Boolean theorems,principle of complementation,duality

4
KEY CONCEPTS
A Theorems
B Complementation
C Duality concept
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
yes
PAGE
NO
PAGE
NO
131
JOURNAL LEADS
www.Nptel.ac.in
INTERNET LEADS
www.slideshare.net
9
Theorems practice
10
CLASS ROOM QUIZ

A Demorgans theorem?
B What is Associative law?
C What is Distributive law?
D What is Commutative law?
E
F
DATE
LESSON PLAN
UNIT 2
CHAPTER

Demorgans theorems,minimization of logic functions using k-map
PART

Using k-map for minimization of logic functions
KEY CONCEPTS
A Solving function
B Reducing fuction
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
yes
PAGE
NO
PAGE
NO
137
3.7
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
9
Solving function
10
CLASS ROOM QUIZ

A Example solve?
B What is demorgan theorem?
C
D
E
F
DATE
1
LESSON PLAN
UNIT 2
Minimization of switching functions
PART
CHAPTER
Minimization using Boolean theorem

Introduction to Boolean theorem
KEY CONCEPTS
A Boolean theorem
B
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
9
Boolean theorem
10
CLASS ROOM QUIZ

A What is minimizing techniques?
B
C
D
E
F
DATE
LESSON PLAN
yes
PAGE
NO
PAGE
NO
146
3.1
1
UNIT 2
CHAPTER
PART

Introduction to Minimisation of switching functions
KEY CONCEPTS
A Two variable k map
B Three variable k map
C Four variable k map
D Dont care
E Minterm
F Maxterm
CONTENT
PREPARED
BOOK LEADS
yes
VISUALAID
yes
PREPARED
PPT PREPARED

JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
Dont care.
What is Minterm and Maxterm

Two three four variable k map
10
CLASS ROOM QUIZ

A What is mapping of SOP expression?
B What is mapping of POS expression?
C Prime implicant?
D
E
F
yes
PAGE
NO
PAGE
NO
203
3.1
1
DATE
LESSON PLAN
UNIT 2
CHAPTER
PART
Minimization of switching functions using k-map 6 variables

Need And Benefits Of Minimization of switching functions using k-map 6 variables
KEY CONCEPTS
A Six variable k map
B Prime implicants
C Dont cares
D Hybrid logic
E Limitations of k map
F
CONTENT
PREPARED
BOOK LEADS
yes
VISUALAID
yes
PREPARED
PPT PREPARED

JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
Six variable k map
Prime implicants
Hybrid logic
10
CLASS ROOM QUIZ

A What are essential prime implicants?
B What is hybrid logic?
C What is six variable k map?
D
E
F
yes
PAGE
NO
PAGE
NO
228
3.1
5
DATE
LESSON PLAN
UNIT 2
CHAPTER
PART
Tabular minimization

Introduction to Tabular minimization
KEY CONCEPTS
A Tabular minimization procedure
B
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
9
Tabular minimization
10
CLASS ROOM QUIZ

A Explain the procedure for Tabular minimization?
B
C
D
E
F
yes
PAGE
NO
PAGE
NO
258
3.3
5
DATE
LESSON PLAN
UNIT 2
CHAPTER
PART
Problem solving
KEY CONCEPTS
A Procedure for Problem solving?
B
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
9
Problem solving
10
CLASS ROOM QUIZ

A Explain the procedure of Problem solving?
B
C
D
E
F
yes
PAGE
NO
PAGE
NO
259
3.4
9
DATE
LESSON PLAN
UNIT 2
CHAPTER
PART
code converters using k map

Introduction to code converters using k map
KEY CONCEPTS
A
B
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
9
code converters using k map
10
CLASS ROOM QUIZ

A code converting procedure using k map?
B
C
D
E
F
yes
PAGE
NO
PAGE
NO
312
DATE
LESSON PLAN
UNIT 3
CHAPTER
PART
Combinational logic circuits
Design of Half adder, full adder, half subtractor, full

subtractor, applications of full adders

Design of Half adder, full adder, applications of full adders
half subtractor, full subtractor,
applications of full adders
KEY CONCEPTS
A Half adder
B Full adder
C Half subtractor
D Full subtractor
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
9
applications of full adders
10
CLASS ROOM QUIZ

A Expression for HA?
B Expression for FA?
C Expression for HS?
D Expression for FS?
E
F
yes
PAGE
NO
PAGE
NO
289
4.3
DATE
LESSON PLAN
UNIT 3
CHAPTER
PART
4-bit binary adder, 4-bit binary subtractor, adder-subtractor

circuit, BCD adder circuit

adder-subtractor circuit,benefits
KEY CONCEPTS
A BCD addition
B BCD subtraction
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
BCD addition circuit diagrams
BCD addition circuit diagrams

10
CLASS ROOM QUIZ

A Give an example of BCD addition circuit ?
B Give an example of BCD subtraction circuit ?
C Give an example of 4 bit binary addition circuit ?
D Give an example of 4 bit binary addition circuit ?
E
F
yes
PAGE
NO
PAGE
NO
299
4.1
2
DATE
LESSON PLAN
UNIT 3
CHAPTER
PART
Excess3 adder circuit, look-a-head adder circuit, Design of decoder

Introduction to Design of decoder
KEY CONCEPTS
A Xs3 addition
B Xs3 subtraction
C decoder
D Look ahead
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
Xs3 addition practice
Xs3 subtraction practice

10
CLASS ROOM QUIZ

A Explain Xs3 addition?
B Explain Xs3 subtraction?
C Explain decoder?
D
E
F
yes
PAGE
NO
PAGE
NO
307
4.2
1
DATE
LESSON PLAN
UNIT 3
CHAPTER
PART
Demultiplexer, higher order demultiplexing, 7 segment decoder

Introduction to Demultiplexer,
Introduction to 7 segment decoder
KEY CONCEPTS
A Data distributors
B Demultiplexing tree
C Decoder
D 7 segment
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
Demultiplexing tree.
10
CLASS ROOM QUIZ

A What are Data distributors?
B What is Demultiplexing tree?
C Write 7 segment code?
D
E
F
yes
PAGE
NO
PAGE
NO
361
4.7
1
DATE
LESSON PLAN
UNIT 3
CHAPTER
PART
encoder, multiplexer, higher order multiplexer

Introduction to encoder
KEY CONCEPTS
A 2 input mux
B 4 input mux
C 16 input mux from two 8 input mux
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
16 input mux from two 8 input mux
10
CLASS ROOM QUIZ

A Explain 2 input mux?
B Explain 4 input mux?
C Explain 16 input mux from two 8 input mux?
D
E
F
yes
PAGE
NO
PAGE
NO
337
4.4
9
DATE
LESSON PLAN
UNIT 3
CHAPTER
PART
realization of Boolean functions using decoders and multiplexers

Boolean functions introduction
KEY CONCEPTS
A Decoder
B multiplexer
C Boolean function
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
Decoder
multiplexer
Boolean function
10
CLASS ROOM QUIZ

A Define Decoder?
B Define multiplexer?
C Define Boolean function?
D
E
F
yes
PAGE
NO
PAGE
NO
344
4.3
4
DATE
LESSON PLAN
UNIT 3
CHAPTER
PART
priority encoder,4 bit digital comparator

priority encoder introduction
4 bit digital comparator benifits
KEY CONCEPTS
A 4 input priority encoder
B Decimal to bcd pe
C Octal to binary pe
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
4 input priority encoder
Decimal to bcd pe
Octal to binary pe
10
CLASS ROOM QUIZ

A Define 4 input priority encoder?
B Define Decimal to bcd priority encoder?
C Define Octal to binary priority encoder?
D
E
F
yes
PAGE
NO
PAGE
NO
341
4.5
4
DATE
LESSON PLAN
UNIT 4
CHAPTER
PART
PROM,PLA,PAL, basic structures

Introduction to basic structures
KEY CONCEPTS
A ROM organization
B Combinational circuit implementation
C Types of ROMs
D Programmable ROM
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
ROM organization
Typres of ROMs
10
CLASS ROOM QUIZ

A ROM organization how ?
B Mention Types of ROMs ?
C Combinational circuit implementation how ?
D
E
F
yes
PAGE
NO
PAGE
NO
434
5.2
DATE
LESSON PLAN
UNIT 4
CHAPTER
PART
Realization of Boolean function with plds

Introduction to Boolean function with plds
KEY CONCEPTS
A Logic device
B Programmable logic device
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
9
Logic device
10
CLASS ROOM QUIZ

A Define Logic device?
B Define Programmable logic device?
C Compare Logic device and Programmable logic device?
D
E
F
yes
PAGE
NO
PAGE
NO
439
DATE
LESSON PLAN
UNIT 4
CHAPTER
PART
Programming tables of PLDs

Introduction to Programming tables of PLDs
KEY CONCEPTS
A Program table
B PLD
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
Program table
PLD
10
CLASS ROOM QUIZ

A How to construct a Program table?
B
C
D
E
F
yes
PAGE
NO
PAGE
NO
439
DATE
LESSON PLAN
UNIT 4
CHAPTER
PART
Merits and demerits, comparison of PROM,PLA,and PALrealization of boolean

functions using PROM,PLA and PAL

Introduction to PROM,PLA,and PALrealization of boolean functions
KEY CONCEPTS
A Comparision of PROM,PLA
B PROM
C PAL,PLA
D Merits
E demerits
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
Comparision
Merits
demerits
10
CLASS ROOM QUIZ

A Merits and de merits of PROM, PLA, and PAL realization?
B
C
D
E
F
yes
PAGE
NO
PAGE
NO
439
DATE
LESSON PLAN
UNIT 4
CHAPTER
PART
Realization of Boolean functions using PROM,PAL,PLA

Introduction to PROM,PAL,PLA
KEY CONCEPTS
A Realizations
B
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
9
Realizations material
10
CLASS ROOM QUIZ

A
B Realization of Boolean functions procedure ?
C
D
E
F
yes
PAGE
NO
PAGE
NO
405
5.1
DATE
LESSON PLAN
UNIT 4
CHAPTER
PART
Programming tables of PROM,PAL,PLA

Introduction to PROM,PAL,PLA
KEY CONCEPTS
A Program table of PAL
B Program table of PLA
C Program table of PROM
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
Program table of PAL
Program table of PLA

Program table of PROM
10
CLASS ROOM QUIZ

A Explain Program table of PAL?
B Explain Program table of PLA?
C Explain Program table of PROM?
D
E
F
yes
PAGE
NO
PAGE
NO
416
5.1
DATE
LESSON PLAN
UNIT 5
CHAPTER
PART
Sequential circuits
Classification of sequential circuits (synchronous and asynchronous)

Introduction to sequential circuits
KEY CONCEPTS
A Sequential circuit
B Synchronous circuit
C Asynchronous circuit
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
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Sequential circuit diagrams
Synchronous circuit diagrams

Asynchronous circuit diagrams
10
CLASS ROOM QUIZ

A Draw Sequential circuit diagrams?
B Draw Synchronous circuit diagrams?
C Draw Asynchronous circuit diagrams?
D
E
F
yes
PAGE
NO
PAGE
NO
487
7.2
DATE
LESSON PLAN
UNIT 5
CHAPTER
PART
Sequential circuits
basic flip-flops, truth tables and excitation tables

Introduction to basic flip-flops, truth tables and excitation tables
KEY CONCEPTS
A Flip flop
B Truth table
C Excitation table
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
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Flip flop notes
Truth table
Excitation table
10
CLASS ROOM QUIZ

A Explain Truth table?
B Explain Excitation table?
C Explain different types of flip flops?
D
E
F
yes
PAGE
NO
PAGE
NO
489
7.4
DATE
LESSON PLAN
UNIT 5
CHAPTER
PART
Sequential circuits
Conversion of flip-flop to flip-flop

Introduction to flip-flop
KEY CONCEPTS
A Conversion of flip-flop to flip-flop
B
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
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9
Conversion of flip-flop to flip-flop
10
CLASS ROOM QUIZ

A Conversion of SR to JK?
B Conversion of JK to SR?
C Conversion of SR to D?
D Conversion of JK to D?
E Conversion of D to JK ?
F
yes
PAGE
NO
PAGE
NO
519
7.2
4
DATE
LESSON PLAN
UNIT 5
CHAPTER
PART
Sequential circuits
Design of ripple counters, design of synchronous counters

ripple counters introduction
KEY CONCEPTS
A Ripple counter design
B design of synchronous counters
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
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Ripple counter design
design of synchronous counters
10
CLASS ROOM QUIZ

A Ripple counter design procedure?
B design of synchronous counters procedure ?
C
D
E
F
yes
PAGE
NO
PAGE
NO
547
DATE
LESSON PLAN
UNIT 5
CHAPTER
PART
Sequential circuits
Johnson counters, ring counters

Introduction to counters
KEY CONCEPTS
A Johnson counter
B Ring counter
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
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Johnson counter description
Ring counter description

10
CLASS ROOM QUIZ

A What are the Types of counters?
B Johnson counter description ?
C Ring counter description?
D
E
F
yes
PAGE
NO
PAGE
NO
572
8.6
4
DATE
LESSON PLAN
UNIT 5
CHAPTER
PART
Sequential circuits
Design of registers, Buffer register, control buffer register

Introduction to register
KEY CONCEPTS
A Register
B Buffer register
C Control buffer register
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
Register design
Buffer register design

Control buffer register design
10
CLASS ROOM QUIZ

A Register design procedure ?
B Buffer register design procedure?
C Control buffer register design procedure?
D Types of registers?
E
F
yes
PAGE
NO
PAGE
NO
526
DATE
LESSON PLAN
UNIT 5
CHAPTER
PART
Sequential circuits
shift register, bidirectional shift register, universal shift register

Introduction to register
KEY CONCEPTS
A universal shift register
B shift register
C Bidirectional shift register
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
universal shift register
shift register
Bidirectional shift register

10
CLASS ROOM QUIZ

A Explain universal shift register?
B Explain shift register?
C Explain Bidirectional shift register?
D
E
F
yes
PAGE
NO
PAGE
NO
532
DATE
LESSON PLAN
UNIT 6
CHAPTER
PART
Sequential circuits
Finite state machine

State machine introduction
State table introduction
KEY CONCEPTS
A State machine
B State table
C Finite state machine
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
State machine
State table
Finite state machine
10
CLASS ROOM QUIZ

A Explain State machine?
B Explain State table ?
C Explain Finite state machine?
D
E
F
yes
PAGE
NO
PAGE
NO
661
9.5
DATE
LESSON PLAN
UNIT 6
CHAPTER
PART
Sequential circuits
analysis of clocked sequential circuits

clocked sequential circuits introduction
KEY CONCEPTS
A Clocked circuits
B Sequential circuits
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
Clocked circuits
Sequential circuits
10
CLASS ROOM QUIZ

A Show a Clocked circuits diagram?
B Show a Sequential circuits diagram?
C
D
E
F
yes
PAGE
NO
PAGE
NO
661
DATE
LESSON PLAN
UNIT 6
CHAPTER
PART
Sequential circuits
state diagrams and state tables

state diagrams and state tables introduction
KEY CONCEPTS
A State table
B State diagram
C State reduction
D State assignment
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
9
State diagram
10
CLASS ROOM QUIZ

A Explain State table?
B Draw a State diagram?
C State reduction procedure ?
D State assignment need?
E
F
yes
PAGE
NO
PAGE
NO
585
DATE
LESSON PLAN
UNIT 6
CHAPTER
PART
Sequential circuits
Reduction of state tables and state assignment.

state tables and state assignment introduction
KEY CONCEPTS
A State reduction
B State assignment
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
9
State assignment
10
CLASS ROOM QUIZ

A State reduction techniques?
B State assignment needs?
C
D
E
F
yes
PAGE
NO
PAGE
NO
588
DATE
LESSON PLAN
UNIT 6
Sequential circuits
CHAPTER
Design procedures
PART

Design procedures needs
KEY CONCEPTS
A Design procedures
B
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.Nptel.ac.in
www.slideshare.net
9
Design procedures
10
CLASS ROOM QUIZ

A Design procedures?
B
C
D
E
F
yes
PAGE
NO
PAGE
NO
DATE
LESSON PLAN
UNIT 6
CHAPTER
PART
Sequential circuits
Realization of circuits using various flip-flops

flip-flops introduction
KEY CONCEPTS
A Realization of circuits
B various flip-flops
C
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
www.slideshare.net
www.Nptel.ac.in
9
Realization of circuits using various flip-flops
10
CLASS ROOM QUIZ

A Realization of circuits?
B various flip-flops?
C
D
E
F
yes
PAGE
NO
PAGE
NO
538
DATE
LESSON PLAN
UNIT 6
CHAPTER
PART
Sequential circuits
Meelay to Moore conversion and vice-versa

Introduction to Meelay and Moore models
KEY CONCEPTS
A Meelay model
B Moore model
C conversion
D
E
F
CONTENT
PREPARED
yes
VISUALAID
yes
PREPARED
PPT PREPARED
BOOK LEADS
JOURNAL LEADS
INTERNET LEADS
yes
PAGE
NO
PAGE
NO
www.slideshare.net
http://www.youtube.com/watch?v=O3If0Nr9to0
http://faculty.kfupm.edu.sa/coe/aimane/coe202/Mealy_Moore.pdf
Meelay model
Moore model
conversion
10
CLASS ROOM QUIZ

A Explain Meelay model?
B Explain Moore model?
C Explain conversion of above models?
D
E
F
663
9.1

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Review of Number systems

Representation of numbers of different radix, conversion

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

Switching Theory & Logic Design

CLASS ROOM QUIZ

Review of Number systems

radix, r-1s complement and rs complement of unsigned numbers subtraction,

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

Switching Theory & Logic Design

CLASS ROOM QUIZ

Review of Number systems

4-bit codes: BCD, EXCESS 3, alphanumeric codes,9s complement, 2421, 8421

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

Switching Theory & Logic Design

CLASS ROOM QUIZ

Review of Number systems

Logic operation: Basic logic operations NOT,OR,AND,Boolean theorems,

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

Switching Theory & Logic Design

AND,NAND OR, NOR

CLASS ROOM QUIZ

Review of Number systems

standard SOP and POS, Gray code

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

CLASS ROOM QUIZ

Review of Number systems

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

Introduction, Need And Benefits Of parity checking,

Switching Theory & Logic Design

CLASS ROOM QUIZ

Review of Number systems

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

NAND-NAND realization material gathering

NOR_NOR realization notes

CLASS ROOM QUIZ

Minimisation of switching functions

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

Introduction to Boolean theorems,principle of complementation,duality

CLASS ROOM QUIZ

Minimisation of switching functions

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

CLASS ROOM QUIZ

Minimization of switching functions

Minimization using Boolean theorem

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

CLASS ROOM QUIZ

Minimisation of switching functions

Minimisation of switching functions

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

Switching Theory & Logic Design

What is Minterm and Maxterm

CLASS ROOM QUIZ

Minimisation of switching functions

Minimization of switching functions using k-map 6 variables

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

Switching Theory & Logic Design

Six variable k map

CLASS ROOM QUIZ

Minimisation of switching functions

INTRODUCTION, NEED AND BENEFITS OF THIS SESSION

CLASS ROOM QUIZ

Minimisation of switching functions