Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
B.TECH. - SEMESTER V
VISION
TO EVOLVE INTO A PREMIER TECHNOLOGICAL AND RESEARCH INSTITUTION,
MOULDING EMINENT PROFESSIONALS WITH CREATIVE MINDS, INNOVATIVE
IDEAS AND SOUND PRACTICAL SKILL, AND TO SHAPE A FUTURE WHERE
TECHNOLOGY WORKS FOR THE ENRICHMENT OF MANKIND
MISSION
VISION
TO EVOLVE INTO A CENTRE OF EXCELLENCE IN ELECTRONICS AND
COMMUNICATION
ENGINEERING,
MOULDING
PROFESSIONALS
HAVING
MISSION
B.TECH PROGRAMME
INDEX
1.
2.
3.
4.
Semester Plan
Assignment Schedule
Scheme
Engineering mathematics IV
4.1. Course Information Sheet
4.2. Course Plan
5. Control Systems
5.1. Course Information Sheet
5.2. Course Plan
6. Digital System Design
6.1. Course Information Sheet
6.2. Course Plan
7. Electric Drives & Control
7.1. Course Information Sheet
7.2. Course Plan
8. Applied Electromagnetic Theory
8.1. Course Information Sheet
8.2. Course Plan
9. Microprocessors and Applications
9.1. Course Information Sheet
9.2. Course Plan
10. Digital Electronics lab
10.1. Course Information Sheet
10.2. Course Plan
11. Electric Drives & Control lab
11.1 . Course Information Sheet
11.2 . Course Plan
6
7
8
9
10
14
16
17
21
24
25
29
31
32
35
37
38
42
44
45
49
51
52
55
57
58
61
Semester V,
V Course Hand-Out
1. SEMESTER PLAN
2. ASSIGNMENT SCHEDULE
Week
Assignment 1
Assignment 2
EC010 501A
EC010 502
EC010 503
EC010 504(EE)
EC010 505
EC010 506
EC010 501A
EC010 502
EC010 503
EC010 504(EE)
EC010 505
EC010 506
10
EC010 501A
EC010 502
11
EC010 503
EC010 504(EE)
12
EC010 505
EC010 506
13
EC010 501A
EC010 502
14
EC010 503
EC010 504(EE)
15
EC010 505
EC010 506
Hours/Week
Code
P/D
Inter
-nal
EndSem
End-Sem
duration
- hours
50
100
50
100
Subject
EN010
501A
Engineering Mathematics
IV
EC010 502
Control Systems
Marks
Credits
4
4
EC010 503
50
100
EC010
504(EE)
50
100
EC010 505
Applied Electromagnetic
Theory
50
100
EC010 506
Microprocessors and
Applications
50
100
EC010 507
50
100
EC010
508(EE)
50
100
16
Total
28
4.
EC010 501A
ENGINEERING MATHEMATICS IV
DEGREE: BTECH
SEMESTER: S5
CREDITS: 4
HOURS
12
MODULE 2
Complex integration
12
IV
MODULE 4
16
10
MODULE 5
DESCRIPTION
SEM
1
3
COURSE OBJECTIVES:
1 Use basic numerical techniques to solve problems
2 provide scientific techniques to decision making problems
COURSE OUTCOMES:
SNO
1
2
3
DESCRIPTION
PO
MAPPING
a, b, e, h
a, b, e, h
a, b, e, h
11
4
5.
to day life
Students will be able to solve real life problems with the help of
numerical methods
Students will get an idea for solving engineering problems using
complex integration and numerical methods.
a, b, e, h
a,j,e,k
PROPOSED
ACTIONS
1
Nil
PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY
VISIT/GUEST LECTURER/NPTEL ETC
TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:
1
Module I
Use of functions of complex variable in different branches of engineering
2
Module II
Complex integration in various field of engineering
3
Module III
Numerical solution of algebraic and transcendental equations
4
Module IV
Numerical solution of Ordinary differential equations in engineering
5
Module V
Solution of Linear Programming problems in various fields
WEB SOURCE REFERENCES:
1
http://mathworld.wolfram.com/ComplexAnalysis.html
2
http://www.math.ust.hk/~maykwok/courses/ma304/06_07/Complex_4.pdf
3
http://en.wikipedia.org/wiki/Methods_of_contour_integration
4
http://en.wikipedia.org/wiki/Numerical_methods_for_ordinary_differential_equations
5
http://www.math.ufl.edu/~kees/NumericalODE.pdf
6
http://my.safaribooksonline.com/book/engineering/9789332515703/3dot-solution-ofalgebraic-and-transcendental-equations/ch3_1_xhtml
DELIVERY/INSTRUCTIONAL METHODOLOGIES:
CHALK & TALK STUD.
WEB
ASSIGNMENT
RESOURCES
LCD/SMART
BOARDS
STUD.
SEMINARS
ADD-ON
COURSES
12
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS STUD.
TESTS/MODEL
SEMINARS
EXAMS
UNIV.
EXAMINATION
STUD. LAB
PRACTICES
STUD. VIVA
CERTIFICATIONS
ADD-ON
COURSES
OTHERS
MINI/MAJOR
PROJECTS
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES
(BY FEEDBACK, ONCE)
STUDENT FEEDBACK ON
FACULTY (TWICE)
ASSESSMENT OF MINI/MAJOR
PROJECTS BY EXT. EXPERTS
OTHERS
Prepared by
MR. BINU R.
(Faculty)
Approved by
DR. VINODKUMAR P. B.
(HOD)
13
Module
Contents
Complex numbers
Region, limits
Analytic functions
C-R equations
Tutorial
Conformal mapping
Bilinear transfomation
Cross ratio
10
Problems
11
Tutorial
12
Problems
13
Tutorial
14
Revision
15
16
17
Tutorial
18
Cauchy's formula
19
Tutorial
20
Laurent's series
21
Residue theorem
14
22
23
Revision
24
Harmonic functions
25
Graphical solution
26
Graphical solution
27
Inroduction L P P
28
Simpex method
29
Simplex method
30
Big M method
31
Duality in L P P
32
33
Modi method
34
More problems
35
36
37
38
39
40
41
42
15
5.
EC010 502
CONTROL SYSTEMS
16
DEGREE: BTECH
SEMESTER: FIVE
CREDITS: 4
SYLLABUS:
UNIT
DETAILS
HOURS
Introduction to Control Systems Basic building blocks of a Control
System Open-Loop and Closed-Loop Control Systems Feedback and
effects of feedback Types of feedback Control Systems LTI Systems.
Impulse Response and Transfer Functions of LTI Systems Properties of
Transfer Functions SISO and MIMO Systems Mathematical modeling
I
14
of electrical and mechanical systems (simple systems only) Analogy
between mechanical and electrical systems. Block Diagrams Reduction
of Block Diagrams Signal Flow Graph Masons Gain Formula
Conversion of Block Diagrams to Signal Flow Graphs.
II
14
III
10
17
IV
12
10
TOTAL HOURS
60
TEXT/REFERENCE BOOKS:
BOOK TITLE/AUTHORS/PUBLICATION
T/R
1
2
3
4
5
. B. C. Kuo, Automatic Control Systems, 7th ed., PHI Learning Pvt. Ltd., New Delhi,
2009.
K. Ogata, Modern Control Engineering, 5th ed., PHI Learning Pvt. Ltd., New Delhi,
2010.
R. C. Dorf, R. H. Bishop, Modern Control Systems, 11th ed., Pearson Education, New
Delhi,
. N. S. Nise, Control Systems Engineering, 5th ed., Wiley India Pvt. Ltd., New Delhi,
2009.
M. Gopal, Control Systems: Principles and Design, 3rd ed., Tata McGraw Hill
Education Pvt.
COURSE PRE-REQUISITES:
C.CODE
COURSE NAME
EN010
NETWORK THEORY
302
EN010
ENGINEERING
301
MATHEMATICS - II
Department of EC, RSET
DESCRIPTION
Circuit analysis
SEM
3
Laplace transforms
18
EN010
405
COURSE OBJECTIVES:
1 To develop the basic understanding of control system theory and its role in engineering
design.
2
To understand the utility of Laplace transforms and transfer functions for modeling
complex interconnected systems.
To understand the concept of poles and zeros of a transfer function and how they affect
the physical behavior of a system.
To understand the concept of Time Domain and Frequency Domain analysis and to
determine the physical behavior of systems using these analysis.
COURSE OUTCOMES:
SNO
DESCRIPTION
PO
MAPPING
a,b,c,e,i
Will be able to check the stability of any physical systems using time
domain or frequency domain methods.
a,b,c,e,i
a,b,c,e,i
a,b,c,e,i
a,b,c,d
19
STUD.
ASSIGNMENT
WEB
RESOURCES
LCD/SMART
BOARDS
STUD.
SEMINARS
ADD-ON
COURSES
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS STUD.
TESTS/MODEL
SEMINARS
EXAMS
UNIV.
EXAMINATION
STUD. LAB
PRACTICES
STUD. VIVA
CERTIFICATIONS
ADD-ON
COURSES
OTHERS
MINI/MAJOR
PROJECTS
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES STUDENT FEEDBACK ON
(BY FEEDBACK, ONCE)
FACULTY (TWICE)
ASSESSMENT OF MINI/MAJOR
PROJECTS BY EXT. EXPERTS
Prepared by
MS. HARSHA A.
(Faculty)
OTHERS
Approved by
MR. JAISON JACOB
(HOD)
20
Contents
10
11
12
13
14
15
16
17
18
19
20
21
21
22
23
24
25
26
27
Effects of adding poles and zeros to the Transfer Function Dominant Poles
and Insignificant Poles of Transfer Functions.
28
29
30
31
32
33
34
35
36
37
38
39
40
41
Relationship between the Root Loci and the Nyquist Plot Relative Stability
22
42
43
State-Transition Matrix
44
State-Transition Matrix
45
46
23
6.
EC010 503
DIGITAL SYSTEM DESIGN
24
DEGREE: BTECH
SEMESTER: 5
CREDITS: 4
COURSE TYPE: CORE
CONTACT HOURS: 3+1 (TUTORIAL)
HOURS/WEEK.
LAB COURSE NAME: NIL
SYLLABUS:
UNIT DETAILS
HOURS
I
12
Introduction to Verilog HDL: Design units, Data objects, Signal drivers, hours
Delays , Data types,
language elements, operators, user defined primitives, modeling-data
flow, behavioral,
structural, Verilog implementation of simple combinational circuits:
adder, code converter,
decoder, encoder, multiplexer, demultiplexer.
II
12
Combinational circuit implementation using QuineMcCluskey algorithm, hours
Decoders,
Multiplexers, ROM and PLA, Implementation of multi output gate
implementations
III
Finite State Machines: State diagram, State table, State assignments, State 12
graphs,
hours
Capabilities and limitations of FSM, Meta stability, Clock skew, Mealy
and Moore machines,
Modelling of clocked synchronous circuits as mealy and Moore machines:
serial binary adder,
Sequence detector, design examples
IV
12
Digital System Design Hierarchy: State assignments, Reduction of state hours
tables, Equivalent
states, Determination of state equivalence using implication table,
Algorithmic State Machine,
ASM charts, Design example
12
Verilog HDL implementation of binary multiplier, divider, barrel shifter, hours
FSM, Linear
25
Samir Palitkar, Verilog HDL A Guide to Digital Design and Synthesis, Pearson, 2nd
edition, 2003.
3
4
5
S. Brown & Z. Vranestic, Fundamentals of Digital Logic with Verilog HDL, Tata
McGraw Hill, 2002
Donald D Givone, Digital Principles and Design, Tata McGraw Hill, 2003.
Peter J Ashenden ,Digital Design, an embedded system approach using Verilog,
Elsevier,
2008
T R Padmanabhan, Design through Verilog HDL, IEEE press, Wiley Inter science, 2002.
Wakerly J F, Digital Design Principles and Practices, Prentice hall of India, 2008.
Nazeih M Botros, HDL programming VHDL and Verilog, Dreamtech press, 2009
10
David J. Comer, Digital Logic and State Machine Design, Oxford university press, 3rd
edition, 1995.
COURSE PRE-REQUISITES:
C.CODE COURSE NAME
EC010 404: DIGITAL
1.
ELECTRONICS
.
2.
EC010 306 COMPUTER
PROGRAMMING
DESCRIPTION
have knowledge of basic digital
system design
Basic understanding of high level
programming language like C, C++
SEM
4
3
COURSE OBJECTIVES:
1 To use Verilog to model digital hardware circuits and to learn various modeling methods
26
2
3
in Verilog
To understand various advanced modeling techniques in implementing Finite State
Machines and other sequential/ combinational digital logics Verilog
To develop skills in modeling basic digital circuits in hardware description languages
COURSE OUTCOMES:
SNO
1
2
4
5
DESCRIPTION
The CAD tools Xilinx ISE for verilog simulation are introduced.
PO
MAPPING
a to j
J,k,l
f ,J,k,l
e,j,l
a,b,c,J,k,l
PROPOSED
ACTIONS
Lecture+Practial
2
The CAD tools Modelsim for verilog simulation are introduced
Lecture+Practical
3
Advanced design problems are given in tutorial periods
Tutorial
4
Assignments are given based on application questions
Assignments
5
Indirect Problems are being worked out in classes
Lecture
PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY
VISIT/GUEST LECTURER/NPTEL ETC
TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:
1
The CAD tools Xilinx ISE for verilog simulation are introduced.
2
The CAD tools Modelsim for verilog simulation are introduced
3
Advanced design problems are given in tutorial periods
4
Application questions as assignments
WEB SOURCE REFERENCES:
1
www.testbench.com
Department of EC, RSET
27
2
3
4
5
6
7
8
9
10
www.asicworld.com
http://www.nptel.iitm.ac.in/video.php?subjectId=117105080
http://www.youtube.com/watch?v=CL3ups78jrs
http://www.indianshout.com/digital-electronics-notes-material/3023
http://freevideolectures.com/Course/2319/Digital-Systems-Design#
http://www.doulos.com/knowhow/verilog_designers_guide
http://vol.verilog.com/VOL/main.htm
https://sites.google.com/site/zakirsirece/verilog-hdl-notes
http://www.fpga.com.cn/hdl/training/verilog%20reference%20guide.pdf
DELIVERY/INSTRUCTIONAL METHODOLOGIES:
CHALK &
STUD.
WEB
TALK
ASSIGNMENT
RESOURCES
STUD.
SEMINARS
LCD/SMART
BOARDS
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS
STUD.
TESTS/MODEL
SEMINARS
EXAMS
UNIV.
EXAMINATIO
N
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES STUDENT FEEDBACK ON
(BY FEEDBACK, ONCE)
FACULTY
Prepared by
MR. ROOHA RAZMID AHAMED
(Faculty)
Approved by
MR. JAISON JACOB
(HOD)
28
Contents
Decoders
Multiplexers
PROM
FSM introduction
10
11
12
State graphs
13
14
15
16
17
18
Sequence recognizer
19
20
21
State assignments
29
22
23
Equivalent states
24
25
Intro to ASM
26
ASM charts
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
30
7.
EC010 504 (EE)
ELECTRIC DRIVES AND CONTROL
31
DEGREE: B.TECH
SEMESTER:
CREDITS: 4
SYLLABUS:
UNIT DETAILS
I
D.C.Machines DC Generator- Types, Open Circuit Characteristics and
Load characteristics of d.c. shunt generator Losses and efficiency. D C
motor starter torque equation speed torque characteristics of shunt,
series and compound motors Losses efficiency Brake test
Swinburnes test.
II
A.C Machines Transformers: transformer on no-load and load operation
phasor diagram equivalent circuit regulation losses and efficiency
o.c. and s.c. tests.Three phase induction motors: types Principle of
operation-slip- torque equation torque-slip characteristicsstarters
single phase induction motors types working.Alternator typesprinciple- emf equation regulation by emf and mmf
methods.Synchronous motor Principle of operation.
III
Power semiconductor Devices SCR-Constructional featuresCharacteristics- rating and specification- Triggering circuits-protection
and cooling. Construction and characteristics of power diodes, TRIAC,
BJT, MOSFET and IGBT.
IV
Phase controlled Rectifiers - Operation and analysis of Single phase and
multi-phasecontrolled rectifiers with R, RL and back EMF load- free
wheeling effect. Chopperclassification-Step down- step up- two and four
quadrant operations.Inverters- Single phase and three phase bridge
inverters- VSI and CSI- PWM Inverters. SMPS, UPS principle of
operation and block schematic only.
V
DC drives: Methods of Speed control of dc motors single phase and three
phase fully controlled bridge rectifier drives. Chopper fed drives: Single,
Two and four quadrant chopper drives. Induction Motor drives: Stator
voltage, stator frequency and V/f Control, Static rotor resistance control.
Synchronous motor drives: Open loop and self controlled modes.
TOTAL HOURS
HOURS
10
12
10
14
14
60
32
TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
T
J B Gupta, Electrical Machines , S K Kataria and Sons.
T
Vedam Subramaniam ,Power Semiconductor Drives , TMH
T
Rashid Muhammad, Power Electronics: Pearson Edn.
T
Electrical & Electronic Technology: Hughes, Pearson Education.
T
Harish C Ray Power Electronics:, Galgotia Pub.
T
P S Bimbhra ,Power Electronics: Khanna Publishers.
T
M.D Singh and K.B Khanchandani, Power Electronics , TMH, 1998
T
Wildi - Electrical Machines, Drives and Power systems 6/ePearson Education
COURSE PRE-REQUISITES:
C.CODE
COURSE NAME
EN010 108
Basic Electrical
Engineering
EC010 303
NETWORK THEORY
DESCRIPTION
Basic functioning of electrical
machines
R,RL,RLC circuit analysis
SEM
I
III
COURSE OBJECTIVES:
1 To understand the characteristics and operational features of important power electronic
devices
2 Understanding the basic working principles of DC and AC machines
COURSE OUTCOMES:
SNO
DESCRIPTION
PO
MAPPING
a, b, c, e
a, b, c, e
a, b, c, e
a, b, c, e
a, b, c, e
PROPOSED
ACTIONS
Additional
class
33
Additional
class
STUD.
ASSIGNMENT
WEB
RESOURCES
LCD/SMART
BOARDS
STUD.
SEMINARS
ADD-ON
COURSES
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS
STUD.
SEMINARS
TESTS/MODEL
EXAMS
UNIV.
EXAMINATION
STUD. LAB
PRACTICES
STUD. VIVA
MINI/MAJOR
PROJECTS
CERTIFICATIONS
ADD-ON
COURSES
OTHERS
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES STUDENT FEEDBACK ON
(BY FEEDBACK, ONCE)
FACULTY (TWICE)
ASSESSMENT OF MINI/MAJOR
PROJECTS BY EXT. EXPERTS
Prepared by
MR. THOMAS K. P.
(Faculty)
OTHERS
Approved by
MS. JAYASRI R. NAIR
(HOD)
34
Contents
Introduction
10
11
12
13
14
15
16
17
18
19
20
SCR Characteristics
21
35
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Chopper fed drives -Single Two and Four quadrant chopper drives
37
38
39
36
8.
EC010 505
APPLIED ELECTRO MAGNETIC THEORY
37
DEGREE: B.TECH
SEMESTER: 5
CREDITS: 4
SYLLABUS:
UNIT
DETAILS
HOURS
1.
Electrostatics: Review of vector analysis: Cartesian, Cylindrical and
14
Spherical co-ordinates systems- Coordinate transformations. Vector
fields: Divergence and curl- Divergence theorem-Stokes theorem.
Static electric field: Electrical scalar potential-different types of
potential distribution- Potential gradient-Relation between E, V. Energy
stored in Electric field Equation of continuity, Electrostatic boundary
conditions Derivation of capacitance of coaxial cable Magnetostatics
Steady magnetic field, Magnetic field intensity, problem Amperes
Law, Faradays Law, Vector magnetic potential , Relation between E, V
and A. Magnetic dipole, Magnetic boundary conditions Energy stored in
magnetic fields Helmholtzs theorems, Poisson and Laplace equations
Inductance of coaxial cable2
Maxwells equations and travelling waves: Conduction current and
12
displacement current, Maxwells equations- Plane waves- Poynting
theorem and Poynting vector- Power flow in a coaxial cable
Instantaneous Average and Complex Poynting Vector. Plane
electromagnetic waves- Solution for free space conditionUniform plane wave:-wave equation for conducting medium- wave
propagation in conductors and dielectric, depth of penetration, reflection
and refraction of plane waves by conductor and dielectric. Wave
polarization - Polarization of electromagnetic wave and derivation of
polarization angle.
3
14
38
4.
10
10
60
TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
1.
1. W H.Hayt & J A Buck : Engineering Electromagnetics Tata McGraw-Hill, 7th
Edition 2007.
2.
3.
4.
5.
COURSE PRE-REQUISITES:
C.CODE
COURSE NAME
EN010
Engineering Mathematics I,II
101,
EN010 301
DESCRIPTION
SEM
Review of vector analysis,
1,2,3
coordinate system, coordinate
transformation, Gradient, divergence,
curl, divergence theorem and stokes
theorem
39
EN010 102
Engineering Physics
1,2
COURSE OBJECTIVES:
1 To analyze fields potentials due to static changes
2
3
4
5
COURSE OUTCOMES:
SNO
1
2
3
4
5
DESCRIPTION
PO
MAPPING
a,e
a,b,c,e,j,k,l
a,b,e,j,k,l
a,b,e,j,k,l
a,b,c,e,j,k,l
PROPOSED
ACTIONS
Seminar
Reading
assignment
40
http://www.transmission-line.net/search/label/Electromagnetics
DELIVERY/INSTRUCTIONAL METHODOLOGIES:
CHALK &
TALK
STUD.
ASSIGNMENT
WEB
RESOURCES
ADD-ON
COURSES
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS
ADD-ON
COURSES
TESTS/MODEL
EXAMS
STUD. LAB
PRACTICES
STUD. VIVA
MINI/MAJOR
PROJECTS
UNIV.
EXAMINATION
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES
(BY FEEDBACK, ONCE)
STUDENT FEEDBACK ON
FACULTY (TWICE)
ASSESSMENT OF MINI/MAJOR
PROJECTS BY EXT. EXPERTS
Prepared by
MR. WALTER JOSEPH
(Faculty)
Approved by
MR. JAISON JACOB
(HOD)
41
Contents
Potential gradient
10
11
12
13
Magnetic dipole
14
15
16
17
18
19
20
Plane waves
21
42
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
43
9.
EC010 506
MICROPROCESSORS AND APPLICATIONS
44
DEGREE: BTECH
SEMESTER: FIVE
CREDITS: 4
SYLLABUS:
UNIT
DETAILS
HOURS
Introduction to microprocessors and microcomputers: Function of
microprocessors- organisation of a microprocessor based system
microprocessor architecture and its operations memory I/O devices pin configuration and functions of 8085 tristate bus concept - control
I
12
signals de-multiplexing AD0-AD7 flags - memory interfacing - I/O
addressing - I/O mapped I/O - memory mapped I/O schemes - instruction
execution - fetch/execute cycle - instruction timings and operation status.
II
Intel 8085 instruction set - instruction and data format simple programs programs in looping, counting and indexing 16 bit arithmetic operations
- stack and subroutines - basic concepts in serial I/O 8085 serial I/O
lines
12
III
12
IV
12
12
45
TOTAL HOURS
60
TEXT/REFERENCE BOOKS:
BOOK TITLE/AUTHORS/PUBLICATION
T/R
1
2
3
6
7
John Uffenbeck, Microcomputer and Microprocessor, The 8080, 8085 And Z80
Programming, Interfacing and Trouble Shooting, PHI, 3rd edition, 2006.
P K Ghosh, P R Sridhar, 0000 to 8085 Introduction to Microprocessors for Engineers
and Scientists, PHI, 2nd edition, 2006.
COURSE PRE-REQUISITES:
C.CODE
COURSE NAME
EN010
DIGITAL ELECTRONICS
404
DESCRIPTION
Fundamentals of all digital operations
SEM
4
COURSE OBJECTIVES:
1 To study the architecture of microprocessors 8085 and 8086.
2 To understand the instruction set of 8085.
3
4
5
COURSE OUTCOMES:
SNO
1
DESCRIPTION
PO
MAPPING
a,b,c,e,i,k
46
a,b,c,e,i,k
a,b,c,e,i,k
a,b,c,e,i,k
a,b,c,e,i,k,l
http://www.intel.in
DELIVERY/INSTRUCTIONAL METHODOLOGIES:
CHALK & TALK
STUD.
ASSIGNMENT
WEB
RESOURCES
LCD/SMART
BOARDS
STUD.
SEMINARS
ADD-ON
COURSES
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS STUD.
TESTS/MODEL
SEMINARS
EXAMS
UNIV.
EXAMINATION
STUD. LAB
PRACTICES
STUD. VIVA
CERTIFICATIONS
ADD-ON
COURSES
OTHERS
MINI/MAJOR
PROJECTS
47
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES STUDENT FEEDBACK ON
(BY FEEDBACK, ONCE)
FACULTY (TWICE)
ASSESSMENT OF MINI/MAJOR
PROJECTS BY EXT. EXPERTS
Prepared by
MS. TRESSA MICHAEL
(Faculty)
OTHERS
Approved by
MR. JAISON JACOB
(HOD)
48
Contents
Architecture of 8085
Pins of 8085
Pins contd
I/O Addressing, I/O mapped I/O Memory mapped I/O Device Address
Mode of Data transfer Execution Speed Hardware Requirements
10
11
12
13
14
15
16
17
18
49
19
20
21
22
23
24
25
26
27
28
29
30
31
Programming
32
Programming
33
Programming
34
Programming
35
Programming
50
10.
EC010 507
DIGITAL ELECTRONICS LAB
51
DEGREE: B.TECH
SEMESTER: 5
CREDITS: 2
COURSE TYPE: LAB
CONTACT HOURS: 3 HOURS/WEEK.
LAB COURSE NAME:
SYLLABUS:
UNIT DETAILS
I
Study of Logic Gates: Truth Table verification of OR, AND, NOT, XOR,
NAND and NOR Gates
II
Implementation of the given Boolean function using logic gates in both
SOP and POS forms
III
Design and Realization of half, full adder or subtractor using basic gates
and universal gates.
IV
Flip Flops: Truth table verification of JK master slave Flip flop, T and D
FF
V
Asynchronous Counter: Realization of 4 bit up counter and mod N
counters
VI
Synchronous Counter: Realization of 4 bit up/down counter and mod N
counters
VII
Shift Register: Study of shift right, SIPO, SISO, PIPO, PISO and shift left
operations
VIII
Ring Counter and Johnson Counter
IX
Design examples using Multiplexer and Demultiplexer
X
LED Display: Use of BCD to 7 segment decoder/driver chip to drive LED
display
XI
Static and Dynamic Characteristics of NAND gate(both TTL and MOS)
TOTAL HOURS
HOURS
3
3
3
3
3
3
3
3
3
3
3
33
TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
1
Donald D Givone, Digital Principles and Design, Tata McGraw Hill, 2003.
2
G K Kharate, Digital Electronics, Oxford university press, 2010
3
Ronald J Tocci, Digital Systems, Pearson Education, 10th edition 2009.
4
Thomas L Floyd, Digital Fundamentals, Pearson Education, 8th edition, 2003.
Department of EC, RSET
52
Donald P Leach, Albert Paul Malvino, Digital Principles and Applications, Tata
McGraw
Hill 6th edition, 2006.
COURSE PRE-REQUISITES:
C.CODE
COURSE NAME
EC010 404 DIGITAL ELECTRONICS
DESCRIPTION
Theory course on Digital Electronics
SEM
IV
COURSE OBJECTIVES:
1 To provide experience on design, testing, and realization of few digital circuits used
2 To understand basic concepts of memories, decoders etc
3 To design all types of counters
4 To design all types of shift registers
COURSE OUTCOMES:
SNO
1
2
3
4
5
DESCRIPTION
PO
MAPPING
a,b,c,e,h,j,k,I,l
a,b,c,e,h,j,k,i
a,b,c,e,h,j,k,i
a,b,c,e,h,j,k,i
a,b,c,e,h,j,k,i
PROPOSED
ACTIONS
1
Code Converters
Assignment
2
Parity Generators
Assignment
3
Self starting Counters
Practical
PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY
VISIT/GUEST LECTURER/NPTEL ETC
TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:
1
PAL
2
PLA
WEB SOURCE REFERENCES:
1
cas.ee.ic.ac.uk/people/nps/teaching/ee1_digital/
2
www.kubik-digital.com/
Department of EC, RSET
53
www.asic-world.com/digital/tutorial.html
DELIVERY/INSTRUCTIONAL METHODOLOGIES:
CHALK & TALK
STUD.
ASSIGNMENT
WEB
RESOURCES
LCD/SMART
BOARDS
STUD.
SEMINARS
ADD-ON
COURSES
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS STUD.
TESTS/MODEL
SEMINARS
EXAMS
UNIV.
EXAMINATION
STUD. LAB
PRACTICES
STUD. VIVA
CERTIFICATIONS
ADD-ON
COURSES
OTHERS
MINI/MAJOR
PROJECTS
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES
(BY FEEDBACK, ONCE)
STUDENT FEEDBACK ON
FACULTY (TWICE)
ASSESSMENT OF MINI/MAJOR
PROJECTS BY EXT. EXPERTS
OTHERS
Prepared by
MR. SREEKUMAR G. & MR. WALTER JOSEPH
(FACULTY)
Approved by
MR. JAISON JACOB
(HOD)
54
Contents
Study of Logic Gates: Truth-table verification of OR, AND, NOT, XOR, NAND
and NOR gates.
Study of Logic Gates: Truth-table verification of OR, AND, NOT, XOR, NAND
and NOR gates.
Implementation of the given Boolean function using logic gates in both SOP and
POS forms.
Implementation of the given Boolean function using logic gates in both SOP and
POS forms.
Design and Realization of half, full adder or subtractor using basic gates and
universal gates
Design and Realization of half, full adder or subtractor using basic gates and
universal gates
10
11
12
13
14
Shift Register: Study of shift right, SIPO, SISO, PIPO, PISO and shift left
operations
15
Shift Register: Study of shift right, SIPO, SISO, PIPO, PISO and shift left
operations
16
17
18
19
55
20
LED Display: Use of BCD to 7 Segment decoder / driver chip to drive LED
display
21
LED Display: Use of BCD to 7 Segment decoder / driver chip to drive LED
display
22
Static and Dynamic Characteristic of NAND gate (both TTL and MOS)
23
Static and Dynamic Characteristic of NAND gate (both TTL and MOS)
56
11.
EC010 508(EE)
ELECTRIC DRIVES AND CONTROLS
57
DEGREE : BTECH
SEMESTER : FIFTH
CREDITS : 2
DETAILS
HOURS
II
TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
R Dr. P S Bimbra, Electrical Machinery, Khanna Publishers
R R K Rajput, A text book of Electrical Machines, Laxmi publishers
R
COURSE PRE-REQUISITES:
C.CODE
COURSE NAME
EC 010
Electric Drives and Control
Department of EC, RSET
DESCRIPTION
The
course
will
help
SEM
the S5
58
504(EE)
EE 010
108
COURSE OBJECTIVES:
1 To familiarize the students with the working and characteristics of various electrical
machines.
2 To provide experience on design and analysis of few power electronic circuits.
COURSE OUTCOMES:
SNO
1
3
4
PO
MAPPING
Students will be able to measure and evaluate performance of DC a, b, c, e
machines and Transformers.
Students will be able to use modeling parameters with standard a, b, c, e
equivalent circuit models to predict correctly the expected
Performance of various general-purpose electrical machines and
transformers.
Students will be able to prepare professional quality graphical a, b, c, e
presentations of laboratory data and computational results, incorporating
accepted data analysis and synthesis methods.
Students will work in teams to conduct experiments, analyze results, and a, b, c, e
develop technically sound reports of outcomes.
Primarily via team-based laboratory activities, students will demonstrate a, b, c, e
the ability to interact effectively on a social and interpersonal level with
fellow students, and will demonstrate the ability to divide up and share
task responsibilities to complete assignments.
DESCRIPTION
DESCRIPTION
PROPOSED
ACTIONS
1
NIL
PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY
VISIT/GUEST LECTURER/NPTEL ETC
59
ASSIGNMENT
RESOURCES
STUD.
SEMINARS
ADD-ON
COURSES
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS
TESTS/MODEL
STUD.
EXAMS
SEMINARS
UNIV.
EXAMINATION
STUD. LAB
PRACTICES
STUD. VIVA
CERTIFICATIONS
ADD-ON
COURSES
OTHERS
MINI/MAJOR
PROJECTS
ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES STUDENT FEEDBACK ON
FACULTY (TWICE)
(BY FEEDBACK, ONCE)
ASSESSMENT OF MINI/MAJOR
PROJECTS BY EXT. EXPERTS
Prepared by
MS. SALITHA K.
(Faculty)
OTHERS
Approved by
MS. JAYASRI R. NAIR
(HOD)
60
Session
Contents
10
11
12
13
14
15
16
17
18
19
20
21
22
61
23
24
62