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CS162
Operating Systems and
Systems Programming
Lecture 1
What is an Operating System?
August 26th, 2015
Prof. John Kubiatowicz
http://cs162.eecs.Berkeley.edu
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1969 1974
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WWW
Internet
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2.8 B
2.0 B 1/26/11
HTTP 0.9
ARPANet
1990
2010
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Scheduling
Concurrency
Address spaces
Protection, Isolation, Security
Networking, distributed systems
Persistent storage, transactions, consistency,
resilience
Interfaces to all devices
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Datacenter
DNS
request
create
result
page
Search
Index
Page
store
Load
balancer
Ad Server
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appln
appln
appln
OS
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Hardware
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Operator
OS Hardware Virtualization
Software
Hardware ISA
Memory
Processor
Networks
Switchboard Operator
storage
Displays
Computer Operators
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Inputs
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software
OS Hardware Virtualization
Software
instruction set
Hardware ISA
Memory
hardware
Processor
OS
Networks
storage
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Inputs
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Displays
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Threads
Address Spaces
Windows
Processes
Files
Sockets
Threads
Address Spaces
Windows
Processes
Files
Sockets
OS Hardware Virtualization
Software
Hardware ISA
OS Hardware Virtualization
Software
Hardware ISA
Memory
Processor
Memory
Processor
OS
Networks
storage
Inputs
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OS
Inputs
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Threads
Address Spaces
Windows
Processes
Files
Sockets
OS Hardware Virtualization
OS
OS Hardware Virtualization
Software
Hardware ISA
Memory
Processor
Protection
Boundary
Memory
Processor
OS
Ctrlr
Protection
Boundary
Ctrlr
Networks
storage
Inputs
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OS Basics: Loading
Threads
Address Spaces
Windows
Processes
Files
Sockets
Hardware ISA
Displays
OS Basics: I/O
Software
Networks
storage
Displays
Protection
Boundary
Networks
storage
Displays
Inputs
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Displays
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Moores Law
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Microprocessors have
become smaller, denser,
and more powerful.
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3X
From Hennessy and Patterson, Computer Architecture: A
Quantitative Approach, 4th edition, Sept. 15, 2006
??%/year
1000
52%/year
100
10
25%/year
1
1978 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 2004 2006
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VAX
: 25%/year 1978 to 1986
RISC + x86: 52%/year 1986 to 2002
RISC + x86: ??%/year 2002 to present
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80 simple cores
Two FP-engines / core
Mesh-like network
100 million transistors
65nm feature size
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Storage Capacity
(source: http://www.digitaltonto.com/2011/our-emergent-digital-future/ )
Kubiatowicz CS162 UCB Fall 2015
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Network Capacity
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(source: http://www.ospmag.com/issue/article/Time-Is-Not-Always-On-Our-Side )
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996,230,757
963,518,598
July 2013
https://www.isc.org/solutions/survey
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(source: http://www.internetworldstats.com/stats.htm)
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Microprocessors in
everything
Vast infrastructure behind
them
2011 shipments:
487M smartphones
414M PC clients
Gigabit Ethernet
Clusters
Massive Cluster
Gigabit EthernetClusters
Databases
Information Collection
Remote Storage
Online Games
Commerce
Massive Cluster
Scalable, Reliable,
Secure Services
Internet
Connectivity
210M notebooks
112M desktops
63M tablets
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MEMS for
Sensor Nets
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Who am I?
Alewife project at MIT
Designed CMMU, Modified SPAR C processor
Helped to write operating system
William Liu
Alewife
Section 110,
F 10-11 @
205 Dwinelle
Head GSI
Section 109,
F 2-3 @
6 Evans
Tessellation
Peer-to-Peer
Quantum Computing
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Section 104,
F 10-11 @
385 LeConte
Section 106,
F 11-12 @
B0051 Hildebrand
Section 105,
F 11-12 @
102 Latimer
Section 107,
F 12-1 @
179 Stanley
Jackson Chang
Alec Mouri
OceanStore
OceanStore project
Store your data for 1000 years
Tapestry and Bamboo
Find your data around globe
SwarmLab Global DataPlane for the
Internet of Things (IoT)
Aleks Kamko
Roger Chen
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Section 101,
T 2-3 @
310 Hearst Mining
Section 102,
T 3-4 @ 3 Evans
Section 103,
T 4-5 @
102 Wurster
Section 108,
F 1-2 @
87 Evans
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Syllabus
OS Concepts: How to Navigate as a Systems Programmer!
Infrastructure
Website: http://cs162.eecs.berkeley.edu
Concurrency
Piazza: https://piazza.com/berkeley/fall2015/cs162
Address Space
File Systems
Copies in Bechtel
Online supplements
Cloud Infrastructure
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Learning by Doing
Getting started
Waitlist ???
Drop Deadline: September 4th
If you are not serious about taking, please drop early
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Grading
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40% midterms/Final
40% projects
15% homework
5% participation
Project grading
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[10
[10
[10
[60
[10
pts]
pts]
pts]
pts]
pts]
Initial design
Design review
Design document
Code (3 checkpoints)
Final design
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Personal Integrity
UCB Academic Honor Code: "As a member of the
UC Berkeley community, I act with honesty,
integrity, and respect for others."
http://asuc.org/honorcode/resources/HC%20Guide%20for%20Syllabi.pdf
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Lecture Goal
Attention
Interactive!!!
Time
1-Minute Review
20-Minute Lecture
5- Minute Administrative Matters
25-Minute Lecture
5-Minute Break (water, stretch)
25-Minute Lecture
Instructor will come to class early & stay after to answer
questions
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Challenge: Complexity
Referee
Applications consisting of
Illusionist
Provide clean, easy to use abstractions of
physical resources
Infinite memory, dedicated machine
Higher level objects: files, users, messages
Masking limitations, virtualization
Glue
Common services
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SandyBridge I/O
Configuration
Proc
Caches
Busses
adapters
Memory
Transistor count:
Cache:
1155 pins
95W design envelope
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Controllers
I/O Devices:
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Disks
Displays
Keyboards
Networks
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VLSI
Coherence,
Bandwidth,
Latency
L2 Cache
L1 Cache
Instruction Set Architecture
Addressing,
Protection,
Exception Handling
Network
Communication
Other Processors
Emerging Technologies
Interleaving
Bus protocols
DRAM
Memory
Hierarchy
RAID/Replication
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Different CPU
Questions:
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Application
Operating System
Hardware
Virtual Machines
Software emulation of an abstract machine
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Process VMs
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Programming simplicity
Fault Isolation
Processes unable to directly impact other processes
Bugs cannot crash whole machine
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Most Likely:
Memory Management
I/O Management
CPU Scheduling
Communications? (Does Email belong in OS?)
Multitasking/multiprogramming?
What about?
File System?
Multimedia Support?
User Interface?
Internet Browser?
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Address Translation
Address Space
A group of memory addresses usable by something
Each program (process) and kernel has potentially
different address spaces.
Address Translation:
Translate from Virtual Addresses (emitted by CPU)
into Physical Addresses (of memory)
Mapping often performed in Hardware by Memory
Management Unit (MMU)
Simple Policy:
CPU
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Virtual
Addresses
MMU
Physical
Addresses
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Code
Data
Heap
Stack
Code
Data
Heap
Stack
Stack 1
Heap 1
Code 1
Stack 2
Prog 1
Virtual
Address
Space 1
Virtual
Address
Page Table
Prog 2
Virtual
Address
Space 2
Data 1
Heap 2
Code 2
index
into
page
table
OS code
Translation Map 1
OS data
10
offset
V page no.
Translation Map 2
Access
Rights
PA
table located
in physical P page no.
memory
offset
10
Physical
Address
OS heap &
Stacks
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User Mode
Applications
Standard Libs
Kernel Mode
Hardware
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In conclusion
Operating systems provide a virtual machine
abstraction to handle diverse hardware
Operating systems coordinate resources and
protect users from each other
Operating systems simplify application
development by providing standard services
Operating systems can provide an array of fault
containment, fault tolerance, and fault recovery
CS162 combines things from many other areas of
computer science
Languages, data structures, hardware, and
algorithms
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