COMSATS Institute of Information Technology,

Wah Campus
Dept. of Electrical Engineering
Course Title:
Allotted time:
Instructor:

Digital Logic Design

180 Minutes
Ali Roman

Course Code: EEE241

Date: June 05, 2014
Program: BEE, BCS,BTN

Terminal Examination (50 Marks)

Student Name

Registration Number

Section

Marks Distribution
Question

Marks

1
2
3
4
5
Total

Instructions
1. This Exam is a closed book exam; Students are not allowed to use only text book, reference books and
written material.
2. Attempt all questions, all questions carry equal marks.
3. Be concise and to the point.
4. Use assumptions if required. Justify your assumptions and answers by a valid reason if required.
5. Avoid cutting and overwriting; Return the question paper at the end of exam.
6. Only the solution within the provided space will be evaluated. Be very careful for space utilization.

Teachers comments

Starting note

Be relaxed and best of Luck for the exam.

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Question 1: Attempt the following? [2.5 marks each]

a) A portion of periodic digital waveform is shown below where measurements are in milliseconds.
Determine period, frequency, duty cycle?

Period:

10

Frequency:

11

Duty cycle:

b) Use rs complement method to find the resultant C where A=1543, B=4123, C = A- B and r = 5?

c) The solution of the quadratic equation X2 -11X+22=0 and X=3 and x= 6, what is the base of a number?

d) Express the boolean function F = A + BC as sum of minterms?

e) Use Demorgans law to convert the given function in product of maxterms form?

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Remarks: Use the figure below for Question 2 and Question 3 where F(QA,QB,QC,QD)=A

Question 2: Consider the given inputs and response of the system in reference figure [2.5 marks each]
a) Produce the logic diagram and Boolean function for the system?

b) Optimize the results in part a for minimum number of logical gates?

c) Implement the results obtained in part b with minimum number of nand gates only?

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d) Implement the results in part b by PAL?

Question 3: Consider the given inputs and response of the system in reference figure [2.5 marks each]
a) Implement the given system by decoders?

b) Implement the given system by multiplexors?

c) Implement the given system by tri state gates?

d) Use the output of the given system as an input to active high enabled positive edge triggered T flip flop.
Produce the output waveform for the flip flop enabled at ground potential?

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Question 4: Consider the following orientation of memory named mem and its contents at given addresses?
[2.5, 2.5, 5 marks]
a) Find the total size in terms of bytes of the given memory?
FFFFFFH
E922FFH
CDFB30H
000000H

mem
9902H

4863H

2900H

1256H
b) Consider the following operations performed in C language where a=1234H
c=a+mem(CDFB30H);
mem(E922FFH)=c;
Determine the memory operation performed by each instruction and contents of memory after
executing these instructions?

c) Draw the bus cycles for the instructions where processor is operated at 100 Mhz clock and memory
access and cycle time doesnt exceed 50 ns?

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Question 5: Design a mealy FSM for a sequence detector use to detect 11011 from serial input stream, the
output goes high whenever the given sequence is detected? [10 marks]

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