SVT-7

Nguyen-viet Tuan

Nguyen-viet Tuan

Slide 1

E3 Framing / Deframing according ITU-T G.703 / G.751

Nguyen-viet Tuan

Slide 2

General

Standard : ITU-T G.703 and G.751

Data rate : 34 368 Kbps
Tolerance : +/- 20 ppm

The E3 transmission scheme according G.751 consists of frames with a length of 1536 bits.
A frame consists of four sets, which are 384 bits long.
22375 frames are transmitted per second.

Nguyen-viet Tuan

Slide 3

E3 Framing 4 sets

Nguyen-viet Tuan

Slide 4

E3 Framing OAM Signals

Frame synchronization is achieved,

if three consecutive correct frame alignment signals are detected.
Frame synchronization is lost (LOF),
if four consecutive defective frame alignment signals are detected.

The Frame Alignment Signal (FAS) is located in the first set of a frame.
The Remote Alarm Indication (RAI) Bit and the National (NA) Bit are following the FAS.

The remainder of the first set is filled with the four E2 data streams.
These data streams are mapped in a bit interleaved manner,
starting with the first E2 data stream.

There is no frame alignment between the multiplex formats E3 and E2.

Nguyen-viet Tuan

Slide 5

E3 Framing OAM Signals (2)

Only positive justification is used.

The first four bits in the sets numbered #2 to #4 are the justification control bits (CJN).
The justification payload or stuffing bits (JJ) are located in the forth set in the bits
numbered #5 to #8.
The justification control bits specifies if the corresponding justification payload bits are
carrying valid data bits or not.

Nguyen-viet Tuan

Slide 6

E3 G.751 Framing

(2)
RAI ( bit = 0)

CE

E3

PE

PSN Cloud

PE

CE-bound
PSN-bound
PSN packet

E3

CE

Fault
(OOF/AIS)
(1)

PSN packet
Data Filling
(4)

L bit set

L bit set
(3)

Nguyen-viet Tuan

Slide 7

E3 ITU-T G.832

Nguyen-viet Tuan

Slide 8

General

Supports both PLCP and direct cell mapping.

Direct Mapping:
The E3 frame structure when direct mapping is employed.
The 531 octet payload consists of 59 columns and 9 rows.
The 53 byte ATM cell wraps around the 59 bytes of the E3 frame.
There is no relationship between the start of a direct mapping frame and the start of the
ATM cell.

Nguyen-viet Tuan

Slide 9

G.832 E3 Framing
59 columns
FA1

9 rows

FA2

EM

TR

MA

NR

GC

<--------------------------------------------------------------------------------->

530 Payload bytes

The 53 byte ATM cell is represented as follows:

Header

48 bytes of Payload

<-------------------------------------------------------------------------------------------->
53 bytes
E3 Frame Structure Direct Mapping

Nguyen-viet Tuan

Slide 10

G.832 E3 Framing (2)

FA1

FA2

EM

TR

Frame Alignment 1.
Frame Alignment 2.
Error Monitor, BIP-8.
Trail Trace.

MA
Maintenance and Adaptation.
NR
Network Operator.
GC
General Purpose Communications Channel.

Nguyen-viet Tuan

Slide 11

PLCP Cell Mapping

The E3 PLCP frame provides the transmission of 9 ATM cells every 125 msec.

The net transmission rate is thus 3.456 Mbytes/sec.

The PLCP frame is octet aligned to the 16 overhead (OH) bits in the ITU-T G.751 E1 frame.

There is no relationship between the start of the PLCP frame and the start of the E3 frame.

A trailer is inserted at the end of each PLCP frame.

Nguyen-viet Tuan

Slide 12

PLCP Cell Mapping (2)

A1

A2

P8

Z3

ATM Cell

A1

A2

P7

Z2

ATM Cell

A1

A2

P6

Z1

ATM Cell

A1

A2

P5

F1

ATM Cell

A1

A2

P4

B1

ATM Cell

A1

A2

P3

G1

ATM Cell

A1

A2

P2

M1

ATM Cell

A1

A2

P1

M2

ATM Cell

A1

A2

P0

C1

ATM Cell

Trailer

<---> <---> <---> <---> <--------------------------> <------------------------>

1

53 bytes

17-21 bytes

E3 Frame Structure PLCP Cell Mapping

Nguyen-viet Tuan

Slide 13

PLCP Cell Mapping (3)

A-bits
Framing pattern octet (byte).
P-bits
Path overhead (POH) identifier.
C1
Pad bit counter.
M-bits
SIP layer 1 management information.
G1
PLCP path status.
B1
Bit-interleaved parity 8 (BIP-8).
F1
PLCP path user channel.
Z-bits
For future use.
Nguyen-viet Tuan

Slide 14

Thank You !

Nguyen-viet Tuan

Slide 15