Group 101

Lab Report: M104

Table of Contents

1. Introduction... 02

2. Experimental Work.. 03
2.1. Equipment and Auxiliaries
2.2. Experimental Procedure

3. Observations.. 04
4. Results. 05
5. Discussion.. 09

6. Conclusion. 10
7. References. 11

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Lab Report: M104

Etching of Semiconductors
1. Introduction
Silicon is the basic material used in the electronic world. The main
purpose of this experiment is to understand silicon substrate by
taking its chemical reactions with different etching solutions and
using their effect for different applications.
Theory:
Experimental manual M104, provided by the supervisor

2. Experimental Work
2.1. Equipment and Auxiliaries
Main equipment, which is used in this process, is:
Silicon Wafer
Teflon Bath
Heating Plate with Stirrer (IKA C-MAG HS7)
Air Drier
Sample Holder
Optical Microscope
Chemical Solutions:
1. Agent For Polishing:
60 ml HF (48 % aq. solution)
100 ml HNO3 (65 % aq. solution)
60 ml CH3COOH (96 % aq. solution)
2. Defect Etching:
K2Cr2O7 = 1.452 g
H2O = 33 ml
HF (48%) = 67 ml
3. Pyramid structuring/ Anisotropic Etching:
70 g KOH pellets
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190 ml deionized water
Mix on warm surface (max. 80 C) until KOH has
completely dissolved
40 ml Isopropanol.

2.2. Experimental Procedure

The first step in the etching of semiconductor was the cutting of P-type single
crystal silicon wafer into pieces for the polishing, defect and anisotropic
etching under optical microscope.
Solutions were already prepared by the supervisor. Four samples were prepared
by cutting silicon wafer and placed in a holder to put into the chemical
polisher. Temperature of polisher (Teflon Bath) measured before polishing by
Digital Thermometer and then samples were placed into Teflon bath and then
covered with lid. As samples were placed in the polishing solution, temperature
of polishing bath starts increasing (as a result of exothermic reaction). As the
lid of the Teflon bath is opened, a gas is evolved (Nitrogen dioxide evolved)
which gives the proof of chemical reaction. Polishing time is noted. Samples
were taken out of the bath and rinsed in the de-ionized water.
Total four samples were polished from which one sample was air dried and
examined under the microscope. Second polished sample is again hold in the
holder and placed in the bath of defect etchant for five minutes at room
temperature. To reveal pyramid structuring sample three and four were hold in
the holder and placed in the KOH bath for 30 minutes at room temperature
20C and 80C respectively. To heat KOH etching solution bath heating plate
is used with magnetic stirrer.
These all samples were then viewed under the microscope and characterized.
Samples were views at 20x, 50x, 100x, 200x and 1000x magnifications.

Temperature before polishing: 18.5C

Temperature after polishing: 33.2C
Total time of polishing: 4 minutes and 4 seconds
Time provide for defect etching = 5 minutes
Time provide for anisotropic etching = 30 minutes

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3. Observations
Nitrogen Dioxide (Yellowish color) gas evolved during the
polishing which assured that the chemical process taking
place. Also we observed that the temperature raise during the
polishing process which was the indication that it should be
exothermic.
Also we didnt provide sufficient time for complete polishing
because if it completely polished we didnt see any image in
the microscope because of complete reflection. Moreover, we
get mirror like surface after polishing.
It was seen that after Anisotropic etching sample which kept
at 20C has still the polished surface while the sample at
80C lost its shine and become dull and rough.

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Lab Report: M104

4. Results
Figure 1 correspond to silicon wafer shown at 50X magnification, has a
contrast of black and white. Figure 2 is the same material seen at 1000X
magnification.

Figure 1: Unpolished Silicon at 50X

Figure 2: Unpolished Silicon at 1000X

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Lab Report: M104

Figure 3 and 4 were the results of electrochemical polishing of silicon in

Polishing solution (composed of HF, HNO3, CH3COOH) wafer at 50X
and 1000X magnification respectively

Figure 3: Polished Silicon at 50X

Figure 4: Polished Silicon at 1000X

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Figure 5 corresponds to defect etching of Silicon Substrate at 1000X in

which defect show appearance. Figure 6 shows that the effects of KOH
etching (Pyramid Structuring) at room temperature at 100X.

Series of
Dislocation

Figure 5: Defect Etched Silicon at 1000X

Figure 6: KOH Etched Silicon at 20C at 100X

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Lab Report: M104

Figure 7 and 8 correspond to KOH etching at 80C at 200X and 1000X. It

shows that many part of structure composed of pyramid.

Figure 7: KOH etched silicon at 80C at 200X

Pyramid
Structure form
from resistance
of (111) plane.

Figure 8: KOH Etched Silicon at 80C at 1000X

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5. Discussion
Figure 1 indicates that it is unpolished and roughed surface.
From Figure 2 it could observe the up and down which
correspond to the non-flat surface and the black surface
conformed to unpolished surface.
Small black spot see in figure 3 is due to the lack of complete
polishing. Polishing is an exothermic process therefore
temperature is rising during the polishing process and
evolution of Nitrogen dioxide (Yellowish Color) gas also
observed after polishing. We can see pronounce effect of
Sample flatness from figure 4 in comparison to the figure 2
(as received sample), it also conform about incomplete
polishing of surface because if our sample is completely
polished we cant see any image in Optical Microscope.
From figure 5 i.e. defect etching, defects in the sample etched
more preferentially than other part therefore we can see the
series of dislocation and point defect (like vacancies) if any
will etch at high rates as compare to other part.
From figure 6 it indicates that no change occur due to the low
kinetics of the etching reaction at room temperature. Figure 7
Corresponds to Anisotropic etching at 80C, at small
magnification large part of the microstructure composed new
pyramid type structure. At high magnification (figure 8) it is
more pronounce and clear about new pyramid shape structure.
This pyramid type structure is result of the resistance of
certain plain which show this pyramid type structure. By
observing both the figure (7 and 8), it is concluded that the
process of etching at 80C is very fast.

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Lab Report: M104

6. Conclusion
Wrought single crystal P-type Silicon is polished by solution
(60ml HF, 60ml CH3COOH and 100ml HNO3) which give
you Flat, Scratch less and completely polished surface which
act like a mirror.
P-type Silicon etching in SECCO solution result the defect in
material etched more preferentially than other part.
Anisotropic Etching of Silicon showed Pyramid Type
structure which is the result of (111) plane, which shows more
resistance in comparison to other plane.

7. References
Experimental manual M104, provided by supervisor.

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