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Transistors

RDN100N20

10V Drive Nch MOS FET

RDN100N20

Structure

Silicon N-channel

MOS FET

Features 1) Low on-resistance. 2) Low input capacitance. 3) Excellent resistance to damage from static electricity.

Application

Switching

External dimensions (Unit : mm) TO-220FN 10.0 4.5 φ3.2 2.8 1.2 1.3 0.8 (1)Gate 2.54
External dimensions (Unit : mm)
TO-220FN
10.0
4.5
φ3.2
2.8
1.2
1.3
0.8
(1)Gate
2.54
2.54
0.75
2.6
(2)Drain
(1)
(2)
(3)
14.0
15.0
12.0
8.05.0

(3)Source

Packaging specifications

 

Package

Bulk

Type

Code

Basic ordering unit (pieces)

500

RDN100N20

RDN100N20

Absolute maximum ratings (Ta=25°C)

Parameter

Symbol

Limits

Unit

Drain-Source Voltage

VDSS

200

V

Gate-Source Voltage

VGSS

±30

V

Drain Current

Continuous

ID

10

A

Pulsed

IDP

1

40

A

Reverse Drain

Continuous

IDR

10

A

Current

Pulsed

IDRP

1

40

A

Source Current

Continuous

IS

10

A

(Body Diode)

Pulsed

ISP

1

40

A

Avalanche Current

IAS

2

10

A

Avalanche Energy

EAS

2

120

mJ

Total Power Dissipation (TC=25°C)

PD

35

W

Channel Temperature

Tch

150

°C

Storage Temperature

Tstg

55 to +150

°C

1 Pw 10µs, Duty cycle 1%

2 L

° C ∗ 1 Pw ≤ 10 µ s, Duty cycle ≤ 1% ∗ 2 L

1.8mH, VDD=50V, RG=25, 1Pulse, Tch=25°C

Thermal resistance

Equivalent circuit

Drain Gate ∗1 ∗1 ESD Protection diode ∗2 Body Diode Source
Drain
Gate
∗1
∗1 ESD Protection diode
∗2 Body Diode
Source

2

A protection diode is included between the gate and

the source terminals to protect the diode against static

electricity when the product is in use. Use the protection

circuit when the fixed voltages are exceeded.

Parameter

Symbol

Limits

Unit

Channel to case

Rth(ch-c)

3.57

°C/W

Channel to ambient

Rth(ch-a)

62.5

°C/W

Transistors

RDN100N20

Electrical characteristics (Ta=25°C)

Parameter

Symbol

 

Min.

 

Typ.

Max.

Unit

 

Conditions

Gate-Source Leakage

 

IGSS

 

 

±10

µA

VGS=±30V, VDS=0V

Drain-Source Breakdown Voltage

V(BR) DSS

200

 

V

ID=250µA, VGS=0V

Zero Gate Voltage Drain Current

 

IDSS

 

 

25

µA

VDS=200V, VGS=0V

Gate Threshold Voltage

 

VGS (th)

 

2.0

 

4.0

V

VDS=10V, ID=1mA

Static Drain-Source On-State Resistance

 

RDS (on)

 

0.27

0.36

ID=5A, VGS=10V

Forward Transfer Admittance

 

Yfs

2.3

 

3.8

S

VDS=10V, ID=5A

Input Capacitance

 

Ciss

 

 

543

pF

VDS=10V

 

Output Capacitance

 

Coss

 

 

193

pF

VGS=0V

Reverse Transfer Capacitance

 

Crss

 

 

64

pF

f=1MHz

Turn-On Delay Time

 

td (on)

 

13

ns

ID=5A, VDD

Turn-On Delay Time   t d (on) ∗ ⎯   13 ⎯ ns I D =

100V

Rise Time

 

tr

 

29

ns

VGS=10V

 

Turn-Off Delay Time

 

td (off)

 

38

ns

RL=20

Fall Time

 

tf

 

26

ns

RG=10

Total Gate Charge

 

Qg

 

15.0

30.0

nC

VDD=100V

 

Gate-Source Charge

 

Qgs

 

5.0

nC

VGS=10V

Gate-Drain Charge

 

Qgd

 

5.2

nC

ID=10A

Pulsed

Body diode characteristics (Source-drain) (Ta=25°C)

 

Parameter

Symbol

Min.

Typ.

Max.

Unit

 

Conditions

 

Forward voltage

VSD

2.0

V

IS= 5A, VGS=0V

 

Reverse recovery time

 

trr

133

ns

IDR= 10A, VGS=0V

 

Reverse recovery charge

Qrr

0.54

µC

di/dt= 100A / µs

Pulsed

Transistors

RDN100N20

Electrical characteristic curves

100 TC=25°C Single Pulse Operation in this area is limited by Ros(on) 10 1 0.1
100
TC=25°C
Single Pulse
Operation in this
area
is limited
by Ros(on)
10
1
0.1
1
10
100
1000
100µs
1mS
Pw=10mS
DC Operation
DRAIN CURRENT : ID (A)

DRAIN-SOURCE VOLTAGE : VDS (V)

Fig.1 Maximun Safe Operating Area

20 Ta=25°C 8V 18 Pulsed 10V 16 9V 14 7V 12 10 8 6V 6
20
Ta=25°C
8V
18
Pulsed
10V
16
9V
14
7V
12
10
8
6V
6
4
5V
2
VGS=4V
0
0 2
4
6
8
10
12
14
16
18
20
DRAIN CURRENT : ID (A)

DRAIN-SOURCE VOLTAGE : VDS (V)

Fig.2 Typical Output Characteristics

6.4 VDS=10V ID=1mA 5.6 4.8 4 3.2 2.4 1.6 0.8 0 −50 −25 0 25
6.4
VDS=10V
ID=1mA
5.6
4.8
4
3.2
2.4
1.6
0.8
0
−50
−25
0
25
50
75
100
125
150
GATE THRESHOLD VOLTAGE : V
(th) (V)GS
1 VGS= 10V Ta= −25°C Pulsed Ta=25°C Ta=75°C Ta=125°C 0.1 0.01 0.1 1 10 100
1
VGS=
10V
Ta= −25°C
Pulsed
Ta=25°C
Ta=75°C
Ta=125°C
0.1
0.01
0.1
1
10
100
STATIC DRAIN-SOURCE
RESISTANCE : R DS (on) (Ω)ON-STATE

CHANNEL TEMPERATURE : Tch (°C)

Fig.4 Gate Threshold Voltage vs. Channel Temperature

0.8 VGS=10V Pulsed 0.7 0.6 0.5 0.4 ID=10A 0.3 4A 0.2 0.1 0 −50 −25
0.8
VGS=10V
Pulsed
0.7
0.6
0.5
0.4
ID=10A
0.3
4A
0.2
0.1
0
−50
−25
0
25
50
75
100
125
150
STATIC DRAIN-SOURCE
RESISTANCE : R DS (on) (Ω)ON-STATE
FORWARD TRANSFER
ADMITTANCE
:⏐Yfs⏐(S)

CHANNEL TEMPERATURE : Tch (°C)

DRAIN CURRENT : ID (A)

Fig.5 Static Drain-Source On-State Resistance vs. Drain Current 20 VDS=10V Pulsed 10 Ta= −25°C 5
Fig.5 Static Drain-Source
On-State Resistance
vs. Drain Current
20
VDS=10V
Pulsed
10
Ta= −25°C
5
Ta=25°C
Ta=75°C
Ta=125°C
2
1
0.5
0.2
0.05
0.1
0.2
0.5
1
2
5
10
20

DRAIN CURRENT : ID (A)

Fig.7 Static Drain-Source On-State Resistance vs. Channel Temperature

Fig.8 Forward Transfer Admittance vs. Drain Current

100 VDS=10V Pulsed 10 Ta=125°C Ta=75°C Ta=25°C Ta= −25°C 1 0.1 0.01 0 2 468
100
VDS=10V
Pulsed
10
Ta=125°C
Ta=75°C
Ta=25°C
Ta= −25°C
1
0.1
0.01
0
2
468
10
DRAIN CURRENT : ID (A)

GATE-SOURCE VOLTAGE : VGS (V)

Fig.3 Typical Transfer

Characteristics

1 Ta=25°C Pulsed 0.75 0.5 ID=10A 0.25 5A 0 0 5 10 15 20 25
1
Ta=25°C
Pulsed
0.75
0.5
ID=10A
0.25
5A
0
0
5
10
15
20
25
30
STATIC DRAIN-SOURCE
RESISTANCE : R DS (on) (Ω)ON-STATE

GATE-SOURCE VOLTAGE : VGS (V)

Fig.6 Static Drain-Source On-State Resistance vs. Gate-Source Voltage

100 VGS=0V Pulsed 10 Ta= −25 °C 1 Ta=25°C Ta=75°C Ta=125°C 0.1 0.01 0 0.1
100
VGS=0V
Pulsed
10
Ta= −25
°C
1
Ta=25°C
Ta=75°C
Ta=125°C
0.1
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
1.1 1.2 1.3 1.4 1.5
REVERSE DRAIN CURRENT : IDR (A)

SOURCE-DRAIN VOLTAGE : VSD (V)

Fig.9 Reverse Drain Current vs.

Source-Drain Voltage

Transistors

RDN100N20

10000 f=1MHz VGS=0V Ta=25°C Pulsed 1000 Ciss 100 C oss Crss 10 1 0.1 1
10000
f=1MHz
VGS=0V
Ta=25°C
Pulsed
1000
Ciss
100
C
oss
Crss
10
1
0.1
1
10
100
1000
CAPACITANCE : C (pF)

DRAIN SOURCE VOLTAGE : VDS (V)

Fig.10 Typical Capacitance vs. Drain-Source Voltage

1000 Ta=25° C VDD=100V VGS=10V tf RQ =10Ω Pulsed td (off) 100 tr td (on)
1000
Ta=25°
C
VDD=100V
VGS=10V
tf
RQ
=10Ω
Pulsed
td (off)
100
tr
td (on)
10
0.1
1
10
100
SWITCHING TIME : t (ns)

DRAIN CURRENT : ID (A)

Fig.13 Switching Characteristcs

200 20 Ta=25°C 180 ID=8.0A Pulsed VDS 160 140 VDD=40V VGS 120 VDD=100V VDD=160V 100
200
20
Ta=25°C
180
ID=8.0A
Pulsed
VDS
160
140
VDD=40V
VGS
120
VDD=100V
VDD=160V
100
10
80
60
VDD=40V
40
VDD=100V
VDD=160V
20
0
0
0
5
10
15
20
DRAIN-SOURCE VOLTAGE : IDS (V)
GATE-SOURCE VOLTAGE : VGS (V)

TOTAL GATE CHARGE : Qg (nC)

Fig.11 Dynamic Input Characteristics

10 D=1 1 0.5 0.2 0.1 0.1 0.05 0.02 Tc=25°C r(t) θth(ch-c)(t)= • =θth(ch-c) 0.01
10
D=1
1
0.5
0.2
0.1
0.1
0.05
0.02
Tc=25°C
r(t)
θth(ch-c)(t)=
• =θth(ch-c)
0.01
0.01
θth(ch-c)=3.57°C / W
Single
pulse
PW
PW
D=
T
T
0.001
10µ
100µ
1m
10m
100m
1
10
NORMALIZED TRANSIENT
THERMAL RESISTANCE : r (t)

PULSE WIDTH : PW (S)

Fig.14 Normalized Transient Thermal Resistance vs. Pulse Width

1000 Ta=25 °C di / dt=100A / µs VGS=0V Pulsed 100 10 0.1 1 10
1000
Ta=25
°C
di
/ dt=100A
/
µs
VGS=0V
Pulsed
100
10
0.1
1
10
100
REVERSE RECOVERY TIME : trr (ns)

REVERSE DRAIN CURRENT : IDR (A)

Fig.12 Reverse Recovery Time vs. Reverse Drain Current

Appendix

Notes

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means without prior permission of ROHM CO.,LTD.

The contents described herein are subject to change without notice. The specifications for theby any means without prior permission of ROHM CO.,LTD. product described in this document are for

product described in this document are for reference only. Upon actual use, therefore, please request

that specifications to be separately delivered.

Application circuit diagrams and circuit constants contained herein are shown as examples of standardrequest that specifications to be separately delivered. use and operation. Please pay careful attention to the

use and operation. Please pay careful attention to the peripheral conditions when designing circuits

and deciding upon circuit constants in the set.

Any data, including, but not limited to application circuit diagrams information, described hereincircuits and deciding upon circuit constants in the set. are intended only as illustrations of such

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