Documenti di Didattica
Documenti di Professioni
Documenti di Cultura
50081652
LEARNER NAME
ASSESSOR NAME
Neil Lusby
DATE ISSUED
HAND IN DATE
Criteria
SUBMITTED ON
Task
Achieved
Feedback
Task 1
HEALTH AND SAFETY LEGISLATION,
REGULATIONS AND
SAFE
WORKING
PRACTICES IN FABRICATION
P7: Build two different digital
electronic
circuits
Task 2
Task 3
Task 4
Internal Verifier
Hannah Holbrook
Signature
Date
1
Barnfield college
Assessor's comments
Qualification
Assessor name
Learner name
Neil Lusby
Assignment title
ASSIGNMENT THREE
Grading criteria
Achieved?
P6: Identify a logic device family, its current levels of integration and the benefits of using it
P7: Build two different digital electronic circuits to be used in different digital systems
P8: Carry out circuit testing of the two constructed circuits to check system performance against
specification
M3: Compare the operation of a combinational logic device and a sequential logic device.
Learner feedback
Assessor feedback
Action plan
Assessor signature
Date
Learner signature
Date
Barnfield College
General Notes
Each task must start on a new page and must be in the correct order.
Each page must be clearly marked with: your name, student number, Task
number, Criteria reference number and page number.
If you have any questions you should seek help from your tutor.
Any material, diagrams, tables etc. copied from books, the internet or other
resources must be acknowledged. A maximum of about 20% of your
assignment could be copied from such sources. The assignment however
must be in your own words.
Plagiarism. You must read and comply with the college policy on
plagiarism. See Course Handbook for details.
You must seek authority from your tutor if for some reason you are unable
to submit your work on or before the due date. Your tutor may agree with
you a revised hand in date.
Barnfield College
Task 3 [P6]
Write a short report or information sheet describing:
a) What is meant by levels of integration for digital integrated circuits (ICs)
b) The abbreviations SSI, MSI, LSI and VLSI in relation to digital ICs
c) An important difference between TTL and CMOS logic devices are the
values of the supply voltage and the voltages which define their logic
levels. Please provide the data relating to the above information in tabular
or graphical form to explain noise immunity and indeterminate voltage
levels
e) One advantage of a TTL device and one advantage of CMOS device
f) What can be found out about the two ICs shown below:
Task 2 [P7]
a)
Design and build (using Limrose boxes) a half adder. Your solution
must show the truth table and Boolean expressions. Build, test and record
your circuits performance.
b)
A full adder can be designed using two half adders with some
additional gates. Design and build (using Limrose boxes) a full adder. Your
design must show how you derived the Boolean equation for the Sum and
Carry along with the truth table. Please note your final solution must be
minimised.
c)
Using a simulation package of your choice design and 4 stage
asynchronous counter circuit.
Barnfield College
d)
e)
Show how you can modify the asynchronous counter in (a) to count to
eleven.
Keep photos, records and observation records; include in your report
Task 3 [P8]
Using the circuit you simulated for the full adder with the sequential
counter (modulo 11) build the circuit using either 74 or 4000 series
integrated circuits (use Limrose boxes)
Keep photos, records and observation records; include in your report
Task 4 [M3]
Using simulation package of your choice analyse and explain in detail the
operation of the Security monitoring system shown below.
Use this exercise to compare the difference between the combinational logic
devices and the sequential logic used in this assignment.
Barnfield College
Barnfield College
Student declaration
I declare that all the work submitted for this assignment is my own work or, in the case of group
work, the work of myself and the other members of the group in which I worked, and that no
part of it has been copied from any source.
I understand that if any part of the work submitted for this assignment is found to be plagiarised,
none of the work submitted will be allowed to count towards the assessment of the assignment
Signed Date
Barnfield College