Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch
DESCRIPTION
Monolithic temperature and
overload protected power switch
based on MOSFET technology in a
5 pin plastic envelope, configured
as a single high side switch.

BUK203-50Y

QUICK REFERENCE DATA

SYMBOL

PARAMETER

IL

Nominal load current (ISO)

SYMBOL

PARAMETER

VBG
IL
Tj
RON

Continuous off-state supply voltage

Continuous load current
Continuous junction temperature
On-state resistance

MIN.

UNIT

1.6

MAX.

UNIT

50
4
150
220

V
A
C
m

APPLICATIONS
General controller for driving
lamps, motors, solenoids, heaters.

FEATURES
Vertical power DMOS switch
Low on-state resistance
5 V logic compatible input
Overtemperature protection self resets with hysteresis
Overload protection against
short circuit load with
output current limiting;
latched - reset by input
High supply voltage load
protection
Supply undervoltage lock out
Status indication for overload
protection activated
Diagnostic status indication
of open circuit load
Very low quiescent current
Voltage clamping for turn off of
inductive loads
ESD protection on all pins
Reverse battery and
overvoltage protection

PINNING - SOT263
PIN

FUNCTIONAL BLOCK DIAGRAM

BATT
STATUS
POWER
MOSFET

INPUT

CONTROL &
PROTECTION
CIRCUITS
LOAD
RG

GROUND

Fig.1. Elements of the TOPFET HSS with internal ground resistor.

PIN CONFIGURATION

SYMBOL

DESCRIPTION
tab

Ground

Input

Battery (+ve supply)

Status

Load

1 2345

leadform
263-01

Fig. 2.
tab

TOPFET
HSS

Fig. 3.

connected to pin 3

April 1995

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

VBG

Battery voltages
Continuous off-state supply voltage

50

-VBG

Reverse battery voltages1

Repetitive peak supply voltage

External resistors:
RI = RS 4.7 k, 0.1

32

-VBG

Continuous reverse supply voltage

RI = RS 4.7 k

16

IL
PD

Continuous load current

Total power dissipation

Tmb 110 C
Tmb 25 C

4
50

A
W

Tstg
Tj

Storage temperature
Continuous junction temperature2

-55
-

175
150

C
C

Tsold

Lead temperature

250

II

Input and status

Continuous input current

-5

mA

IS

Continuous status current

-5

mA

II
IS

Repetitive peak input current

Repetitive peak status current

0.1
0.1

-20
-20

20
20

mA
mA

1.4

MIN.

MAX.

UNIT

kV

during soldering

Inductive load clamping

EBL

Non-repetitive clamping energy

Tmb = 150 C prior to turn-off

ESD LIMITING VALUE

SYMBOL

PARAMETER

CONDITIONS

VC

Electrostatic discharge capacitor

voltage

Human body model;

C = 250 pF; R = 1.5 k

THERMAL CHARACTERISTICS
SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

2.5

K/W

60

75

K/W

Thermal resistance
Rth j-mb

Junction to mounting base

Rth j-a

Junction to ambient

in free air

1 Reverse battery voltage is allowed only with external input and status resistors to limit the currents to a safe value.
2 For normal continuous operation. A higher Tj is allowed as an overload condition but at the threshold Tj(TO) the over temperature trip operates
to protect the switch.
3 Of the output Power MOS transistor.

April 1995

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

STATIC CHARACTERISTICS
Tmb = 25 C unless otherwise stated
SYMBOL

PARAMETER

CONDITIONS

VBG

Clamping voltages
Battery to ground

VBL
-VLG

Battery to load
Negative load to ground

VBG

Supply voltage
Operating range1

MIN.

TYP.

MAX.

UNIT

IG = 1 mA

50

55

65

IL = IG = 1 mA
IL = 1 mA

50
12

55
17

65
21

V
V

40

battery to ground
-

Currents

VBG = 13 V
2

IL
IB

Nominal load current

Quiescent current3

VBL = 0.5 V; Tmb = 85 C

VIG = 0 V; VLG = 0 V

1.6
-

0.1

A
A

IG
IL

Operating current4
Off-state load current5

VIG = 5 V; IL = 0 A
VBL = 13 V; VIG = 0 V

1.5
-

2.2
0.1

4
1

mA
A

RON

Resistances
On-state resistance6

VBG = 13 V; IL = 2 A; tp = 300 s

160

220

RON
RG

On-state resistance
Internal ground resistance

VBG = 5 V; IL = 0.5 A; tp = 300 s

IG = 10 mA

225
150

320
-

MIN.

TYP.

MAX.

UNIT

35
6

60
7.5

100
8.5

A
V

1.5

2.1
2

2.7
-

V
V

INPUT CHARACTERISTICS
Tmb = 25 C; VBG = 13 V
SYMBOL

PARAMETER

CONDITIONS

II
VIG

Input current
Input clamping voltage

VIG = 5 V
II = 200 A

VIG(ON)
VIG(OFF)

Input turn-on threshold voltage

Input turn-off threshold voltage

1 On-state resistance is increased if the supply voltage is less than 9 V. Refer to figure 8.
2 Defined as in ISO 10483-1.
3 This is the continuous current drawn from the battery when the input is low and includes leakage current to the load.
4 This is the continuous current drawn from the battery with no load connected, but with the input high.
5 The measured current is in the load pin only.
6 The supply and input voltage for the RON tests are continuous. The specified pulse duration tp refers only to the applied load current.

April 1995

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

PROTECTION FUNCTIONS AND STATUS INDICATIONS

Truth table for normal, open-circuit load and overload conditions and abnormal supply voltages.
FUNCTIONS
SYMBOL

THRESHOLD

INPUT

STATUS

OUTPUT

Normal on-state

Normal off-state

Open circuit load1

Open circuit load

Over temperature2

Over temperature3

Short circuit load4

Short circuit load

VBG(TO)

Low supply voltage5

VBG(LP)

High supply voltage6

IL(OC)

Tj(TO)

VBL(TO)

CONDITION

TRUTH TABLE

MIN.

TYP.

MAX.

UNIT

30

90

150

mA

150

175

10.5

12

40

45

50

For input 0 equals low, 1 equals high, X equals dont care.

For status 0 equals low, 1 equals open or high.
For output switch 0 equals off, 1 equals on.

STATUS CHARACTERISTICS
Tmb = 25 C.
The status output is an open drain transistor, and requires an external pull-up circuit to indicate a logic high.
SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT

VSG
VSG

Status clamping voltage

Status low voltage

IS = 100 A; VIG = 0 V
IS = 50 A; VBG = 13 V; VIG = 5 V

6
-

7
0.7

8
0.8

V
V

IS
IS

Status leakage current

Status saturation current7

VSG = 5 V
VSS = 5 V; RS = 0 ; VBG = 13 V

0.1
5

1
-

A
mA

RS

Application information
External pull-up resistor8

VSS = 5 V

100

1 In the on-state, the switch detects whether the load current is less than the quoted open load threshold current. This is for status indication
only. Typical hysteresis equals 25 mA. The thresholds are specified for supply voltage within the normal working range.
2 After cooling below the reset temperature the switch will resume normal operation. The reset temperature is lower than the trip temperature by
typically 10 C.
3 If the overtemperature protection has operated, status remains low to indicate the overtemperature condition even if the input is taken low,
providing the device has not cooled below the reset temperature.
4 After short circuit protection has operated, the input voltage must be toggled low for the switch to resume normal operation.
5 Undervoltage sensor causes the device to switch off. Typical hysteresis equals 0.7 V.
6 Overvoltage sensor causes the device to switch off to protect the load. Typical hysteresis equals 1.3 V.
7 In a fault condition with the pull-up resistor short circuited while the status transistor is conducting.
8 The pull-up resistor also protects the status pin during reverse battery conditions.

April 1995

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

DYNAMIC CHARACTERISTICS
Tmb = 25 C; VBG = 13 V
SYMBOL

PARAMETER

CONDITIONS

-VLG

Inductive load turn-off

Negative load voltage1

VIG = 0 V; IL = 2 A; tp = 300 s
VIG = 5 V; RL 10 m

td sc

Short circuit load protection2

Response time

IL

Load current prior to turn-off

t < td sc

IL(lim)

Overload protection3
Load current limiting

VBL = 9 V; tp = 300 s

MIN.

TYP.

MAX.

UNIT

15

20

25

75

17

12

15

22

MIN.

TYP.

MAX.

UNIT

SWITCHING CHARACTERISTICS
Tmb = 25 C, VBG = 13 V, for resistive load RL = 13 .
SYMBOL

PARAMETER

CONDITIONS

During turn-on

to VIG = 5 V

td on
dV/dton

Delay time
Rate of rise of load voltage

to 10% VL

16
1.3

s
V/s

t on

Total switching time

to 90% VL

40

td off

During turn-off
Delay time

to VIG = 0 V
to 90% VL

20

dV/dtoff
t off

Rate of fall of load voltage

Total switching time

to 10% VL

1.6
35

3
-

V/s
s

MIN.

TYP.

MAX.

UNIT

CAPACITANCES
Tmb = 25 C; f = 1 MHz; VIG = 0 V
SYMBOL

PARAMETER

CONDITIONS

Cig

Input capacitance

VBG = 13 V

15

20

pF

Cbl

Output capacitance

VBL = VBG = 13 V

120

170

pF

Csg

Status capacitance

VSG = 5 V

11

15

pF

1 For a high side switch, the load pin voltage goes negative with respect to ground during the turn-off of an inductive load. This negative voltage
is clamped by the device.
2 The load current is self-limited during the response time for short circuit load protection. Response time is measured from when input goes
high.
3 If the load resistance is low, but not a complete short circuit, such that the on-state voltage remains less than VBL(TO), the device remains in
current limiting until the overtemperature protection operates.

April 1995

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

IL / A

10
9

VBL

I
VBG

IS
S

TOPFET
HSS

IL

VLG

IG

RS

VSG

13

LOAD

VIG

VBG / V =

IB
II

BUK203-50Y

3
2
1
0
0

Fig.4. High side switch measurements schematic.

(current and voltage conventions)

1.5

Fig.7. Typical on-state characteristics, Tj = 25 C.

IL = f(VBL); parameter VBG; tp = 250 s

Normalised Power Derating

PD%

120

1
VBL / V

0.5

400

RON / Ohm

BUK203-50Y

110
100
90

300

80
70
60
50

200

40
30

100

20
10
0
0

20

40

60

80
100
Tmb / C

120

140

Fig.5. Normalised limiting power dissipation.

PD% = 100PD/PD(25 C) = f(Tmb)

IL / A

10
VBG / V

100

Fig.8. Typical on-state resistance, Tj = 25 C.

RON = f(VBG); conditions: IL = 2 A; tp = 300 s

BUK203-50Y

0.5

RON / Ohm

BUK203-50Y
VBG =

7
0.4

5V
13 V

0.3

4
0.2

3
2

typ.

0.1

1
0

20

40

60

80
Tmb / C

100

120

-60

140

20

60
Tj / C

100

140

180

Fig.9. Typical on-state resistance, tp = 300 s.

RON = f(Tj); parameter VBG; condition IL = 0.5 A

Fig.6. Limiting continuous on-state load current.

IL = f(Tmb); conditions: VIG = 5 V, VBG = 13 V

April 1995

-20

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

BUK203-50Y

IG / mA

100 uA

IL

BUK203-50Y

CLAMPING
10 uA

1 uA

3
OPERATING

VIG = 3 V

100 nA

HIGH VOLTAGE
1

10 nA

QUIESCENT

VIG = 0 V

1 nA

20

10

30
VBG / V

40

60

50

-60

IG / mA

20

60
Tj / C

100

140

180

Fig.13. Typical off-state leakage current.

IL = f(Tj); conditions: VBL = 13 V = VBG; VIG = 0 V.

Fig.10. Typical supply characteristics, 25 C.

IG = f(VBG); parameter VIG

-20

BUK203-50Y

200

II / uA

BUK203-50Y

VBG / V =

150

VBG / V =

7
13

100
13

1
50

50

0
-60

-20

20

60
Tj / C

100

140

180

Fig.11. Typical operating supply current.

IG = f(Tj); parameter VBG; condition VIG = 5 V
IB

100 uA

4
VIG / V

Fig.14. Typical input characteristics, Tj = 25 C.

II = f(VIG); parameter VBG

BUK203-50Y

100

II / uA

BUK203-50Y

80

10 uA
60

1 uA
40

100 nA
20

10 nA
-60

-20

20

60
Tj / C

100

140

180

30

20

50

40

VBG / V

Fig.12. Typical supply quiescent current.

IB = f(Tj); condition VBG = 13 V, VIG = 0 V, VLG = 0 V

April 1995

10

Fig.15. Typical input current, Tj = 25 C.

II = f(VBG); condition VIG = 5 V

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

VIG / V

3.0

BUK203-50Y

IS

10 uA

BUK203-50Y

2.5

1 uA
VIG(ON)

2.0

100 nA

VIG(OFF)

1.5

10 nA

1.0
-60

-20

20

60
Tj / C

100

140

-60

180

VIG / V

20

60
Tj / C

100

140

180

Fig.19. Typical status leakage current.

IS = f(Tj); conditions VSG = 5 V, VIG = VBG = 0 V

Fig.16. Typical input threshold voltages.

VIG = f(Tj); conditions VBG = 13 V, IL = 100 mA

8.0

-20

BUK203-50Y

500

IS / uA

BUK203-50Y

400
7.5

300

200
7.0

100

6.5
-60

-20

20

60
Tj / C

100

140

180

IS / mA

0.4

0.6

0.8

1
1.2
VSG / V

1.4

1.6

1.8

Fig.20. Typical status low characteristic, Tj = 25 C.

IS = f(VSG); conditions VIG = 5 V, VBG = 13 V, IL = 0 A

Fig.17. Typical input clamping voltage.

VIG = f(Tj); conditions II = 200 A, VBG = 13 V

20

0.2

BUK203-50Y

VSG / V

BUK203-50Y

0.8

15

0.6

10
0.4

5
0.2

10

-60

VSG / V

Fig.18. Typical status characteristic, Tj = 25 C.

IS = f(VSG); conditions VIG = VBG = 0 V

April 1995

-20

20

60
Tj / C

100

140

180

Fig.21. Typical status low voltage, VSG = f(Tj).

conditions IS = 50 A, VIG = 5 V, VBG = 13 V, IL = 0 A

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

VSG / V

8.0

BUK203-50Y

VBG(LP) / V

47

BUK203-50Y

46

VIG / V =

off

7.5

45
0
7.0

on

44

43

6.5
-60

-20

20

60
Tj / C

100

140

-60

180

IL(OC) / mA

20

60
Tj / C

100

140

180

Fig.25. Supply typical overvoltage thresholds.

VBG(LP) = f(Tj); conditions VIG = 5 V; IL = 100 mA

Fig.22. Typical status clamping voltage, VSG = f(Tj).

parameter VIG; conditions IS = 100 A, VBG = 13 V

200

-20

BUK203-50Y

VBG / V

65

BUK203-50Y

max.
60

IG =
1 mA

100

typ.
10 uA
55

min.
50

0
-60

-20

20

60
Tj / C

100

140

-60

180

Fig.23. Low load current detection threshold.

IL(OC) = f(Tj); conditions VIG = 5 V; VBG = 13 V

VBG(TO) / V

-20

20

60
Tj / C

100

140

180

Fig.26. Typical battery to ground clamping voltage.

VBG = f(Tj); parameter IG

BUK203-50Y

10

IL / A

BUK203-50Y

9
8

on

off

5
4

3
1

2
1
0

0
-60

-20

20

60
Tj / C

100

140

-24

180

Fig.24. Supply typical undervoltage thresholds.

VBG(TO) = f(Tj); conditions VIG = 3 V; IL = 100 mA

April 1995

-20

-16

-12
VLG / V

-8

-4

Fig.27. Typical negative load clamping characteristic.

IL = f(VLG); conditions VIG = 0 V, tp = 300 s, 25 C

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

VLG / V

-10

BUK203-50Y

IL / A

BUK203-50Y

IL =

-12

-5
1 mA

-14

-10

-16
2A
-18

-15

tp = 300 us
-20
-22

-20
-60

-20

20

60
Tj / C

100

140

-1.1

180

VBL / V

-0.7

-0.5
VBL / V

-0.3

-0.1

Fig.31. Typical reverse diode characteristic.

IL = f(VBL); conditions VIG = 0 V, Tj = 25 C

Fig.28. Typical negative load clamping voltage.

VLG = f(Tj); parameter IL; condition VIG = 0 V.

65

-0.9

BUK203-50Y

Cbl / pF

1000

BUK203-50Y

IL =
tp = 300 us

1A

60

1 mA

100

100 uA
55

10

50
-60

-20

20

60
Tj / C

100

140

180

40

30

50

VBL / V

Fig.32. Typical output capacitance. Tmb = 25 C

Cbl = f(VBL); conditions f = 1 MHz, VIG = 0 V

Fig.29. Typical battery to load clamping voltage.

VBL = f(Tj); parameter IL; condition IG = 5 mA.

20

10

IG / mA

BUK203-50Y

20

IL / A

BUK203-50Y
VBL(TO) typ.

current limiting

15
tp =

-50

50 us
10

300 us

i.e. before short

circuit load trip

-100

-150
-20

-15

-10
VBG / V

-5

Fig.30. Typical reverse battery characteristic.

IG = f(VBG); conditions IL = 0 A, Tj = 25 C

April 1995

12

16
VBL / V

20

24

28

Fig.33. Typical overload characteristic, Tmb = 25 C.

IL = f(VBL); condition VBG = 13 V; parameter tp

10

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

20

BUK203-50Y

IL(LIM) / A

BUK203-50Y

VBL(TO) / V

15

BUK203-50Y

14
13

15

12
11

10

10
9
8

7
6
0

5
-60

-20

20

60
100
Tmb / C

140

180

-60

VBL(TO) / V

20

60
100
Tmb / C

140

180

Fig.36. Typical short circuit load threshold voltage.

VBL(TO) = f(Tmb); condition VBG = 13 V

Fig.34. Typical overload current, VBL = 9 V.

IL = f(Tmb); conditions VBG = 13 V; tp = 100 s

12

-20

BUK203-50Y

10

Zth j-mb / (K/W)

BUK203-50Y

D=
0.5

11

0.2
0.1
0.05
0.1

10

0.02
PD

tp

D=

0
0.01
100n

9
0

10

20
VBG / V

30

40

Fig.35. Typical short circuit load threshold voltage.

VBL(TO) = f(VBG); condition Tmb = 25 C

April 1995

1u

10u

100u

1m
t/s

10m

100m

tp
T
t

10

Fig.37. Transient thermal impedance.

Zth j-mb = f(t); parameter D = tp/T

11

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

MECHANICAL DATA
Dimensions in mm

4.5
max

Net Mass: 2 g

10.3
max
1.3

3.6
2.8

5.9
min

mounting
base

15.8
max
5

in

2.4
max
R

0.

(2)

3.5 max
not tinned

5.6
9.75
0.

0.6
min (4 x)

0.6

1 2 3 4 5

in

0.5

(1)

1.7

2.4
4.5

(4 x)

0.4

(1)
M

0.9 max

8.2

(5 x)
NOTES (1)
(2)

positional accuracy of the terminals

is controlled in this zone only.
terminal dimensions in this zone
are uncontrolled.

Fig.38. SOT263 leadform 263-01;

pin 3 connected to mounting base.
Note
1. Refer to mounting instructions for TO220 envelopes.
2. Epoxy meets UL94 V0 at 1/8".

April 1995

12

Rev 1.100

Philips Semiconductors

Product specification

PowerMOS transistor
TOPFET high side switch

BUK203-50Y

DEFINITIONS
Data sheet status
Objective specification

This data sheet contains target or goal specifications for product development.

Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification

This data sheet contains final product specifications.

Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1996
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.

April 1995

13

Rev 1.100

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