Sei sulla pagina 1di 33

VLSI Circuit Design

Lecture 2: MOSFET Bias Design


Dr. Ke Huang
COMPE 572
VLSI Circuit Design
Fall 2015

8/27/2015

COMPE 572 VLSI Circuit Design

Announcement
In my file, the following students are enrolled
but have not provided the proof of prerequisites
yet:

8/27/2015

COMPE 572 VLSI Circuit Design

Review
Introduction of VLSI
Review of bipolar junction transistor (BJT)
Review of metaloxidesemiconductor fieldeffect transistor (MOSFET)

8/27/2015

COMPE 572 VLSI Circuit Design

Review of bipolar junction transistor (BJT)


Simplified structure of the npn and pnp transistors

npn transistor

pnp transistor

8/27/2015

COMPE 572 VLSI Circuit Design

Review of bipolar junction transistor (BJT)


Characteristic for an npn transistor

characteristic

characteristic

8/27/2015

COMPE 572 VLSI Circuit Design

Review of metaloxidesemiconductor
field-effect transistor (MOSFET)
Physical structure of NMOS transistors

Physical structure of NMOS

Cross-section of NMOS

8/27/2015

COMPE 572 VLSI Circuit Design

Review of metaloxidesemiconductor
field-effect transistor (MOSFET)
Complementary MOS (CMOS)

Cross-section of a CMOS integrated circuit

8/27/2015

COMPE 572 VLSI Circuit Design

Review of metaloxidesemiconductor
field-effect transistor (MOSFET)
Characteristics of nMOS
D
G

8/27/2015

COMPE 572 VLSI Circuit Design

MOSFET Bias Design


Characteristics of nMOS a 3-dimensional view

8/27/2015

10

COMPE 572 VLSI Circuit Design

MOSFET Bias Design


Characteristics of nMOS a 3-dimensional view

8/27/2015

COMPE 572 VLSI Circuit Design

11

Review of metaloxidesemiconductor
field-effect transistor (MOSFET)
Characteristics of nMOS
D
G

characteristic

8/27/2015

COMPE 572 VLSI Circuit Design

12

Review of metaloxidesemiconductor
field-effect transistor (MOSFET)
Characteristics of nMOS
D
G

or
S

characteristic in saturation region

8/27/2015

COMPE 572 VLSI Circuit Design

13

Review of metaloxidesemiconductor
field-effect transistor (MOSFET)
Characteristics of pMOS

S
G
D

8/27/2015

COMPE 572 VLSI Circuit Design

14

Learning objectives
Biasing by fixing
Biasing using a drain-to-gate feedback resistor
Biasing using a constant-current source

8/27/2015

COMPE 572 VLSI Circuit Design

15

MOSFET Bias Design


MOSFET characteristics
D
G
S

We need to consider all the 3 regions (cutoff, triode, saturation) for


designing digital circuits, today we will focus on the saturation region

8/27/2015

COMPE 572 VLSI Circuit Design

MOSFET Bias Design


Characteristics of nMOS
D
G

or
S

characteristic in saturation region

16

8/27/2015

COMPE 572 VLSI Circuit Design

17

MOSFET Bias Design


Why we need to bias transistors
Bias: State of the transistor when there is no signal
(current and voltages in all elements)
Bias is constant in time (may vary extremely slowly
compared to signal)
Purpose of the bias is to ensure that MOS is in saturation
at all times.

8/27/2015

COMPE 572 VLSI Circuit Design

MOSFET Bias Design


Biasing by fixing
Fixed voltage
value

Fixed voltage
value
GND

Subject to change

18

8/27/2015

COMPE 572 VLSI Circuit Design

19

MOSFET Bias Design


Biasing by fixing and connecting a resistance
in the source

The same applied to device 1 and device 2 will result in two values
1 and 2 , which will in turn result in very close values

8/27/2015

COMPE 572 VLSI Circuit Design

20

MOSFET Bias Design


Biasing by fixing and connecting a resistance
in the source: practical implementations

8/27/2015

COMPE 572 VLSI Circuit Design

21

MOSFET Bias Design


Biasing by fixing and connecting a resistance
in the source: an example
Design the circuit on the left to establish a DC
drain current = 0.5mA. The MOSFET is
specified to have = 1V and / =
1mA/V 2 . Use a power-supply = 15V and
we assume that , and take one-third
of supply voltage, respectively.
Determine the values of 1 and 2 .
Calculate the percentage change in the value
of obtained when the MOSFET is replaced
with another unit having the same but
= 1.5V.

8/27/2015

COMPE 572 VLSI Circuit Design

22

MOSFET Bias Design


Biasing by fixing and connecting a resistance
in the source: an example

takes one-third of supply voltage:


1
3

15V = 5V
15 10
=
=
= 10 k

0.5

5
= =
= 10 k
0.5

8/27/2015

COMPE 572 VLSI Circuit Design

23

MOSFET Bias Design


Biasing by fixing and connecting a resistance
in the source: an example
Determine
1
= (/)( )2
2
1
0.5 = 1 ( 1)2
2
= 2 V
= + = 5 + 2 = 7 V
We can set 1 = 8 M and 2 = 7 M

8/27/2015

COMPE 572 VLSI Circuit Design

24

MOSFET Bias Design


Biasing by fixing and connecting a resistance
in the source: an example
If = 1.5V this time
1
= 1 ( 1.5)2
2
= + = +

7 = 104 +

(1)

(2)

Combining (1) and (2), we have


= 0.455mA
Percentage change is
|0.4550.5|
0.5

= 9%

8/27/2015

COMPE 572 VLSI Circuit Design

25

Learning objectives
Biasing by fixing
Biasing using a drain-to-gate feedback resistor
Biasing using a constant-current source

8/27/2015

COMPE 572 VLSI Circuit Design

26

MOSFET Bias Design


Biasing using a drain-to-gate feedback resistor

Slope = 1/

8/27/2015

COMPE 572 VLSI Circuit Design

27

Learning objectives
Biasing by fixing
Biasing using a drain-to-gate feedback resistor
Biasing using a constant-current source

8/27/2015

COMPE 572 VLSI Circuit Design

MOSFET Bias Design


Biasing using a constant-current source
General scheme

Large input
resistance value

Constant
current source

28

8/27/2015

COMPE 572 VLSI Circuit Design

29

MOSFET Bias Design


Biasing using a constant-current source
Implementation of the constant-current source using a
current mirror

8/27/2015

COMPE 572 VLSI Circuit Design

MOSFET Bias Design


Biasing using a constant-current source
Analysis of current mirror

30

8/27/2015

COMPE 572 VLSI Circuit Design

31

MOSFET Bias Design


Biasing using a constant-current source
Analysis of current mirror

The output current value (or


2 ) can be easily controlled by
setting the W and L in the
transistor 2

8/27/2015

COMPE 572 VLSI Circuit Design

32

MOSFET Bias Design


Biasing using a constant-current source
Example of current mirror application
Using two transistors 1 and 2 having

equal lengths but widths related by 2 = 5,


1

design the circuit to obtain = 0.5 mA. Let


= 5 V, = 5 V, (/)1 =
0.8mA/V 2 , = 1V. Find the required
value for . What is the voltage at the gates
of 1 and 2 ? What is the lowest voltage
allowed at the drain of 2 while 2 remains
in the saturation region?
85k, -3.5V, -4.5V

8/27/2015

COMPE 572 VLSI Circuit Design

33

Summary
Biasing by fixing
Biasing using a drain-to-gate feedback resistor
Biasing using a constant-current source

Potrebbero piacerti anche