DIGITAL ELECTRONICS (331102)

PRACTICAL: 09

TO REALIZE THE MAGNITUDE COMPARATOR

1.0 AIM :

 To design and realize the Magnitude Comparator circuit.

2.0 PRIOR CONCEPTS :

 Knowledge of working of AND, OR, NOT gate.

 Knowledge of working of NAND and Ex - OR gates.

3.0 INTRODUCTION

 It is often useful to determine

whether or not two operands are
equal, which is
called comparison.

 A digital logic circuit that

determines whether or not two
four-bit operands A =
(A0,A1,A2,A3) and B =
(B0,B1,B2,B3) are equal is
called MAGNITUDE
COMPARATOR.

 Magnitude comparator is a
combinational circuit that compares two numbers A & B to
determine whether A > B, or A = B, or A < B.

 This Magnitude Comparator can be used perform comparisons of two 4-bit binary
or BCD words. The output provides both a P equals Q function or P greater than Q
function.

 The algorithm that the circuit implements is based on the concept of an exclusive-
or operation (also called an xor operation), which is instantiated in an xor gate.

 The xor function resembles the inclusive or, except that when both inputs are
high, the xor output is zero, as shown in the following truth tables:

 After the xor operation is applied to each bit of A and B (we call this bitwise
processing), the xor outputs are operated on by a quad-input nor gate.

35 | P a g e
SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))
 DIGITAL ELECTRONICS (331102)

 Thus, if any of the bits are different, the or part of the nor gate will return a one,
and the not part of the nor gate will return a zero.

 If A0 = B0 and A1 = B1 and A2 = B2 and A3 = B3, then the nor gate will applu
the or operation to the outputs of the xor gates (which will all be one) to yield a
one, which will be inverted at the output of the nor gate to yield a zero.

4.0 LOGIC DIAGRAM AND PIN DIAGRAM FOR A MAGNITUDE

COMPARATOR :

5.0 FUNCTIONING OF MAGNITUDE COMPARATOR :

36 | P a g e
SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))
 DIGITAL ELECTRONICS (331102)

6.0 EXERCISE
6.1 What is Bitwise Processing?

6.2 Why Ex-OR gates are used in this circuit?

37 | P a g e
SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))
 DIGITAL ELECTRONICS (331102)

6.3 Can we design this circuit using the NAND gate?

7.0 ASSIGNMENTS

7.1 Design this circuit using NOR gate.

7.2 Explain working of magnitude comparator.

Grades for Exercise: .................................................

Grades for Assignment: .................................................

Signature of Lab Co-ordinators: .................................................

38 | P a g e
SOHIL VOHRA (LECTURER - SHRI K.J. POLYTECHNIC COLLEGE, BHARUCH (C.E. DEPTT))