Faculty:

FAKULTI KEJURUTERAAN ELEKTRIK

Review
Subject
: MAKMAL
KEJURUTERAAN
Release Date
ELEKTRIK
Last Amendment
Subject Code : SKEE 2742
Procedure Number

:1
: 2013
: 2012
: PK-UTM-FKE-(0)-10

SKEE 2742
FACULTY OF ELECTRICAL ENGINEERING
UNIVERSITI TEKNOLOGI MALAYSIA
JOHOR BAHRU

DIGITAL ELECTRONICS LABORATORY

TRAFFIC LIGHT SYSTEM

Prepared by
Name
Signature &
Stamp

: HEAD OF LABORATORY
: Dr Musa Mohd. Mokji
:

Approved by
Name
Signature &
Stamp

: HEAD OF DEPARTMENT
: Dr Sh Nasir Sh Husin
:

Date

Date

Introduction
The experiments in this laboratory are divided into 4 sections (1 week for each section). You
are to attend the laboratory for 4 consecutive weeks. Each section is very much related to
other sections.
Project
You are requires to design, simulate and implement a 4-junction traffic light system as shown
in Figure 1 where only green (G) and red (R) lights are considered in the system. There are
also a sensor on junction 2 (SJ2) and junction 4 (SJ4) to detect the presence of vehicle. Figure
2 shows the sequence of the traffic lights on the 4 junction where L is for OFF and H for
ON. Basically, one junction will be Green for 12 second at one time while others will be Red.
The 12 second countdown needs to be displayed on two 7-segments. However if no vehicle is
detected on junctions installed with the sensor, Green light for the junction will be skipped.
Junction 4 (J4)
SJ4

Junction 3 (J3)

Junction 1 (J1)

SJ2
Junction 2 (J2)

Figure 1

00
J1=G
Others=
R

SJ2=X
SJ4=X

00
J4=G
Others=
R

SJ2=X
SJ4=H

SJ2=X
SJ4=L

00
J3=G
Others=
R

Figure 2

SJ2=H
SJ4=X
SJ2=L
SJ4=X

01
J2=G
Others=
R

SJ2=X
SJ4=X

Design
Figure 3 shows the block diagram circuit for the traffic light system.

Timer

MOD 12
Countdown
Counter

4-bit
Adder
0
1
1
0

BCD to 7Segment
Decoder

BCD to 7Segment
Decoder

Combinational
Logic Circuit

SJ2
SJ4

Figure 3
Function of Each Block
1. Timer
The timer shown in Figure 4 provides the clock signal. The period T, t1 and t2 are given
by the following equations;
,

2. Mod-12 Counter
A mod-12 counter will be used to count down the 12 second period from

to

. The counter can be built using dedicated counter chips. For example, 74293
which is an asynchronous counter chip and 74163 which is a synchronous counter chip.
The counter can also be built using flip-flops. An asynchronous counter using T flipflops is much simpler to build than the synchronous counter.
3. Combinational Logic Circuit
The outputs of the combinational logic circuit give the required sequence (ON an OFF
sequence) of the traffic light system as shown in Figure 3. Flip-flops are needed to
implement the 4 sequences. To design the circuit, first obtain the truth-table of the
traffic light sequence where inputs for the table are SJ2, SJ4, Q1 and Q0 as shown
below. SJ2 and SJ4 are sensors installed on the selected junctions while Q1 and Q0 are
present state of the flip-flops. Other than that the truth table should include next state of
the flip-flops, inputs of the flip-flops (T1 and T0 if T flip-flops are used) and outputs of
the circuit which are the green lights condition on the 4 junctions (red lights condition
are always inverted from the green light). Input of the clock on the flip-flops is
connected to the output combination of the mod-12 counter so that the clock will only
turn LOW when the mod-12 counter produce output 0000 2. Other than the flip-flops,
implementation of the circuit can be done in many ways (using logic gates,
multiplexers and decoders).

SJ2
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1

SJ4
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1

Current
State
Q1
Q0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1

Next
State
Q1
Q0

T1

T0

GJ1

GJ2

GJ3

GJ4

4. BCD to 7-segment Display Decoder

To display the 12 second countdown number of the traffic light on the 7-segment
display. The outputs of the mod-12 counter must first be connected to the 4-bit adder in
order to convert the binary number to decimal. In the adder circuit, the 4-bit output of
the mod-12 counter will be added with 0110 2. The sum output of the adder need to be
connected to the first BCD to 7-segment decoder while the carry out of the adder is
connected to the second BCD to 7-segment decoder as shown in Figure 3. The first 7segment display will display decimal number from 0-9 while the second 7-segment
display will display either decimal number 0 or 1 only.
Your circuits will likely be identical with other groups, except the combinational logic circuit.
Project Implementation
1.
2.
3.
4.

Each week, you will be given certain tasks to complete.

To help you with the tasks, you are required to answer (and submit) the questions
given in the pre-lab sections.
The connections of the circuit must be done in the laboratory at the given time slot. If
you fail to complete the task, you are required to come again at some other times
which are convenient to you and the technicians.
The simulation parts can be done earlier. It is your responsibility to learn and install
Quartus II.

Important Issues
1.
2.

3.
4.
5.
6.
7.
8.
9.

Tests all your integrated circuit chips with IC tester.

Make sure all the VCC and Ground pins of all the integrated circuit chips are connected
to 5 V and 0 V respectively. As there are many 5 V and 0 V connections, it is
advisable to have common 5 V and 0 V rails. Try to avoid "looping" when connecting
these voltages.
Make sure to connect Enable pin if exist. Depending on the IC, Enable pins are named
differently. Thus, read the datasheet of the IC for detail.
Label all the pin numbers before doing your connections. This will help you a lot.
You need to get the pin diagrams of all the integrated circuit chips that you use.
Make sure you know how to use the proto-boards.
The project demands 100% perfection. A single wiring error will not give the results
you want. So please insert the wires properly into the proto-boards.
The facilitators are not obliged to check and troubleshoot your circuits in case of
errors. You need to do that on your own.
The facilitators can instruct you to change your combinational logic circuit design if
many of the students use the same technique.
To do troubleshooting, make sure you have the circuits truth table, datasheet of the
ICs, complete circuit diagram with pin number and simulation results. If you are

10.

doing the troubleshooting without these items, it is a sign that you are not doing
correct troubleshooting.
You are encouraged to use every inputs and outputs available on the trainer device to
do the troubleshooting. For example, you can use switches to be the inputs of your
circuit, pulse switch to replace clock and LEDs to check your outputs. Please refer to
manual of the trainer which is available on the labs website.

WEEK 1
Pre-Lab
Design and implement the combinational logic circuit of the traffic light system using any
one of the following method :
(i)
(ii)
(iii)
(iv)
(v)
(vi)
(vii)

8 to 1 multiplexers (74151 chip) with NOT gates only.

4 to 1 multiplexers (74153 chip) with other logic gates.
a single 4 to 16 line decoder (74154 chip) with NAND gates only.
a single 4 to 16 line decoder (74154 chip) with AND gates only.
minimize NOR-NOR configuration.
minimize NAND-NAND configuration.
other method not mentioned above.

Experiment 1 : Introduction and Combinational Logic Circuit Design

Objective
1.
2.

To introduce students to the laboratory and the equipment used.

To design a combinational logic circuit that gives the sequence of a 4-junction traffic
light system.

Task
1.
2.

Learn how to use the equipment in the laboratory - the digital trainer, IC tester, protoboards and the integrated circuit chips.
Decide on the implementation of the combinational logic circuit design.
Combinational Logic Circuit Design (with pin numbers)

Task

Remarks

Knowledge of equipment
Combinational logic circuit design
Lecturer :

Signature :

Discussion
Explain the reason why you choose the combinational logic circuit design of your identity
card number (in terms of cost and complexity).

Other discussions

Conclusion

WEEK 2
Pre-Lab
1.

Timer
t1 = ln2(R1+R2)C
t2 = ln2R2C
T = t1+t2

(i)
(ii)
2.

Calculate the period and frequency of the output signal if R 1 = 1 k,

R2 = 68 k and C = 10 F.
A square wave is when t1 = t2. Is it possible to get a square wave from the
circuit?

Mod-12 counter using counter chip

Design a mod-12 counter using either 74293 chip or 74163 chip.

3.

Asynchronous Counter
Using T flip-flops with active-LOW CLEAR function, construct a mod-12
(i)
up counter.
(ii)
down counter.

Experiment 2 : Timer and Counters

Objectives
1.
2.

To built the timer and counter circuits.

To simulate the counter circuit.

Equipment
1.
2.
3.

Digital trainer
Your own laptop with Quartus II installed.
The necessary components (refer to the appendix of the available components)

Tasks
1.

2.

Connect the following circuits on the proto-board:

(i)
timer circuit with T 1 s (you can vary T if you wish)
(ii)
mod-12 counter using either 74293 chip or 74163 chip.
(iii)
mod-12 asynchronous counter (up or down) using T flip-flops (use JK flipflops).
Simulate the counter circuit using T flip-flops (print the simulation result).
Complete Circuit Design (with pin numbers and component values)
(i) Timer circuit

(ii) Mod-12 counter using either 74293 chip or 74163 chip.

(iii) Mod-12 asynchronous counter using T flip-flops

Tasks

Remarks

Timer circuit
Mod-12 counter
Mod-12 counter using T flip-flops
Simulation
Lecturer :

Discussion

Signature :

Conclusion

WEEK 3
Pre-Lab
Simulate the combinational logic circuit of your identity card number.

Experiment 3 : Implementation of Combinational Logic Circuit

Objective
1.
2.

To implement the combinational logic circuit of identity card number.

To combine the timer, counter and combinational logic circuits.

Equipment
1.
2.

Digital trainer
The necessary components (refer to the appendix of the available components)

Tasks
1.
2.

Implement the combinational logic circuit of your identity card number that you have
designed on the proto-board.
Connect the timer circuit to the mod-12 counter (using 74293 or 74163 chips) and the
combinational logic circuit on the proto-board.

Tasks
Combinational Logic Circuit
Simulation
Timer, counter and combinational logic
circuit
Lecturer :
Signature :

Remarks

Discussion

Conclusion

WEEK 4
Pre-Lab
1.

7-segment display
(i)
(ii)

2.

BCD to 7-segment display decoder

(i)
(ii)
(iii)

3.

What are the two types of 7-segment displays?

Find two integrated circuit chips decoders that can drive the above displays.

74247 and 7447 integrated circuit chips are used to drive what type of 7segment display?
What is the main difference between 7447 and 74247 integrated circuit chips?
What do you think will happen if the decoder is connected directly to the
display without any resistors?

Shift Registers
(i)
(ii)

What are the 4 types of shift register?

Which type is the 74195 integrated circuit chip?

Experiment 4 : Displays, Decoders and Shift Register.

Objective
1.

To connect the 7-segment display decoders to the 7-segment displays and the shift
register.
To combine the timer, counter, combinational logic circuit and the displays.
To simulate the whole identity card counter circuit.

2.
3.

Equipment
1.
2.
3.

Digital trainer
Your own laptop with Quartus II installed.
The necessary components (refer to the appendix of the available components)

Tasks
1.
2.
3.

Connect the 7-segment display decoders to the 7-segment display and the shift
register.
Combine the whole circuit.
Simulate the whole circuit (print the simulation result).
Complete Circuit Design (with pin numbers)
7-segment display decoders, 7-segment displays and the shift register.

Tasks

Remarks

Displays, decoders and Shift Register

The whole circuit
Simulation of the whole circuit
Lecturer :

Discussion

Conclusion

Signature :

Appendix - List of available components

1.

Integrated circuit chip

555, 7400, 7402, 7404, 7408, 7410, 7411, 7420, 7421, 7430, 7432, 74112, 74138,
74150, 74151, 75153, 74154, 74163, 74195, 74247, 74293.
2.

Common-anode 7-segment displays

3.

Resistors
220 , 450 , 1 k, 68 k, 100 k variable resistors.

4.

Capacitor
10 F