Design and implementation of a single phase

three-arms rectifier inverter

S.J.Chiang,T.S.Lee and J.M.Chang

Abstract: A high performance single phase three-arms PWM rectifier inverter is presented. A
switching control approach for the common arm is proposed such that control of the rectifier arm
and inverter arm can be designed independently. Variable structure control (VSC) executed with
capacitor current control is developed to design the inverter. For the rectifier design, an instantaneous
power feedback controller using filter theory is proposed to enhance the DC voltage regulator to
reduce DC voltage fluctuation and minimise input current distortion. A 3kVA system is implemented
to confirm the effectiveness of the proposed approaches.

Introduction

Single phase rectifier inverters are widely used in single

phase AC power supplies, uninterruptible power supplies
(UPSs) and automatic voltage regulators (AVR). Schemes
utilising a diode bridge in cascade with a full bridge inverter
are simple and cheap, however, the input power factor
must be corrected using a passive filter. To actively correct
the input current waveform and thus the input power factor, a full bridge transistor rectifier can be used to replace
the diode bridge rectifier. In [I] a three-arms rectifier
inverter (shown in Fig. 1) is proposed, which saves one arm
of switches compared to the cascaded full bridge rectifier
inverter and thus increases the efficiency due to lower
switching and conduction losses.
To operate as a rectifier and an inverter simultaneously,
switching control of the common arm is a necessary
requirement for the control of any three arms converter
[2, 31. In this paper, a switching control approach based on
a pulse width modulated (PWM) high frequency drive is
presented to decouple control of the rectifier and inverter.
Although some modern control approaches [MI have
good performance in controlling the inverter portion, the
variable structure control (VSC) executed using capacitor
current control is adopted because of its simple implementation and robustness. Compared with other VSC controlled inverters [7-lo], the proposed approach has the
following features: (i) the capacitor current is estimated
from the differentiation of capacitor voltage, so no capacitor current sensor is required; (ii) unlike other inverters in
which the switching frequency is not fKed [7, 81, or is fixed
but achieved with a complicated control algorithm [9], a
fixed-frequency PWM can be applied with the proposed
VSC; (iii) the capacitor current control lacks a direct current hutation capability, and thus a current limitation
approach is developed in this paper that has not previously
0E E , 2000
LEE Proceedings online no. 2oooO5G9
DOT: 10.1049/ipepa:20000509
Paper first rcceived 20th October 1999 and in revised form 14th March 2000

The authors are with the Department of Electrical Engineering, National LienHo InstitiUte of Technlogy, Miao-Li, Taiwan, Republic of China
IEE Proc.-Electr. Power Appl., Vol. 147, No. 5, Sepirmber 2000

been applied to inverters with capacitor current control

[7, 8, 111; (iv) the control circuit is simpler than an inverter
designed with VSC and inductor current control [lo].
Previous rectifier inverter systems have used a DC speedup capacitor and voltage regulation for rectifier control
[12-141. In general, these objects are achieved by feeding
back the instantaneous inverter power to reduce voltage
fluctuation and improve voltage regulating speed. However, these researches are confined to three-phase applications in which the instantaneous power and DC voltage are
ripple-free under balanced conditions. In single phase systems, for the following reasons, controller design is more
difficult than for three phase systems: (i) the instantaneous
power contains a significant second-order harmonic component even when the load is linear; (ii) load reactive and
harmonic powers flow through the DC capacitor, resulting
in substantial voltage ripple if the D C capacitance is not
large enough. Since the input current command is generated by the instantaneous power feedback and voltage regulation loops, attenuation of harmonic power and voltage
ripples is necessary to achieve unity power factor and low
input current distortion.
This paper proposes an instantaneous power feedback
controller (IPFC) that employs filter theory to extract the
instantaneous real power of the inverter. The response of
TPFC is fast and gives low distortion even when the load is
highly reactive or nonlinear. Voltage fluctuation is low,
thus reducing the DC capacitance and enabling design of
the DC voltage regulator mainly for voltage ripple attenuation.
In addition, to verify the theoretical bases and design of
the proposed approaches, a 3 kVA system has been implemented and simulation and experimental results obtained
to demonstrate the effectiveness of the proposed rectifier
inverter. Finally, a brief introduction to the application of
the three-arms rectifier inverter to other systems such as
single phase three-wire and three phase systems is also
given.
2

Modelling the converter

If PWM is employed on each arm, one can derive the following equations from the rectifier side and the inverter
side of Fig. 1, respectively:
379

dIB
L= (SB
dt

- SA)vd -vo

(2)

where Siis the switching function of the ith (i = A , B or C )

arm. Neglecting the high frequency switching terms, Sican
be approximated as:

(3)
where 9, is the amplitude of the triangular modulation
PWM signal. Substituting eqn. 3 into eqns. 1 and 2 results
in:

(ii) Although it saves one converter arm, the converter can

process the same power capacity as the conventional rectitier inverter system. In addition, switching losses are
reduced by one quarter approximately. Conduction loss
will be reduced by one quarter to one half depending on
the power factor of the load.
(iii) The DC-link voltage level requirement is the same as
the conventional rectifier inverter system.

3. I

VSC control of the inverter

VSC controller design

The proposed VSC controller employs capacitor current

control; the errors of the system states are defined as:

e , = U,*- U,

e, = i,*,,

- icap

- VconA) - vu

(4)

- VconA) - v o

(5)

(10)
where * means command of the variable, and lower-case
letters are used to represent the control circuit variables on
the counterpart of the power circuits.
From eqn. 10, one obtains:

In which, kpm (= Vcl/2ijtfi)

can be seen as the gain of the
PWM converter. A coupling term, the COM-arm
(common arm) control signal (vConA),exists in both equations that may cause interaction between the control of
rectifier and inverter. To solve this problem, the following
setting for vconAis proposed:

where k , and k, are voltage and current sensing factors,

respectively. With the relationships listed in eqns. 8 and 9,
one can rewrite eqn. 11 to be:

dIC
L= kpwm(vconC
dt
dIB

L- d t = k p w i n ( v c o n B

VconA

= --

vu

(6)

kpwm

REG-arm
I

GOM-arm INV-arm
I

Choose the sliding function to be

o = e,
he, (his a real)
then the VSC controller can be designed as:

(13)

1
Fig.1

i?ree-arnzr recti@ invrrtri

Then the two subsystems can be decoupled as:

Rectifier subsystem

dIC

L-

dt

= kpwm~conC

(7)

Inverter subsystem

dVo
Icap= c- = IB - I L
(9)
dt
Due to the decoupling action of eqn. 6, the currents of each
subsystem can be controlled independently. Based on the
above converter model and Fig. 1, one can note further
features of the three-arms converter:
(i) Noting the current flow labelled in Fig. 1, the COM-arm
carries the current difference between the REC-arm and the
INV-arm. Under unity power factor, if V, is synchronous
to Vu and Vu = V,, and when the input real power maintains balance with the output load real power, the current
difference flowing in the COM-arm will be the reactive
power and harmonic current of the load. Therefore the
power rating of the COM-arm can be lower than the other
two arms depending on the allowable power factor of the
load.
380

(14)
The first term of vConBis the equivalent control and the second term is the reachng control of VSC. The reachng control contains a feedfo,rward control signal to eliminate the
known disturbance i&,
vd and vu in eqn. 12 prevent
excessive control effort in vCod. The gain of the switching
component in the reaching control should satisfy the following inequalities to ensure aiT < 0:

k > kslILl
(15)
Once sliding mode is achieved, the sliding dynamic is governed by:
0 1
(I6)
=i
$ 0 h,]
It is obvious that the system is Hurwitze stable if h > 0, in
addition, the response speed can be specified by selection of
parameter h.

[ ep:]

I.:[

3.2 lmplem entation techniques

3.2.7Elimination of the capacitor current

sensor: Since the capacitor current is the differential of
the capacitor voltage, in the real implementation the
IEE Proc -Elelectr. Power Appl., Vol I47, No. 5. Septeriiber 2000

following modified differential is used to estimate the

capacitor current instead of direct measurement:
%cap

Ck, s
k, (1 + r s ) v o

where 0 < z << 1. To prevent pure differentiation (whch

may introduce hgh frequency noise) from degrading the
performance of the control system, the lowpass filter shown
in Fig. 2a is proposed to realise eqn. 17, which is decomposed from eqn. 17 as:
I

Gap

5 (I - --)
1
1+ r s

vo

(18)

(19)
4

Rectifier control

Fig. 3 shows the control structure of the rectifier subsystem,

where the power circuit portion in the dotted box of
Fig. 3a is plotted using eqn. 4 and the control signal vcod
of the COM-arm is generated based on eqn. 6. The inner
loop adopts the ramp comparison current mode control
technique to make the input current i, track its command
i,* closely.
The outer loop controller contains an instantaneous
power feedback controller (IPFC) and a voltage regulator.

4. I Instantaneouspower feedback controller

(IPFC)

V,=k

Volts

2-p
I+

E=

- -ksat(n,E)
( R d R j)

Fig.2 Proposed cupucitor current contro//ed VSC

a capacitor current estimation circuit

b circuit to realise sat(u, E )

3.2.2 Alleviation of chattering: During the sliding

mode, excellent features are theoretically achieved such as
fast response, good robustness and disturbance rejection. In
the proposed inverter the aim is low output impedance and
thus fast dynamics. However, the control law (eqn. 14) is
discontinuous across the switching surface so that it
requires an infmitely fast switching speed to make the sliding mode smooth. However, an infinite switching frequency
is impossible in practice due to the finite bandwidth of circuits. The finite switching frequency causes chattering.
Chattering is highly undesirable in the proposed inverter,
since it causes series voltage harmonics. A saturation function sat(a, E ) is adopted to alleviate the chattering effect;
the boundary layer width of 0 is E and determines the
tracking precision during sliding mode. The saturation
function also has the advantage of easy implementation, as
shown in Fig. 2b; only an operation amplifier (OPA) is
required.
3.2.3 Current limitation: To limit the output current
under overload conditions, a current limited control signal
kL(iE,lm,t - iB) is added to the VSC controller in eqn. 14,
where kL is a gain constant and iEJlmltis obtained from iB
by an amplitude limiter. This current lvnted control signal
is activated only when overload conditions occur.
The final VSC controller, taking into account the above
factors for real implementation, is as below:

Due to the unity power factor requirement of the rectifier

input, the instantaneous power to be fed back must be the
instantaneous fundamental real power output of the
inverter. Traditionally, calculation of fundamental real
power requires a narrowband lowpass fdter to attenuate
second and higher order harmonics. However, it does not
help to improve the response speed of the voltage loop.
To cope with t h s dfliculty, the proposed approach
shown in Fig. 3b employs a highly tuned 60Hz bandpass fdter to extract the instantaneous fundamental component iBl
of the inverter current ip iBl is then multiplied by the reference signal s(t) to produce the instantaneous fundamental
power PUl.
Because iBlis near sinusoidal, POIwdl contain a
DC component Po (related to the instantaneous fundamental real power) and a second-order harmonic component. So
a second-order bandpass fdter and subtractor can be used to
extract P,. A wideband lowpass fdter is then used to attenuate the hgh-order harmonics on Po (due to distortion of iB1)
and to scale I, with the amplitude of input current. Detailed
operation of the proposed IPFC is simulated as shown in
Fig. 4, where iB is reactive, hlghly distorted and possesses a
step change intended to examine the response speed. Fig. 4
also shows the results of the ideal and the lowpass filter
(LPF), whch show that the proposed P F C has a faster
response than the lowpass fdter and is close to the ideal.

4.2 DC voltage regulator

Traditionally PI control has been adopted to eliminate
steady-state error. Good regulating performance can be
obtained by setting the parameters of the PI controller such
that the closed-loop system has wide bandwidth. However,
as vd contains series second harmonic ripple, PI control
with wide bandwidth will result in is; containing series second-order harmonic ripple thus giving distortion of the utility current command.
The approach adopted is to add a pole to the PI controller:

k(s
s(s

--

+
+p )

2)

(20)

where p and z are positive real and p > z. The theoretic

bases can be explained with the bode plot shown in Fig. 5b,
where the PI controller is also shown for comparison, and
Hdcis the voltage loop model as indicated in Fig. 5a:

where kd, = V,,,,,/V,.

IEE Prm-Electr. Power Appl., Vol. 147, No. 5, September 2000

38 I

rectifier
subsystem

kvkpwm

a
sin wt
i

iB+

60HZ
bandpass
filter

sin.wt

igl

bandpass
filter
I

....... .. ... .

instantaneous power feedback controller (IPFC)

. . . ... . .. .. . .. .. .... ........... .... .. ., . , ...... ...................................................

voltage regulator
b

Fig. 3 Block diagram of rect$er control

a inner loop current controller

b outer loop controller

is that the bandwidth is limited by the ripple frequency

(= 2 f, Hz). However, because the voltage fluctuation is
reduced by the IPFC, the voltage regulating performance is
not critical in designing GvR.
-

ismfrom

0
41

0.02

0.04

006

0.08

0.10

0.12

0.14

+I

0.16

IPFC

_ _ _ _ _ _ _ _ _ _ _ _ _ _
*

2 -

I
I

"d

Hdc

I
002

004

006

008

010

012

014

I
I

- I

016

3
0

'a.
a6 1
0

-1

'

0.02

004

0.06

ideal

0.08

0.10

0.12

0.14

40

f, Hz

I
0.16

ripple attenuation

2.5,

IPFC

f'
Fig.5 . Voltage regulator design
a block diagram of closed voltage loop

b bode plot illustrating design of proposed voltage regulator

05

0
0

Fig.4

002

004

006

008

0.10

012

0.14

016

Swrulatwn results drmolwtrutmg operutwn of the proposed IPFC

For the PI controller, the loop response shows that the

regulating performance is in conflict with attenuation of the
ripple, since the larger the DC gain the less the ripple attenuation. The best way to overcome the ripple effect is to
increase the capacito; value so that the rippi, is reduced.
With the addition of the pole, GYRcan roll off faster than
the PI controller above the pole. It can therefore attenuate
the ripple much more than the PI controller. The trade-off
382

Experimentalverification

Based on the above theory, a 3kVA system was setup as

follows
vu = vu = 110Vrms/(60Hz),vd = 2oov, Gt,i = 1Ov/10 kHz,
cf = 940@, ks =
kv = 0.02
= 1.8mH, =
Controller parameters were designed based on the proposed approaches. Fig. 6 shows the performance of the
system for a step load change from 8Q + 15mH to 8Q.
The response of vu tracks its command vo* closely showing
4 0 p 3

0.27

IEE P r o c E l e c t r . Power Appl.. Vol. 147. No. 5, September 2000

that the inverter controlled with the proposed VSC scheme

has very low output impedance, so that the voltage dip of
v, is small and is restored quickly. The effectiveness of the
proposed IPFC is shown in the small fluctuation of the DC
voltage. Attenuation of voltage ripple can also be seen in
the trace of i, in which the voltage ripple is large after the
load change; i, however, still maintains low distortion. The
unity power factor can be observed in the waveforms of i,
(in reverse phase to input current iJ and input voltage vu.
Fig. 7 shows the response without IPFC for the same load
change. As anticipated, the voltage fluctuation is large and
restored very slowly compared with Fig. 6.

can regulate its current independently and have good performance.

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Fig. 8

System responses to a step loud c h g e with IPFC

System responses to a rectlfier nonheas load

1OOVIdiv

d
'c

1 Omsldiv

Fig.7

Voltage seguhtmg responses to a step load change without IPFC

Fig. 8 shows the responses with a nonlinear load, a full

bridge rectifier paralleled with a 680pF capacitor and a
4852 resistor. The robustness of the proposed VSC controller can be seen in the low distortion of vo during the charging period of the load current. The effectiveness of IPFC
and the DC voltage regulator is shown by the response of
vd and the sinusoidal current .,i
Fig. 9 shows the current limiting capability of the VSC;
is set to be 30A so that the load of 452
the limit level iBJimit
+ 7.5mH ensures that overload will occur. The traces of vo
show that the inverter reduces its voltage to limit the load
current. Although voltage and current distortion occur at
the inverter, the performance of the rectifier is maintained.
The above tests also prove that the proposed COM-arm
switching control is effective, so the rectifier and inverter
IEE Proc.-Eleetr. Power Appl., Vol. 147, No. 5 , September 2000

1OOV/div

..

..

..

..

1Oms/div

Fig. 9

System sespomes to overloud conu'itwn

6 Other applicationsof the three-arms rectifier

inverter

The three-arms rectifier inverter with the proposed common arm (arm-A) switching control technique can also be
applied to single phase three-wire (1 4 3w) and three phase

383

power supplies, in which the rectifier input Vu is not in

phase with the inverter output V,. The power circuit is
shown in Fig. 10. In the 1 @ 3w application, V, is controlled
to be equal to -Vu, while in the three phase application, V,
is controlled to be 120 phase shifted with Vu. In both
applications, Vu, V, and their voltage difference (Vu- V,)
provides the required three output voltages. Voltage regulation is executed by the regulation of voltage V, as is done
in the single phase system. However, the object of regulation is to balance all the voltage outputs. Regulation of V,
is done through the INV-arm (arm-B). To achieve unity
power factor, unlike the single phase system in which the
rectifier-arm is used only to rectify the input power, the
REC-arm (arm-C) here must act as an active power filter
to compensate the reactive power and harmonic current
generated by load 2 and load 3. The controllers proposed
in previous sections, including the VSC controller, IPFC
and the voltage regulator, can all be applied here.
C4

s
I

Fig.10 Single p h e three-wire ( 1 q5 3w) und three p h e power supplies

emplo.ving three-urmr rect$er inverter topology

Conclusions

This paper has proposed a switching control technique for

a single phase three-arms rectifier inverter and has detailed
the complete design of the system. A robust VSC controller, an instantaneous power feedback controller and a
ripple attenuation oriented voltage regulator are proposed
for control of the inverter and the rectifier. The resulting
system has good performance in terms of regulation of DC

384

voltage and AC output voltage even under step load

changes and nonlinear load conditions. This paper also
describes the application of the proposed three-arms rectifier inverter to single phase three wire and three phase
power supply systems.
8

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IEE Proc.-Elecrr Power Appl.. Vol. 147. No. 5, September 2000