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Laboratory 1
Logic Circuit I
Objectives:
Content:
1.
2.
3.
4.
5.
6.
AND gates
OR gates
Combining logic gates 1
Combining logic gates 2
Not gates and Boolean algebra
Logic levels
1. AND gates
After you complete these laboratory activities you should be able to:
Use AND gate circuit to determine the relationship between the inputs and outputs
Complete the AND gate truth table from experimental results.
Write a Boolean expression for a two AND gate circuit.
Use a two AND-gate circuit to construct a 3input AND gate.
Figure 1
1.3 Procedure
1.
Determine the truth table of AND gate in Fig 1 by using switches A and B to apply logic high or logic low. Lamp
F1 will be ON to indicate a 1 at the output and OFF to indicate 0.Complete the following truth table:
A
0
0
1
1
2.
3.
F1
0
0
0
1
A
0
0
0
0
1
1
1
1
4.
B
0
1
0
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
F2
0
0
0
0
0
0
0
1
Question
What is the difference between the logic circuit in Fig 1 and a 3-input AND gate?
_same circuit____________________________________________________________________________________
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
F1
F2
Questions:
Is F1 working properly?
__________________________________________________________________________
Is F2 working properly?
__________________________________________________________________________
1.5 Observations
1. What is the output of AND gate when one of the inputs is LOW?
0
2. In which case the output of AND is HIGH
all inputs are 1
3. What is the logic function of the following logic circuit?
(A*B)*(B*C)
4. Draw a logic circuit which construct the above function using only two 2-input AND gates.
2. Or Gates
After you complete these laboratory activities you should be able to:
Use OR gate circuit to determine the relationship between the inputs and outputs
Complete the OR gate truth table from experimental results.
Write a Boolean expression for a two gates circuit.
Obtain the output of the two OR-gate circuit.
2.2 Starting Up
1
2
Figure 2.1
2.1 Procedure
1. Complete the truth table
A
0
0
1
1
B
0
1
0
1
F1
0
1
1
1
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
F2
0
1
1
1
1
1
1
1
Question
What is the difference between the logic circuit in Fig 2.1 and a 3-input OR gate?
_________________________________same___________________________________________________________
____
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
F1
F2
Questions:
Is F1 working properly?
__________________________________________________________________________
Is F2 working properly?
__________________________________________________________________________
2.5 Observations
1.
In an OR gate which input is dominant (that controls the output) the 1 or the 0 the 1
2.
3.
A+B+B+C=A+B+C
4.
Draw a logic which implements the above logic function using only two 2-input OR gates.
3.1 Starting Up
1.
2.
Figure 3.1
3.2 Procedure
1.
2.
A
0
0
0
0
1
1
1
1
3.
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
F1
0
0
0
0
0
0
1
1
F2
0
0
0
0
0
1
0
1
Question
When is F3 ON? when A=B=1 or
A=C=1____________________________________________________________________
3.3 Observations
1.
Write the Boolean equations for F1 and F2 in the logic circuit in Fig 3.2 : A*B+C and
(A+B)*C_________________
2.
When input C is 1 will it control F1, F2? It will control F1,but not
F2_______________________________________________________
3.
Fig3.2
F3
0
0
0
0
0
1
1
1
4.1 Starting Up
3.
4.
4.2 Procedure
4.
5.
A
0
0
0
0
1
1
1
1
6.
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
F1
0
0
1
1
1
1
1
1
F2
0
0
0
1
0
1
0
1
Question
When is F1 ON? When either A or B are 1
_____________________________________________________________________
When is F2 ON? when either C & A are 1 or C & B are 1
___________________________________________________________________________
A
0
0
0
0
1
1
1
1
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
F1
F2
Figure 4.2
4.4 Observations
4.
Write the Boolean equations for F1 to F5 in the logic circuit in Fig 4.2 :
F1=A*B; F2=C*D; F3=A*B+B; F4=C+(C*D); F5= (A*B+B )* (C + C * D ) ;
__________________________________________________________________
5.
6.
Construct a simplified logic circuit for F5 using only one AND gate.
B*C
1.1 Starting Up
5.
6.
Connect 1 jumper to A.
1.2 Procedure
1.
Determine the output of gate 10 in fig 5.1. Then complete the following truth table:
A
0
1
2.
A
1
0
Use gates 10 and 11 to verify the Boolean law A=A. Then complete the Truth table:
A
0
1
F1
0
1
3.
Use gates 10 and 12 to verify the Boolean law AA=0. Then complete the truth table:
A
F2
0
0
1
0
4.
Use gates 10 and 13 to verify the Boolean law: A+A=1. Then Complete the truth table:
A
0
1
F3
1
1
Question
When is F2 ON? NEVER
_____________________________________________________________________________
When is F3 OFF? NEVER
___________________________________________________________________________
2. Logic levels
1.
2.
3.
2.1 Starting Up
1.
2.
Procedure
1. Short the ammeter jacks, connect a voltmeter between ground and the output of the NOT gate 14 as shown in
Fig6.1. Leave RL unconnected.
2. You are going to determine the electrical characteristics of Gate 14. This is a TTL gate and the parameters are:
VIH
VIL
VOH
VOL
IIH
IIL
IOH
IOL
The actual value of these parameters may vary with each integrated circuit chip tested. However the measurement
results must fall within the specified limits listed in the manufacturers data sheet.
3. Adjust potentiometer PS-1 to obtain: VIL=(Vps-1)/2=0V. This voltage level of 0V determines the logic 0 at
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
Measure Value
VIH
VIL
VOH
VOL
IIH
IIL
IOH
IOL
5V
0
3.415
0.3
0A
-0.24mA
-0.24mA
0