6-Sep-06

Digital Today
Smart Power Management
Tomorrow
September 2006
Stephen Pullen
Vice President System
Engineering
Primarion Corporation

Agenda
o Brief History of transistor development
o Analog PWM controllers
o CMOS Historical perspective
o System Requirements
o Digital PWM controllers
o True Digital Power Management solutions
6-Sep-06

p. 2

In the Beginning
1953 Man created the transistor
1965 Moores law postulated
1975 100K transistors on a die
1976 Silicon General introduces the industry's first PWM
controller IC, the SG1524,designer, Bob Mammano.
1976 National Semiconductor introduces the first threeterminal linear regulator designed by Bob Dobkin.
1979 GM introduced its computer-controlled closed-loop
carburetor system using a micro-processor.
p. 3

6-Sep-06

In the Middle
1970s-As of the close of the 70s, the first PC
has not been announced.
1981- 1st PC is released- Model 5150 by IBM
1982- SGS introduces the L296, the first monolithic
switching regulator.
1984- BiMOS- The power transistor was a bipolar
device and the smarts were in CMOS transistors
initially developed at Motorola
1984- Vicor released 1Mhz full brick with custom
analog chip. Design only had about 90 parts total.
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p. 4

Into the Present

1990s- Bi-CMOS becomes a preferred choice of analog PWM
controllers. CMOS is changing PWM internal architecture.
1992- Linear Technology introduces the first synchronous
switching regulator.
1998- Semtech release first monolithic multiphase controller
1999- Volterra announces a mixed signal controller for
creating multiphase circuits
2001- Primarion releases its first digital multiphase controller
2005- CMOS One billion transistors on a die

p. 5

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SG3525 Functionality- 1985

6-Sep-06

Current mode and voltage modes

Up to 500Khz operation
State of the Art
50nsec propagation delays to output Analog Bandwidth?
1.5 amp totem pole drivers
Wide bandwidth amplifier- 10Mhz
Latched logic for double pulse suppression 5 GHz
Pulse by Pulse current limiting
Soft start and max duty cycle control
Under voltage lockout
1.1mA start up current
Trimmed band gap +/-1 %
p. 6

SG3525 Block Diagram

p. 7

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1990s functionality
Similar to 1985

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PWM control- Current and Voltage mode control

Internal reference
OVP, OCP fault conditions
CMOS begins to
Current sharing
change inside architecture
Up to 1 MHz operation
of the analog control chip
Wide 10MHz bandwidth
In the 90s
Soft Start, Max duty cycle
Power good
Under voltage lockouts
Synchronous timing drives- high current output drivers
p. 8

Analog Product Exploded

Analog PWM for power supply applications
Specific chips for varied topologies
Half bridge drivers, high side drivers
Sync FET drivers, synchronous FET timing
Peak and average current mode control
Resonant PWM
Buck- Multiphase, dual phase, single phase
Battery charging applications
Cell phones
Camera, video, and handheld products
p. 9

6-Sep-06

Present Analog Architecture

Changed by CMOS
CMOS circuitry- replaces large portions of the analog design
Comparators for power good, OVP,UV etc
Clocks Timing and logic
PWM signal processing
Analog circuitry- provides interface to the CMOS circuitry
Error Amplifier, compensation, current sense, and voltage
sense are still analog circuits
Analog circuits connect the outside circuitry to the internal
CMOS functions
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p. 10

SG3525 Block Diagram

CMOS
Today

p. 11

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CMOS Historical Advancements

CMOS Driven by lithography advances:

1981 to 1998-1u to .25u

1999 to 2006- .18u to 45 nm
Maximum die size relatively constant
100 gates fit inside the diameter of a human blood cell

Moores law strongly in force since 1965.

1 Transistor: 1 dollar in 1965
1 Transistor: 1 penny in 1975- 100K per die
1 Transistor: 1/10,000 penny- 2005-1 billion per die
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p. 12

The Future of CMOS

Intel is developing 3D dimensional die stacking
By 2015- Hundreds of cores per processor die.
The cores will support 100s to 1000s of
simultaneous execution threads.
Memory to processor connections from 100s or
1000s of pins to million to 10 million connections.
Bandwidth is still increasing
All while the cost per gate is decreasing
All the while the speed is increasing
p. 13

6-Sep-06

Where are We Headed

If steel was the raw material for the 20th century, silicon is for
the 21st century. And the silicon semiconductor
industryled in large part by Intels technology advanceshas
delivered a dramatic spiral of rapid cost reduction and
exponential value creation that is unequalled in history. Because
of the cumulative impact of these spiraling increases in
capability, siliconthe raw material of the microprocessor
powers todays economy and the Internet, running
everything from digital phones and PCs to stock markets and
spacecraftand enables todays information-rich,
converged, digital world. Technology@Intel Magazine
April 2005
From Moores Law to Intel InnovationPrediction to Reality
Radhakrishna Hiremane Technical Marketing Engineer Intel Corporation
6-Sep-06

p. 14

Process and Price for

PWM Controllers
Year

Process

1980's

Analog

1990's

Size

Gates

ASP

Cent/gate

CMOS

3u to 7u

100

2.00

0%

Bi-Cmos

1u

400

2.00

0.5

60%

Present

Bi-Cmos

0.35u

3000

1.00

0.033

98%

Present

CMOS

.25u

100,000

1.30

0.0013

100%

Future

CMOS

.18u

200,000

1.00

0.00065

100%
p. 15

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Digital Trends for Power Management

I2C communication bus definition - ex. PMbus
Transistor cost still going downward
Each CMOS process improvement step can give 2x
real-estate reduction
Functionality constant at approximately half the cost
Future digital power management will take
advantage of low cost high volume CMOS processor
roadmaps
System costs with digital power management will
continue downward
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p. 16

System Power Management

Requirements
System Power management complexity continues to increase-Up to 16 POL
modules on system board required in various applications.
Timing, delays, sequencing, tracking, hot swap functionality
System characterization of processors and ASICS needs simplification
Communication of faults to system
Fault reporting of each power device
Communication with other power devices and load IC
Optimization of power consumption on system boards, dynamic phasing
Reporting of voltage, power, current, temperature parameters to system
Diagnostics- Anticipation of faults, monitoring and correcting parameter drifts
Idle modes- Management of power to meet Green Power requirements
High Transient load environments- smaller windows of deviation
High speed bus communication adaptability
p. 17

6-Sep-06

Analog and Digital Difference?

Today's PWM controllers:
First process signals in the analog domain and then
process PWM logic in the digital domain.
Process internal information externally by digitizing
signals with another device or add on digital wrappers
More costly system implementation

True digital controllers:

6-Sep-06

Convert signals immediately into the digital domain

The digitized signals are placed into registers
All subsequent signal processing is done digitally
Information can be directly communicated to the system
Less costly system implementation
p. 18

Digital Power Management

Since all information is digitized:
One can multiply, divide, filter, compensate, compare,
calibrate, store and communicate each piece of information
I2C flexibility built in- PMBus, SST, Future Bus choices easily
adapted
Specific algorithms define total functionality for power device
Asynchronous and non-linear control loop algorithms can be
easily implemented for optimal fast transient response or
advance functions
Digital power management can enable system
communication and control of power delivery to the load IC
p. 19

6-Sep-06

True Digital implementation

Provides design Flexibility
Compensation can be optimized for each rails capacitance
and inductance

All design parameters are programmable

No discrete components for design implementation
Component calibration and drift monitoring
Provides Personalization for each power stage
Each rail can be uniquely defined for its requirements
One chip can provide multi-faceted design options
Full telemetry of power stage is available to system
Full custom programmability with one standard part
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p. 20

10

Typical Block Diagram

Digital Power Management controller
SYNC_IN

SYNC_OUT

Reference
&
Oscillator

FSET
VSET

DAC

IOUT/ISH
ISH_GND

VTRIM

Voltage
Sense

VSENP
VSENN
V12SEN

Temp
Sense

TEMPSEN
ISENP

PID/PWM
Controller

ADC

MUX

PWM

Current
Sense

ISENN
IMAXSET
SCLK
SDATA

SMBus

SADDR

VCC

Non-Volatile Memory
(NVM)

SMB_AL_N

Fault
Handler

OUTEN

FAULT1
FAULT2

State Machine

PWRGD

p. 21

6-Sep-06

Basic Buck Circuit Block

+5V to +12V
+5V

R1

SDATA

PMBus I/F

V12SEN

SCLK

VCC

SMB_ALRT_N

Power
Management
I/F

PX7510
PWRGD

R2

GND

OUTEN

2 BOOT

PWM

Multiphase
Operation

3 PWM

PHASE 8

VOUT

EN 7
VCC 6
RB

SYNC_IN
SYNC_OUT

1 UGATE

4 GND
4.7F

TEMPSEN

LGATE 5
RCM

CB

D1

LOAD

ISENN

Fault
Outputs

FAULT1
FAULT2

ISENP

RSENSE

VSENP
VSENN

I-share

IOUT/ISH

SADDR

ISH_GND

VSET
FSET
VTRIM
IMAXSET

6-Sep-06

RTN

Very Few Parts - Driver, FETS, inductor

capacitors, snubbers and current sense:
enable high density power solutions
p. 22

11

Multiphase VRM Circuit

Digital provides key

Solutions with Low
Part Content

p. 23

6-Sep-06

System Implementation
System
Management

System
Supervisor

12 volt Bus
Digital

System
Bus

Manager

Local Control Bus (i.e. PMBus)

6-Sep-06

POL
5.0V

POL
3.3V

POL
1.5V

POL
1.5V

POL
1.8V

POL
1.8V

Multiphase VRD

Chip 1

Chip 2

Memory

Memory

Memory

Memory

Processor

Analog
Digital
Analog
Digital
Systems
Systems
Systems
Systems
with Tomorrow
Digital
Today
Today
Manager

p. 24

12

Summary
Analog power management has been central to power
management growth in the past but must adapt to the
future.
Digital power management solutions will continue to take
advantage of the CMOS lithography advancements using
low cost, high volume processes.
Digital power management has the scalability and
flexibility to innovate future system solutions
Smart digital power management will enable lower
cost system implementation with intelligence that
will grow with the increased complexity of
power delivery
6-Sep-06

p. 25

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