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522
Adaptive
MARC G. DEGRAUWE,
JOZEF
Biasing
RIJMENANTS,
OF SOLID-STATE
CIRCUITS,
CMOS Amplifiers
ERIC A. VITTOZ,
MEMBER,
.13E2!!Lv+
I&
power dissipation
amplifiers
of amplifiers.
The reported
micropower
OUT
1I,ut
CL
_
by
4n
$JN+
IPI
The gain-bandwidth
1. INTRODUCTION
IEEE, AND
AbstractTwo
transconductance amplifiers are presented in which
the concept of an input dependent bias current has been introduced.
As a result, these amplifiers combine a very low standby power dissipation with a high driving capability.
The first amplifier, suited for SC
filters, is fairly small (0.075 mm2 ) and has a slew rate which is more
than an order of magnitude better than micropower amplifiers presented earlier.
The second amplifier can be used as a micropower
buffer. Nearly the whole supply current is used to charge the load capacitor so that this amplifier has a high efficiency.
(1),
input
where
product
(GBW)
amplifier.
of the amplifier
is given
transistors,
b is the ratio
between
the current
of the
in the sec-
nal characteristics
plications.
Therefore,
dynamic
amplifiers
were introduced.
.b/4.
GBW=gm
n.C1.
(1)
transistors
the maximum
achievable
current source.
This paper presents two amplifiers, the bias current of which
is made signal dependent so that the power consumption is re-
GBW=blP/(n
4-n
Cl
VT)
(2)
duced further.
Section II describes the characteristics of a basic transconductance amplifier (OTA) on which the adaptive biasing amplifiers are based.
AMPLIFIER
formed
of the input
poles:
impedance
IPIC1.
SR=4.
output stage.
has two important
is given by (3)
(3)
the current
ITS LIMITATIONS
OTA
By eliminating
AND
The transconductance
amplifier (presented in Fig. 1) consists of a differential input stage and a double to single ended
This
T/q.
are
THE TRANSCONDUCTANCE
VT=k
the dominant
of the
0018 -9200/82/0600
VT. GBW
(4)
s 600 mV GBW.
pole,
by the transconductance
m.rZ.
Note that (4) has also been given by Solomon [8] for bipolar amplifiers where n = 1. To increase the slew rate in those
amplifiers,
and keeping the GBW constant,
the gn/IP ratio is
decreased
[9],
[10]
done by using
ever,
this
tions
where
minimal
In MOS
the input
solution
is not
one wants
possible
amplifiers
transistors
satisfactory
to have
this
in strong
for
is limited,
current
source,
bance
of
-0522 $00.75
the
be
How-
micropower
the maximum
applica-
GBW with
the
current.
can easily
inversion.
current
virtual
@ 1982 IEEE
ground
of which
becomes
increases
larger.
distur-
principle
DEGRAUWE
et al.: ADAPTIVE
BIASING
realizations
III.
biasing
are discussed
DIFFERENTIAL
CMOS AMPLIFIERS
amplifier
in Sections
FEEDBACK
523
12
of which
A.(12-1,)
AMPLIFIER
i!_bE!4
A. Principle
When a voltage is applied across the inputs of the OTA (Fig.
1) the currents II and 12 become different.
The bias current
,,+
v
M8
of the amplifier is made signal dependent by adding an additional current source to the main tail current source which realizes A -111-121.
factor.
The additional
,+MILL , M5
1P
.
feedback
1----
+n
OUT
mirrors,
we obtain
the circuit
I
Fig. 3. Differential
in
feedback amplifier.
Iryj/Ip
2
feedback amplifier.
A.2
11 and 12 are equal and the total bias current is thus 1P. When
a signal is applied, the total bias current will be 1P + A .111 - Iz 1.
B. Available Output Current
By using the current formula for the weak inversion region
proposed by Vittoz
and Fellrath
[11]
and by applying
Kirchhoffs
fin is the
. VT))
1P . exp (fifl/(rt
1-
VT))
11=
(A+
1)-
(A - 1) exp (~n/(n
(6)
Vinl nVT
~VT))
The current
the difference
0= (A
(exp
(Kn/(n
(7)
VT)) b
of ~~/(n
VzT)
steps.
never slew.
The previous
tracters.
10.
becomes unlimited,
The output
current
the maxi-
for a
will be investigated.
account the subtractw
matched
sub-
A (11 - c1 12)
A o(12 -
C2 . 11),
the input
=C2 =c.
the current feedback circuit will not
voltage
Vmi~ = -n - Vr in (c).
v .,CaPe= n o VT oin ((A + 1)/(A - l)).
C. Effects of Mismatch
VT))- 1)
determined
voltage.
indi-
(9)
(8)
For a mismatch
of 20 percent (c=
IEEE JOURNAL
524
OF SOLID-STATE
CIRCUITS,
TABLE I
MASK DEVICE DIMENSIONSDIFFERENTIALFEEDBACKAMPLIFIER
Dimension
WX 2 [pm]
Device
3,4,11,12,13,14
1,2
5,8
6.7
9,10
15, 16, 17, 20, 21,22
18, 19
introduce
modified
Ibis,
For
20
264
20
44
5
17
34
10
10
30
30
40
18
18
20x
120 x
60 X
60 X
10 x
14x
28x
Weak-inversion limit
P. V$ [nA]
the steady-state
bias current
is
to
= Ip/(l
(1 -
some combinations
c)).
of the effective
which
(lo)
as a function
of the mismatch
(c= 0.8),
the
feedback
is dc unstable.
current
factor.
effective
For a mismatch
current
The
of 20
factor
A
Fig. 6. Photograph of differential
In order
to
obtain
good
feedback amplifier.
matching
between
the
current
mirrors,
Further,
geometry, 2) the same neighborhood, and 3) the same orientation on the chip. Only the current mirror of the tail current
source makes an exception to the last rule.
and overlap
and kf14.
capacitance
The amplifier
source provided
on chip; the
ratio b of unity
a minimal
for compensation.
For
F. Experimental
Results
the configuration
the amplifier
equilibrium
pendently
It is
as a function
Vi~,
increases.
drastically.
The total supply current, as a function of fin, is represented
in Fig. 9 for three different values of bias current 1P. Biased
E. Layout
The amplifier
consumption
is integrated
technology.
The total area is 0.075 mmz, which is comparable
to that of state of the art CMOS op amps, and this in spite of
the fact that the adaptive biasing part takes about 20 percent
of the total amplifier area. Table I shows the device dimensions and the corresponding weak inversion limits.
Fig. 6
and the betas of the transistors, is about 300 MA. This maximum supply current determines the maximum rate of change
of the output voltage.
shows a photograph
of the amplifier.
DEGRAUWE
f
&
et al.: ADAPTIVE
BIASING
CMOS AMPLIFIERS
525
v+
TABLE II
SMALL SIGNAL CHARACTERISTICS
I~Up
(a)
vm ~
lP=l
PA
v ~upsv
OUT
Gain
IOU+
64 dB
Offset
3.68 mV+4mV
Noise
A-
190 nV/@
60 nV/@
1 kHz
10 kHz
CMRR
62 dB
PSRR V+
v_
63 dB
44 dB
0.25 V/I.M
DUT
GBW
[Hz]
1P=3PA
>IP=IPA
IOU+ [PAI
IP=0.3PA
0.1--
lOOkI
o
0.5
1.0
[Vp+-pl
vi
0.05..
of input amplitude
IP=O
Measured values of the most important small signal characteristics of the amplifier are listed in Table II. The negative
o
0
40
Vin
[mVl
-0.05-
of the amplitude
product
of the amplifier
signal.
The -3 dB breakpoint frequency was measured using an oscilloscope, so these figures must be interpreted carefully since
-0.1-
they include the higher harmonics of the output signal. However, one can see that the gain-bandwidth
product increases
with the amplitude of the input signal up to a certain maximum. This maximum occurs when the maximum current is
r%~
..
flowing
10-4,
through
rent amplifier,
the amplifier.
the gain-bandwidth
product
DIRECT
FEEDBACK
AMPLIFIER
10+ ,
The
direct
micropower
made
feedback
buffer
for
so that nearly
amplifier
large
the whole
is designed
capacitive
supply
loads.
current
to be used
The
as a
design
is
is used to charge
10-6-
A. Principle
Fig. 11(a) represents the scherhe of the amplifier.
show the simple transconductance
Fig. 9. Supply current as a function
With
tion
the
amplifier
as shown
connected
in Fig. 7(b)
follower
a capacitive
configuraload
of 470
Thick lines
discussed above.
in voltage
and with
amplifier
of
= ~ (lP +A
=12
=10
(11)
~1(2))
=IP/(2-
and (12).
A).
(12)
526
IEEE
JOURNAL
OF SOLID-STATE
t%
z
CIRCUITS,
VOL.
SC-17,
NO. 3, JUNE
1982
(a)
v+
M6 F18
M2
AI1j
/11
,+ jlOAI1
I-
j!j
~7 ~9 ~N-
IOAI1
TABLE III
MASK DEVICE DIMENSIONSDIRECT FEEDBACKAMPLIFIBR
poIp
]AII
llP
Ml
~_
M13
M3 M5
Mll
Dimension
(b)
100 x
lox
50x6
300X
30X
21 x
1, 13
3,5,11
7,9
2
4
6, 8
ing two
halves.
integrated
device
Fig.
The
of the input signal.
Stability
feedback
1P
11 (2)=
~~~+
(13)
VT))
1P (exp (~n/(n
Notice
amplifier,
voltage.
VT))-
1)
.~
(14)
1-
(A - 1) exp (~n/(rr
VT))
amplifier
13 is a photograph
dimensions
The total
of the amplifier.
as the first
It is
amplifier.
The
weak inversion
amplifier
is designed
(>100
pF).
output
stage transistors
problems.
times
This
makes
C, Experimental
charge
large
limits
is about
capacitive
loads
to le~gth ratio
of the
possible
without
flowing
in the output
The current
the internal
to
a large width
current
resulting
running
into
stability
stage is about
15
in a high efficiency.
Results
12
12
12
nvT
200
20
200
200
20
14
12
12
Weak-inversion limit
B v; [nAl
WX 1 [~m]
Device
sured.
of 20 vA/V
is mea-
feedback
V.
CONCLUSIONS
escape
In this paper two
amplifiers
regulate
B. Layout
DEGRAUWE
et al.: ADAPTIVE
BIASING
CMOS AMPLIFIERS
50.
..------ kup
,.,.,
I OUt
527
V(n
I [pA]
------- . .
ancmc
-------- -- 0
-1oo
V.
T
, ,C
100
V,n
[mV]
(a)
(b)
signal.
~ d(vo
The first
amplifier
for
the
pair
equations:
If.)
ain
dt
~.d(vo-
dfin
C.
dt
(A2)
~n)+uo.c.~+~+~(vin)=o
dt
dt
sampled data
in SC integrator.
(A3)
where
fin
feedback
1) The
glected
2)
to be able to study
with
work
most
slew
R=
Early
rate
factor
dljn
can be ne-
of the output
is close to one.
level,
in strong
resistance
amplifier
stage.
(This
guaran-
current
are assumed
of the differ-
have to be made.
of the
of the time
The output
some assumptions
constants
feedback
For an increasing
put transistors
4)
time
respect
The current
tees a sufficient
3)
amplifier
internal
the input
inversion.
to always
work
of the amplifier
transistors
Therefore,
in strong
dt
_
a+ann+a
.v&
/qnl
(A4)
where
al = step
will
Early
I.C1
the in-
VEarlY + b . beta
inversion.
can be modeled
by
(Al)
I+i
a2=-
I.C1
.1P
(1+CZin)
CI)
b . beta
a3=-_
2.C,
Cl=c.
(ao+z%)
through the output stage.
This formula, represented in Fig. 16 has only one point
An SC integrator, during the integrating phase, using a differential feedba~k amplifier can be modeled by Fig. 15. The be- - where the derivate is equal to zero. This is an equilibrium
IEEE JOURNAL
528
point since for Vin larger than Veq the derivate is smaller than
zero and thus the input will decrease until
Ve~ is reached.
For
Vin smaller than Veq, the derivate is larger than zero and thus
the input will increase until V,q is reached.
REFERENCES
[1]
[2]
[3]
[4]
[5]
[6]
[7]
[8]
[9]
[10]
[11]
Marc G. Degrauwe was born in Brussels, Belgium, on August 16, 1957. He received the
E.E. degree from the Katholieke Universiteit
Leuven, Herverlee, Belgium, in 1980.
During the summer of 1980 he was on leave
at Centre Electronique
Horloger S.A., Neuch~tel, Switzerland, where he was involved in
the development
of micropower
amplifiers.
He is working towards a Ph.D. degree on micropower sample data filters.
He also has an
LW.O.N.L.
Fellowship
which allows him to
work as a Research Assistant at the ESAT Laboratory, Katholieke Universiteit Leuven.
OF SOLID-STATE
CIRCUITS,
Hugo J. De Man (M81) was born in Boom, Belgium, on September 19, 1940. He received the
electrical engineering degree and the Ph.D. degree in applied science from the Katholieke
Universiteit Leuven, Leuven, Belgium, in 1964
and 1968, respectively.
In 1968 he became a Member of the Staff of
the Laboratory for Physics and Electronics of
Semiconductors at the University of Leuven,
working on integrated circuit technology. From
1969 until 1971, he was at the Electronic Research Laboratory, University of California, Berkeley, as an ESRONASA Postdoctoral
Research Fellow, working on computer-aided
devices and circuit design. In 1971 he returned to the University of
Leuven as a Research Associate of the Belgian National Science Foundation (NFWO).
In 1974 he became a Professor at the University of
Leuven. From 1974-1975, he was Visiting Associate Professor at the
University of California, Berkeley. His current field of research is the
design of integrated circuits and computer-aided design.