Documenti di Didattica
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EXPERIMENT NAME
Page No.
1.
2.
15
3.
Characteristicsof CE Configuration/
19
4.
Characteristics of CB Configuration
25
5.
Characteristicsof
Transistor
31
6.
Characteristicsof
Transistor
Field/
U
ni
Effect
unction/
35
SECOND CYCLE
7.
39
Rectifier (SCR)
8. UJT relaxation oscillator
9.
45
51
55
61
67
1 Mi = lOOOOOOii.
The Resistor
Colour
Number
Black
Brownl
Red
Orange
Yellow
Green
Blue
Violet
Grey
White
390 - 39 = 351A and 390 + 39 = 429ii (39 is 10% of 390). A special colour code is
used for the fourth band tolerance: silver 10%, gold 5%, red 2%, brown 1%.
If no fourth band is shown the tolerance is 20%.
Major blocks:
1. Cathode ray tube (CRT)
2. Vertical amplifier
3. Horizontal amplifier
4. Sweep generator
5. Trigger circuit
6. Associated power supply..
1. The cathode ray tube is the heart of the CRO providing
visual display of an input signal waveform The CRT is
enclosed in an evacuated glass envelope to permit the
electron beam- to traverse in the tube easily. The main
functional units of CRO are Electron gun assembly
Deflection plate unit & Screen..
2. Vertical Amplifier amplifies the signal at its input prior to
the signal being applied to the vertical deflection plates. It
is the main factor in determining the bandwidth and
sensitivity of an oscilloscope.. Vertical sensitivity is a
measure of how much the electron beam- will be deflected
for a specified input signal. On the front panel of the
oscilloscope, one can see a knob attached to a rotary switch
Fluorescent screen.
anode and hence the brightness of the spot on the screen. The
control grid, which has a negative potential, controls the electron
flow from- the cathode and thus controls the number of electron
directed to the screen.. A cathode containing an oxide coating is
heated indirectly by a filament resulting in the release of electrons
from- the cathode surface. Once the electron passes the control
grid, they are focused into a tight beam- and accelerated to a
higher velocity by focusing and accelerating anodes. The high
velocity and well-defined electron beam- then passed through two
sets of deflection plates. An evacuated glass envelope with a
phosphorescent screen which glows visibly when struck- by
electron beamOPERATION:
The four main parts of the oscilloscope CRT are designed to create
and direct an electron beam- to a screen to form- an image. The
oscilloscope links to a circuit that directly connects to the vertical
deflection plates while the horizontal plates have linearly
increasing-charge to form-a plot of the circuit voltage over time.
In an operating cycle, the heater gives electrons in the cathode
enough energy to escape.. The electrons are attracted to the
accelerating anode and pulled through a control grid that
regulatesthe number of electrons in thebeam/, a focusing-anode
that controls the width of the beam, and the accelerating anode
itself. The vertical and horizontal deflection/ plates create electric
fieldsthat bend thebeam of electrons. The electrons finally hit the
fluorescent screen, which absorbs the energy from the electron
beam and emits it in the form of light to display an image at the
end of the glass tube.
PRACTICE PROCEDURE:
In measuring the voltage/, always measure the value from the center ofthe
trace toitspeak/. This "peak voltage"' ishalf the peak- to-peak/ voltage,
which/ is the full height of the trace on the CKO screen.
under
forward
and
reverse
bias
condition/
and
to
Diode
TYPE
RANGE
IN 4001
Resistor
Voltmeter
MC
MC
(NO.S)
1
1 kQ
(0 - 2V)
One from/
each
(0 - 30V)
Ammeter
QUANTITY
Connecting wires
Required
FORMULA USED:
DC (or) Static Resistance (Rf) = Vf / If Q
AC (or) Dynamic Resistance,
Tf
= AVf /
A If Q Where,
AVf - Change in Voltage in forwardbias condition inVolty
IffmA)
THEORY:
A PN junctton/ diode conducts only in one direction/. It is
an example of unilateral/ element. The V-I charactertsttcs of the
Breakd
'own
WltagejVBp)
Vf(V)
VrfV)
Reverse Voltage
in Volts
vwwwwvm *
Cut in voltage,(Vy )
Ir(uA)
diode are curve between voltage across the diode and current
through/ the diode. When external voltage is zero, circuit is
open and the potential barrier does not allow the current to
flow. Therefore, the circuit current is zero-. When P-type (Anode
is connected to/ +ve terminal and N type (cathode) is connected
to/ -ve terminal of the supply voltage, is known as forward bias
The potential barrier is reduced, when diode is in the forward
biased
barrier
condition/.
At
some
altogether
flowing/through/
diodeissaidtobe
the
forward voltage,
eliminated
diode
inON
and
state
and
potential
current
also/in
The
the
the
current
starts
circuit.
The
increases
An idealPN junction Diode is a two terminal polarity sensitive device that has
zero resistance (diode conducts) when it is forward biased and infinite
resistance (diode doesnt conduct) when it is reverse biased. Due to this
charactertstic, the diode finds number of applications as 1. Rectifiers in DC
power supply, 2. Switch in digital circuits, 3. Clamping, Clipping/ circuits
network/ used in TV Receiver, 4. Demodulation (detector) circuits
PROCEDURE:
RESULT:
1
5
TABULATION:
FORWARD BIAS
Sl.No
1.
2.
3.
4.
5.
6.
Vf (V)
R EV ERSE BIAS
If (mA)
Sl.No
1.
2.
3.
4.
5.
6.
Vr (V)
Ir(mA)
7.
7.
TYPE
RANGE
QUANTITY
(NO.S)
Zener Diode
9.2 V
Resistor
1 kQ
Voltmeter
MC
MC
Ammeter
MC
(0 - 2 V)
(0 - 10V)
(0 - 50mA)
(0 - 30V)
One from
each/
1
1
1
Required
THEORY:
A zener diode is heavily doped p-n junction/ diode, specially made to
operate in the break/ down region. A p-n junction diode normally does not
conduct when reverse biased. But if the reverse bias is increased, at a
particular voltage it starts conducting/ heavily. This voltage is called
Break down Voltage. High/ current through/ the diode can permanently
damage the device to avoid high/ current, In Zener diode the reverse
breakdown occurs at low voltages, sotheflow ofheavy current can be
avoided. Oncethediode starts conducting it maintains almost constant
voltage across the terminals whatever may be the current through/ it, V.e.,
it has very low dynamic resistance/. It is used in voltage regulatorsV-I
V Vs I
Forward current in mA
JF(iQLA) j
'
Finvaidllua Condi tm
Y.ffdts!
Reverse Voltage in
Volts
V. [Volts]
VBD
PROCEDURE:
RESULT:
Thus the forward and reverse V-I characteristics of the Zener diode were obtained
and the characteristics curves were plotted
CIRCUIT DIAGRAM:
BULATION:
Input Characteristics
Sl.No.
CE1 (V) =
CE2 (V) =
IB (^A)
VBE (V)
IB (^A)
VBE (V)
1.
2.
3.
4.
5.
Output Characteristics
I
Sl.No.
B1
(^A) =
VCE (V)
1.
2.
3.
4.
5.
^A
IC (mA)
B2 (^A)^A
VCE (V)
VCE (V)
B3 (^A)^A
IC (mA)
VCE (V)
O.
1 Bipolar Junction
TYPE
RANGE
SL 100
QUANTITY
(NO.S)
1
Transistor
2 Resistor
1 kQ,
3 Voltmeter
MC
4 Ammeter
MC
33 kQ
(0 - 2 V)
6 Bread Board
7 Connecting wires
FORMULA USED:
Input Impedance= AVEB / A IB Q
Output Admittance= A IC / AVCE mho
Current Gain= A IC / A IB
1
Required
Output
Characteristics:
VBE Vs IB
VCE Vs IC
*** Note VCE1 < VCE2 < VCE3 Similarly IB1 < IB2 < IB3
THEORY:
A transistor is a three terminal device. The terminals are
emitter, base, collector. In common emitter configuration, input
voltage is applied between base and emitter terminals and output
is taken across the collector and emitter terminals. Therefore the
emitter terminal is common to- both input and output. The input
characteristics resemble that of a- forward biased diode curve
This is expected since the Base-Emitter junction of the transistor
is forward biased. As compared to CB arrangement IB increases
less rapidly with- V BE. Therefore input resistance of CE circuit is
higher than- that of CB circuit. The output characteristics' are
drawn between Ic and VCE at constant IB. the collector current
varies with VCE unto few volts only. After this the collector
current becomes almost constant, and independent of V CE. The
value of V^ up to which- the collector current changes with V' is
known as Knee voltage. The transistor always operated in the
region
above
Knee
voltage,
Is
always
constant
and
is-
approximately equal to I.
PROCEDURE:
RESULT:
Thus the input and output ( V-I ) characteristics of a transistor were obtained
BULATION:
Input Characteristics
Sl.No
CB
1(V) =
VCB2(V)
VBE (V)
IB (mA)
VBE (V)
IB (mA)
1.
2.
3.
4.
5.
Output Characteristics
I
Sl.No
E1 (mA) =
VCB (V)
mA
IC (mA)
E2 (mA) =
VCB (V)
mA
IC (mA)
E3 (mA)=
VCB (V)
mA
IC (mA)
1.
2.
3.
4.
5.
APPARATUS REQUIRED:
O.
TYPE
RANGE
Junction SL 100
QUANTITY
(NO.S)
Transistor
Resistor
Voltmeter
Ammeter
1 kQ
MC
MC
MC
(0 - 2 V)
(0 - 30V)
(0
50mA)
(0 - 30V)
Bread Board
Connecting wires
FORMULA USED:
Input Impedance= AVEB / A IE Q
Output Admittance= A IC / AVCB mho
Current Gain= A IC / A IE
2
1
1
2
2
1
Required
MODEL GRAPH
:
output
Input
characteristics:
characteristics:
Base
Current
Collector
Current m
mA. Ic (mJ
THEORY:
Bipolar
Junction/
Transistor
Emitter baseVoltage
111
Volts
VEB (V)
0 CoUectorBase
(BJT)
VCB (V)
voltage m Volts
is
three-terminal
semiconductor
device capable of
amplifying
three
terminals
signal.
layers
material.
BJTs
consist
of
made
thin/
up
The
The
is
ac
device
an/
base
three
layer
forward
biased.
The
output
characteristics,
often
called
the
collector
I E.
PROCEDURE:
1. Identify the Emitter, Base and Collector terminals of the transistor given and
set up the circuit on breadboard as shown in ffigure.
1. Wire the circuit as shown in figure/. By keeping the output voltage (Collector
Voltage) constant and varying the input voltage (Emitter Voltage) ammeter
and voltmeter readings are noted down.
RESULT:
Thus the input and output ( V-I ) characteristics of a transistor in
CB configuration were obtained and the characteristics curves
were plotted.
TABULATION:
Transfer Characteristics
Sl.No
DS1(V) =____________(V)
VGS (V)
ID (mA)
(V)
DS2(V) =
VGS (V)
ID (mA)
1.
2.
3.
4.
5.
Drain Characteristics
Sl.No
1.
2.
3.
4.
5.
GS1(V) =
VDS (V)
ID (mA)
VDS (V)
GS2(V) =
ID (mA)
APPARATUS REQUIRED:
S.NO.
TYPE
1 FET
QUANTITY
RANGE
(NO.S)
BFW10/11
2 Resistor
1
1 kQ
3 Voltmeter
D.C
4 Ammeter
D.C
(0 - 5V)
(0 - 100V)
(0 - 50mA)
D.C
(0 - 30V)
2
One from
each,
1
6 Bread Board
2
1
7 Connecting wires
Required
THEORY:
A
FET
is'
three
terminal
device,,
having
the
Sourcejunction
of
the
FET
s'ai rways'reverse,
biased.
In
response to small applied voltage from drain, to source, the ntype bar acts as sample resistor, and the drain current increases
linearly with, V vs. With increase in, I the ohmic voltage drop
between the source and the channel region reversebiases the
Transfer
Characteristics
Drain
Characteristics
VGS(V) VS Io(mA)
Y
VDS(V) VS ID(mA) Y
PROCEDURE:
1. Identify the terminals of the FET given and set up the circuit
on breadboard asshown in figure/.
2. Wire the circuit as shown in figure/. By keeping-the Gate
Source voltage constant and varying- the Drain Source
voltage, I readings are noted dow n
3. Wire the circuit as shown in figure. By keeping-the Drain
Source voltage constant and varying- the Gate Source
voltage/, I readings are noted dow n
4. The
above
procedure
was
repeated
RESULT:
and
ammeter
and
TABULATION:
VRBI =
Sl.No
1.
2.
3.
4.
5.
VE (V)
BB2 =
IE (mA)
VE (V)
IE (mA)
TYPE
2N2646
2 Voltmeter
MC
3 Ammeter
MC
'Uni-Junction
RANGE
QUANTITY
(NO.S)
1
(0 - 30V)
(0 - 50mA)
(0 - 30V)
2
1
1
1
Required
semiconductor device that has only one junction/. The UJT Uni-Junction Transistor (UJT) has three terminals emitter (E) and
two bases (B1 andB2). The base is formed by lightly doped ntypebar of silicon. The emitter is of p-type and it is heavily
doped. The UJT, is a simple device that is essentially a- bar of N
type semiconductor material into which P type material has
been diffused somewhere along its length. The UJT is biased
with a positive voltage between the two bases. This causes a
potential drop along the length of the device. When the emitter
voltage is driven approximately one diode voltage above the
voltage at the point where the P diffusion (emitter) is, current
wdlbegin to flow from the emitter into the
base region. Because the base region is very lightly doped, the
additional current (actually charges in the base region) causes
(conductivity modulation) which reduces the resistance of the
portion of the base between the emitter junction and the B2
terminal. This reduction in resistance means that the emitter
junction is more forward biased, and so even more current is
injected. Overall, the effect is a negative resistance at the emitter
terminal. This is what makes the UJT useful, especially in simple
oscillator circuits.
PROCEDURE:
1. Identify the terminals of the transistor given and set up the
circuit on breadboard as shown in figure..
2. Wire the circuit as shown in figure.. By keeping-the Base Base voltage (V ) constant and varying- the Emitter Voltage
ammeter readings are noted down.
3. The above procedure shall be repeated for different V and
current readings can be taken.
4. VI characteristics curves were drawn..
RESULT:
Thus the V-I characteristics of the UJT were obtained and the
characteristics curves were plotted.
TABULATION:
Sl.No
1.
2.
3.
4.
5.
3.
7
.
Vf(V)
If(mA)
APPARATUS REQUIRED:
S.NO.
SCR
Resistor
TYPE
TYN6
16
Voltmeter
D.C
Ammeter
D.C
THEORY:
QUANTITY
RANGE
(NO.S)
1
1 kQ
One from/
each/
10
(0
300V)
(0
100mA)
(0 - 30V)
1
2
1
1
Required
MODEL GRAPH:
A Silicon Controlled Rectifier ( S C R ) is 3 terminals
consisting of four semiconductor layers forming a P N P N
mA
current
in mA
IH
O
Vr (V)
Reverse
voltage
in Volts
Ir 1mA)
V
H
V BO
Forward
Vf (V
)
oltag
volts
Reverse current
in mA
*** VBO - Break Over Voltage IHO - Holding Current IL - Latching current IG - Gate
curren
ji
n
p
device starts
conducting(ON state) the
light-
dimming
control,
heater
control,
battery
charger,
1. Identify the terminals of the SCR given and set up the circuit
on breadboard asshown in figure..
2. Wire the circuit as shown in figure By keeping the Gate
voltage
constant
and
varying
the
Anode
and
Cathode
RESULT:
TABULATION:
S.No.
Charging Time,
tc(ms)
DisCharging Time,
td(ms)
Amplitude,Vc(V)
UJT
Resistor
Capacitor
TYPE
RANGE
2N2646
QUANTITY
(NO.S)
1
15 kQ
One from
220 kQ, 33Q
each
0.1 |aF
1
CRO
Bread Board
Connecting/wires
Required
FORMULA USED:
Chargingtime of capacitance,
T = RC l n [ (E - Eo)/E - EC]
E - Supply voltage
Eo- Initial capacitor voltage
Ec- Capacitance voltage
THEORY:
MODEL GRAPH:
Capacitor
Voltage in
Volts, Vc(V)
t
d
tc
td
Charg mg time
Discharg ing time
PROCEDURE:
1. Connections are given asper the circuit dia/gram/.
2. Positive biasing' voltage is given to the Emitter and Base-2
terminal.
3. The charging-and discharging- time of capacitor isobserved
from- the output waveform of CRO.
4. Positive output waveform of B1 andB2 are obtained.
RESULT:
APPARATUS REQUIRED:
S.NO.
TYPE
QUANTITY
RANGE
(NO.S)
Photo Diode
TABULATION:
Reverse Bias
Forward Bias
Sl.No
V (V)
I (mA)
Sl.No
Dark
1.
2.
1.
3.
2.
4.
3.
5.
4.
6.
5.
7.
V (V)
3.
7
.
I (^A)
Bright
Resistor
1 kn
Voltmeter
D.C
(0 - 2V)
(0 - 30 V) One from each
Ammeter
D.C
(0 - 50mA)
One from each
(0 - 250 |a A)
(0 - 30V)
Bread Board
1
1
Connecting wires
Required
FORMULA USED:
Variable resistance used TR = VD / ID Q
THEORY:
A photo Diode is a two terminal PN junction device which
operates in a reverse bias. It has small transparent window,
which allows light to strike the PN junction. A photo diode
d i f f e r s from a rectifier diode in a sense that its reverse current
increases with the light intensity at the PN junction. When there
is no light incident the reverse current is almost negligible and is
called the dark current. An increase in the amount of light
energy produces an
V Vs I
PROCEDURE:
1. Identify the terminals of the Photo Diode given and set up
the circuit on breadboard asshown in figure.
2. Wire the circuit as shown in figure. By varying/ the input
voltage/, the ammeter and voltmeter readings are noted
dow n for forward bias condition.
3. Wire the circuit as shown in figure. By varying the input
voltage/ the ammeter and voltmeter readings are noted
down for reverse bias condition
4. VI characteristics curves were drawn.
RESULT:
Thus the forward and reverse V-I characteristics of a Photo D iode were obtained
and the characteristics curves were plotted.
Step-down Transformer
(12 - 0 - 12V)
P
TABULATION:
Half Wave
ifier
Full Wave
ifier
(V)
(V)
(mS)
uF
T (mS)
Ripple
Charging
Discharging
Vm
Ripple
uF
T (mS)
Charging
Discharging
9.
AIM:
To construct half wave & full wave rectifier circuity
using diodes & observe the input & output wave formswith
& without filter.
APPARATUS REQUIRED:
S.NO.
1 Diode
TYPE
IN 4001
3 Capacitor
100 pF,33 pF
Step-down
QUANTITY
(NO.S)
4
1 kQ
2 Resistor
4 Transformer
RANGE
230 V /
(12 - 0 - 12) V
One fromeach
1
5 CRO withProbe
6 Bread Board
7 Connecting wires
THEORY:
HALF-WAVE RECTIFIER:
Required
Figure showy a basic half-wave diode rectifier circuit. During the positive
half-cycle of the input voltage, the diode is forward- biased for all
instantaneous voltages greater than the diode cut- in voltage Vy. Current
flowing through the diode during the positive half-cycle produces
approximately a half sine wave of voltages across theload resistor,
asshownin theFigure To-simplify our discussions, wewillassume that the
diode is ideal and that the
peak input voltage is always much larger than the VY of the diode.
FULL-WAVE RECTIFIER:
Figure shows' a full-wave bridge rectifier with a load resistor RL and an input
sine wave derived from a transformer. Vuring'the positive half-cycle of the
input voltage, diodes' V2 and V3 are forward biased and diodes V1 and V4
are reverse biased. Therefore, terminal A is positive and terminal B is
negative, as shown in Figure.. Vuring'the negativehalf-cycle, diodesDl andV4
conduct, and again terminal A is positive and terminal B is negative. Thus, on
either half-cycle, the load voltage has the same polarity and the load current
is in the same direction, no matter which pair of diodes is conducting'. The
full-wave rectified signal is shown in Figure, with the Vo being' the output
voltage. Since the area under the curve of the full-wave rectified signal
istwicethat of the half-wave rectified signal, the average or dc value of the
full-wave rectified signal, Vdc, is twice that of the half-wave rectifier.
PROCEDURE:
1. Circuit connections were given as per the circuit diagram.
2. Input waveforms magnitude and frequency was measured
withthehelp of CKO.
3. Supply is switched ON and the output waveform was
obtained in theCKO.
4. Output
waveforms'
magnitude
and
time
period
was
measured.
5. Graphs were plotted for H a l f wave and pud wave rectifier
outputs'.
RESULT:
TABULATION:
Frequency,
S.No
f (Hz)
With CE
Vo (V)
Gain (dB)
APPARATUS REQUIRED:
S.NO.
1 Bipolar
Junction
TYPE
RANGE
QUANTITY
(NO.S)
BC107
2 Transistor
Resistors
3 Capacitors
1
47 kQ,10 kQ,
One
from
22 gF, 10 gF ,
15 gF
One
from
4 AFO with-probe
5 CRO with-probe
FORMULA USED:
Gain- in dB = 20 log (Vo / Vi)
THEORY:
(0 - 30V)
1
1
Required
MODEL
GRAPH:
The CE
amplifier provides- high- gain &wide frequency response..
The emitter lead/ is- common to- both- input & output circuits-and
is grounded. The Emitter-Base circuit is forward
which
causes
the
collector
current
to
decrease,
it
decreases the voltage more -VE. Thus when input cycle varies
through a -VE half-cycle, increasesthe forward bias of the
circuit, which causes the collector current to increases thus the
output signal is common emitter amplifier is in out of phase with
the input signal. The input AC signal is applied across the baseemitter terminals and the output signal istaken across the
collector - emitter terminals. The emitter base junction of a
transistor is forward biased by the V supply. The collector base
junction is reverse biased by the V supply. Each capacitor acts
like a switch, The band width of the amplifier is calculated from/
the graph ussingthe expression,
3 dB Bandwidth, B W = f 2 - f 1
Where,
f1 islower cut-off frequency of CE amplifier, and f i t s upper
cut-off frequency of CE amplifier which is open to a direct
current but shorted to an alternating/ current. Because of this, a
blocking capacitor blocks the direct current. This action isolates
DC bias from/ an AC signal in the circuit. A common emitter
amplifier has the following important characteristics
PROCEDURE:
1 Identify the Emitter, Base and Collector terminals of
the transistor given and set up the circuit on
breadboard as shown in figure/.
2 Wire the circuit as shown in figure
3 Using/ AFO the sinusoidal input with/ constant
magnitude is supplied
4 The frequency of the input increases gradually and the
output is obtained.
5 Using/aCRO the output waveform/is obtained.
RESULT:
TABULATION:
Sl.No
1.
Output in volts
Amplitude=
Time, T (ms)
Frequency, f (Hz)
z
12. RC PHASE SHIFT OSCILLATOR
AIM:
TYPE
RANGE
QUANTITY
EQUIPMENT
1
Transistor
Resistors
Resistor
Capacitors
Capacitor
CRO
RPS
Bread Board
Connecting wires
(NO.S)
BC54
7
FORMULA USED:
Output frequency, fo
1
47kQ,
(0 - 30V)
1
1
Required
1
2XRC
46
THEORY:
An oscillator is an- electronic circuit for
generating'an- AC signal voltage with a DC supply as
the only input requirement. The frequency of the
generated signal is decided by the circuit elements
MODEL GRAPH:
t (ms) Vs Vo (V)
Amplitude O/P Voltag
e
in volts,
Vo(V
)
Time in msec, t (ms)
PROCEDURE:
1. Identify the pin details of BC107 Transistor (or equivalent
silicon Transistor such as BC108/547) and test it using a
millimeter. Set up the circuit on breadboard as shown in
figure.
2. A 12V Supply Voltage is given by using Regulated power
supply
3.
By
using
CRO
the output time period and voltage are noted.
4. Plotall the readings curves on a single graph sheet.
RESULT:
Thus the RC phase shift oscillator using BJT was obtained
and the output waveform/ was plotted.
VIVA QUESTIONS
1. Characteristics of PN Junction Diode
1. Define depletion/region of a diode?
2. What is meant/ by transition & space charge capacitance of
a diode?
3. IstheV-I relationship ofa diode Linear or Exponential?
4. Define cat-in voltage ofa diode and specify the values'
for Si and Ge diodes?
5. What are the applications ofa p-n diode?
6. Draw the ideal characteristics of P-N junction diode?
7. What is the diode equation?
8. What isPIV?
9. What is thebreak/ down voltage?
10. What is the effect of temperature on PN junction diodes?
3. Characteristics of CB Configuration
1.
2.
4. Characteristics of CE Configuration
1. What is the range of (3 for the transistor?
2. What are the input and output impedances of CE
configuration?
3. Identify various regions in the output characteristics?
4. what is the relation between aand(
5. Define current gain in CE configuration?
6. Why CE configuration is preferred for amplification?
7. What is the phase relation between input and output?
8. Draw diagram of CE configuration for PNP transistor?
9. What is the power gainof CE configuration?
10. What are the applications of CE configuration?