POWERVR SGX Series5XT IP Core Family

The POWERVR™ SGX Series5XT Graphics Processing Unit (GPU) IP core family is a series of highly efficient
graphics acceleration IP cores that meets the multimedia requirements of a wide range of next generation
consumer, communications and computing applications.
POWERVR SGX Series5XT architecture is fully scalable Benefits
for a wide range of area and performance requirements,
l Extensive product line supports all
enabling it to target a wide range of markets from low area/performance requirements
cost feature-rich mobile multimedia products to very
l Low risk solution for all embedded graphics
high performance consoles and computing devices. applications
The family incorporates the second-generation l Shader-based architecture enables near photo
Universal Scalable Shader Engine (USSE2™), with a realistic image quality
feature set that exceeds the requirements of OpenGL l Fully compliant proven implementations of all APIs
2.0 and Microsoft Shader Model 3, enabling 2D, 3D and l Lowest power consumption and silicon footprint
general purpose (GP-GPU) processing in a single core. l Low host CPU and memory system bandwidth load

Features Comprehensive Roadmap

l Most comprehensive IP core family and roadmap
in the industry
l New USSE2 delivers twice the peak floating point
and instruction throughput of Series5 USSE
l YUV and Colour Space Accelerators for improved
performance
l Upgraded POWERVR Series5XT shader-driven
tile-based deferred rendering (TBDR) architecture
l Multi-Processor options enabling scalability to
new levels of performance
l Support for all industry standard mobile and
desktop graphics APIs and Operating Sytems
l Fully backwards compatible with the de facto
standard POWERVR MBX and SGX Series5 families
POWERVR SGX Series5XT cores extend the SGX Family
to cover even the highest-end performance/area
options, so that the optimal solution is available for
every set of application requirements.
Programmable USSE2
USSE2 is a scalable multi-threaded multimedia
processing engine offering up to 2x the floating point
throughput of earlier Series5 SGX IP cores. An extended
instruction set with comprehensive vector operations and
co-issue capabilities enables advanced geometry and
pixel processing as well as GP-GPU tasks. These tasks
are broken down into processing packets which are then
scheduled across a number of multi-threaded execution
units in the USSE2. This enables optimal hardware load
balancing, maximum latency tolerance and efficient gate
use, all accessed through a single software
programming model and compiler.

Host POWERVR SGX Series5XT

Bus Host Control and Register Bus
CPU
Interface

Universal Scalable Shader Engine 2

Vertex Data Tiling
Master Coprocessor
Thread Multi-Threaded
(Geometry) Scheduler Execution Unit

Coarse Thread Multi-Threaded

Pixel Data Scheduler Execution Unit
Pixel Data Grain Pixel
Pixel
Master Scheduler
Master Coprocessor
Co-
(ISP)
(ISP) Processor
(CGS)

Thread Multi-Threaded
Scheduler Execution Unit
General Texturing
Texturing
Purpose Coprocessor
Co-
Data Master Processor
System Multi-level Cache
Memory
Bus System
Memory
Interface System Memory Bus

Copyright © 2009 Imagination Technologies Limited 1.0

For maximum efficiency, additional optimized compression, enable POWERVR SGX to handle
hardware engines, including texture, pixel and tiling arbitrarily complex scenes in limited memory footprints
accelerators work with USSE2 in the POWERVR SGX with the lowest memory bandwidth usage.
Series5XT architecture to deliver even higher anti- Multi-Processor Support
aliasing performance.
Select members of the POWERVR SGX Series5XT
USSE2 enables up to IEEE 754 single precision floating Family offer Multi-Processor (MP) support enabling
point data processing – essential for the best possible complete linear scaling of all GPU performance
image quality and vital for effective GP-GPU multimedia components (Vertex, Pixel, Setup and GP-GPU) with
processing. An advanced microkernel based approach to virtually no overhead in bandwidth usage.
scheduling ensures maximum performance with
minimal CPU load and enables extremely rapid context Industry standard API and OS support
switching and concurrent multi-API support. All POWERVR SGX Series5XT cores share a rich
feature set that enables support for all major industry
YUV and Colour Space Accelerators Application Programming Interfaces(API) across a
The USSE2 workload is reduced by the addition of a wide variety of Operating Systems (OS).
dedicated YUV Accelerator for optimal interaction with API Support (Series5 and Series5XT)
video cores (e.g. POWERVR VXD) and native sRGB PVR2D for legacy 2D Support (BLTs, ROP2/3/4), OpenVG 1.1
support enables best in-market OpenVG performance. enabling Flash and SVG, OpenWF enabling advanced compositing,
OpenGL ES 1.1 + Extension Pack and OpenGL ES 2.0, OpenCL
Series5XT shader-driven TBDR architecture
Embedded Profile and Full Profile (SGX545) for GP-GPU, Desktop
Unique, patented tiling technology enables on-chip OpenGL 2.0 (SGX535/545) and 3.0 (SGX545) and Microsoft Direct3D
processing of hidden surface removal (pixel perfect and Mobile, DirectX9 (SGX535/545) and 10.1 (SGX545).
submission order independent) at double the rate of OS support (Series5 and Series5XT)
POWERVR Series5. Unlike early Z hierarchical systems Linux, Symbian OS™, Microsoft WinCE/Vista/XP and RTOS on
used by competing solutions POWERVR offers high request.
performance hidden surface removal irrespective of
Low power
submission order or primitive orientation resulting in
the highest performance hidden surface removal and POWERVR SGX Series5XT cores are built on a
stencil operation in the industry. foundation of unique patented technologies that deliver
The family further extends the bandwidth and power class leading performance while keeping power
efficiency and performance of hardware-based perfect dissipation to a minimum. POWERVR’s inherently low-
tiling and culling algorithms, which used in combination power architecture is complemented by the use of
with seamless scene complexity management and latest sophisticated clock gating techniques to ensure
the lowest active and standby power consumption.

Highest Performance per mW System Level Cache Option

POWERVR SGX Series5XT core architecture currently A range of pre-verified system level cache configurations
comprises SGX543 and multiple SGX543 MP variants (32, 64 and 128KB) is available to further reduce the
covering a wide range of area and performance bandwidth usage and maximise latency tolerance through
requirements to accommodate the needs of many target access profile optimised caching mechanisms.
markets. Performance scales with clock speeds up to
200 MHz and beyond. Applications
l Smart and feature phones
POWERVR SGX family
l Mobile internet devices (MIDs)
Series5 SGX520/530/531/535/540/545
l Personal media players
Series5XT SGX543/SGX543MP l Games consoles
Triangles/sec* 7m – 140m l HDTV and set-top boxes
Pixels/sec* 250m – 4000m l Personal navigation devices
Area (65nm process) 2
2.6 mm – 32 mm 2 l In-car navigation and driver information
* Realistic, sustainable, SoC performance at 200 MHz (e.g. less than 50% shader l Electronic dashboards
load); peak performance significantly higher dependent on content and operating l Ultra-mobile, laptop and netbooks
conditions.

UK - Headquarters Japan Taiwan

Imagination Technologies Ltd.
Imagination House, Home Park Estate,
Kings Langley, Hertfordshire
WD4 8LZ, UK
t: +44 1923 260511
Imagination Technologies KK
AIOS Gotanda Annex Bldg 3F
1-7-11 Higashi Gotanda, Shinagawa-ku
Tokyo, 141-0022, Japan
t: +81 3 5795 4648
Imagination Technologies
7F, No.50, Lane 10, Kee Hu Road
Nei Hu, Taipei (114), Taiwan
t: +886 2 87514709

USA Korea China

Imagination Technologies Inc. Imagination Technologies Korea Imagination Technologies Shenzhen
16870 West Bernardo Drive, Suite 407 467-24 Woosung Character 199 #2204 Representative Office
San Diego, CA 92127, USA Dogok-dong, Gangnam-gu, Seoul, 12 C Hai Jing Guang Chang
enquiries@imgtec.com
t: +1 858 674 6644 Korea, 135-270 Tai Zi Road, Shekou, Shenzhen, China www.imgtec.com
t: +82 2 3461 0184 t: +86 755 26824240

Imagination Technologies, the Imagination logo, POWERVR, META, ENSIGMA and CODESCAPE are trademarks or registered trademarks of Imagination Technologies Ltd. All other logos, products, trademarks and
registered trademarks are the property of their respective manufacturers. Copyright © 2009 Imagination Technologies Limited, an Imagination Technologies Group plc company. February 2009 IMG0180.02.09

POWERVR SGX Series 5XT IP Core Family 1.0