ECEN474: (Analog) VLSI Circuit Design

Fall 2012
Lecture 19: Output Stages

Sam Palermo
Analog & Mixed-Signal Center
Texas A&M University

Announcements & Agenda

Exam 3 is on Friday Nov. 30
Output Stages
Source Follower (Class A)
Push-Pull (Class B)
Push-Pull w/ Small Quiescent Current (Class AB)

OpAmps and OTAs

OpAmp

High voltage gain

High input impedance
Voltage source output
(low impedance)

OTA

High voltage gain

High input impedance
Current source output
(high impedance)
3

Three-Stage OpAmp
Av > 1
ViVi+

Av >> 1 Av = 1

+
Input
Stage

Vo
Gain
Stage

Output
Stage

Differential input stage

Amplifies differential input
Sets specs such as Gm, CMRR, and slew rate

Second gain stage

Provides additional gain
Often used to provide Miller compensation

Output stage
Power Amplifier
Large current gain and near unity voltage gain
Small output impedance
4

ELEN-474

Buffered OTA = Operational Voltage Amplifier (OPAMP)

SIMPLE MACROMODEL:

VDD
M2

M2
i01

M3

2i01

r0

vy
i02

v+

M4

vout

v-

i01

i01

vd

R1

C1

CM

gm1(v+-v-)

v0

-vd
M1

A2A3(vy)

R1
C1+(1+gm3ro3)CM

M1
IB2

IB1

2nd Stage &

Buffer
= ( g m1 R1 ) A2 A3

Internal pole

IB3

AVDC

VSS

A2 g m 3 ro 3
A3 1 0.5

AVDC

GBW

p1
GBW
Jose Silva-Martinez

p2

g m1
CM

Rout = r0 1 / g m 4
Notice that load capacitors must satisfy the
following condition, otherwise phase margin is
not good enough
GBW <

-5-

1
r0 C L

Texas A&M University

Source Follower (Class A) Output Stage

[Gray]

Adc =

Voltage gain close to 1

Low output resistance
DC level shift of VGS1
Class A output stage
transistors conduct current
over an entire input cycle

g m1
g m1 RL

1 (Optimistic)
g m1 + g o1 + g mb1 + g o 2 + g L 1 + g m1 RL
1
1
Rout =

g m1 + g o1 + g mb1 + g o 2 g m1
6

Source Follower (Class A)

Transfer Characteristic

V
2 I Q + o
RL

Vo = Vi VT 1
nCox (W L )1

[Gray]

Maximum Vo

If Vin VDD, then Maximum Vo = VDD-VGS1

Output transistors remain in saturation up to Vo = VDD-VDSAT1 if Vin swings
up to VDD+VT1

Minimum Vo

For small RL (heavy load), M1 gets cutoff and Vo -IQRL

For large RL (light load), M2 will go into triode region at VDD+VDSAT2
7

Source Follower (Class A)

Power Efficiency
Assuming a sinusoidal output voltage
Vo = Vm sin (t )
The power delivered to the load at the signal frequency is
2

Vm

Vm2
2

=
Pac =
RL
2 RL
The average power consumed by the source follower is
Pav = ( I Q )( VDD ) + (I Q )(VDD ) = 2 I QVDD
The output stage power efficiency is
Pac
Vm2
=
Peff
Pav 4 RL I QVDD
Maximum power efficiency is achieved when the output
V
amplitude approaches VDD and I Q is designed to be DD
RL
1
Max P eff = or 25% (not that good! )
4
8

Super Buffer Output Stage

[Silva]

Rout

1
g m 2 (1 + Av )
9

Push-Pull Source Follower (Class B)

Output Stage
Class B output stages
improve power
efficiency by operating
at zero quiescent
current
However, if
-|VTP| Vin VTN,
then no output signal

10

Push-Pull Source Follower (Class B)

Crossover Distortion
[Sedra]

11

Push-Pull Source Follower (Class B)

Power Efficiency
Assuming a sinusoidal output voltage
Vo = Vm sin (t )
The power delivered to the load at the signal frequency is
2

Vm

Vm2
2

Pac =
=
2 RL
RL
The current consumed by the push - pull stage from the two supplies
V
consists of half - sine wave of peak amplitude m
RL
V
The average current will be m
RL
V
V
2V V
Pav = m ( VDD ) + m (VDD ) = m DD
RL
RL
RL
The output stage power efficiency is
P
Vm
Peff ac =
Pav 4VDD
Maximum power efficiency is achieved when the output
amplitude approaches VDD
Max P eff =

or 78.5% (much better! )

12

Push-Pull w/ Small Quiescent Current

(Class AB) Output Stage
[Gray]

Power efficiency of the

Class-B output stage is
great, but the crossover
distortion is a major issue
Solution to the crossover
distortion is to bias the
transistors into conduction
at a low quiescent current
Level-shift transistors M4
and M5 are sized such that
VGS1 and VGS2 are
slightly larger than their
threshold voltages
13

Push-Pull w/ Small Quiescent Current

(Class AB) Output Swing Range
A drawback of the CMOS Class AB output
stage is the limited output swing range
Maximum Vo set by M1 source follower
Vo VDD-|VDSAT3|-VGS1

Minimum Vo set by M2 source follower

Vo -VSS+VDSAT6+VSG2

14

Next Time
Bandgap Reference Circuits

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