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DESCRIPTION
FEATURES
APPLICATIONS
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance MPS
and The Future of Analog IC Technology are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Efficiency
VOUT=1.2V
100
IN
BST
C1
22uF
80
C4
0.1uF
SW
7
C3
0.1uF
VCC
VOUT 1.2V
MP8709
R1
4.99k
FB
2,3
L1
1.8uH
EN/SYNC
GND
8
C2
47uF
6
Rt
56k
R2
10k
EFFICIENCY (%)
VIN
ON/OFF
V IN=4.5V
90
21
70
V IN=12V
60
V IN=21V
50
40
30
20
10
0
0 0.5
1 1.5
2 2.5
3 3.5
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2011 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP8709EN
SOIC8E
MP8709EN
-20C to +85C
PACKAGE REFERENCE
TOP VIEW
IN
GND
SW
VCC
SW
FB
BST
EN/SYNC
EXPOSED PAD
ON BACKSIDE
CONNECT TO GND
(3)
Thermal Resistance
(4)
JA
JC
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2011 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25C, unless otherwise noted.
Parameters
Supply Current (Shutdown)
Supply Current (Quiescent)
HS Switch On Resistance
LS Switch On Resistance
Symbol
IIN
Iq
HSRDS-ON
LSRDS-ON
Switch Leakage
SWLKG
ILIMIT
FSW
FFB
DMAX
FSYNC
Feedback Voltage
VFB
Feedback Current
EN Rising Threshold
EN Threshold Hysteresis
IFB
IEN
Min
VFB = 0.75V
VFB = 300mV
VFB = 700mV
TA = -20C to + 85C
VFB = 800mV
5
425
85
0.3
789
1
VEN = 2V
VEN = 0V
ENTd-Off
Lockout
Lockout
3.8
INUVVth
INUVHYS
VCC
Icc=2mA
2
TSD
Typ
Max
10
Units
A
mA
m
m
10
6.1
500
0.25
90
7.4
575
A
kHz
fSW
%
MHz
805
821
mV
10
1.3
0.4
2
0
5
50
1.6
nA
V
V
4.0
4.2
0.7
120
20
VEN_RISING
VEN_HYS
EN Input Current
EN Turn Off Delay
VIN Under Voltage
Threshold Rising
VIN Under Voltage
Threshold Hysteresis
VCC Regulator
VCC Load Regulation
Soft-Start Period
Thermal Shutdown
Condition
VEN = 0V
VEN = 2V, VFB = 1V
A
s
V
880
mV
5
5
4
150
V
%
ms
C
6.5
Note:
5) Guaranteed by design.
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2011 MPS. All Rights Reserved.
PIN FUNCTIONS
Pin #
1
2,3
4
5
7
8
Name
Description
Supply Voltage. The MP8709 operates from a +4.5V to +21V input rail. C1 is
needed to decouple the input rail. Use wide PCB trace to make the connection.
SW
Switch Output. Use wide PCB trace to make the connection.
Bootstrap. A capacitor connected between SW and BS pins is required to form a
BST
floating supply across the high-side switch driver.
EN=1 to enable the chip. External clock can be applied to EN pin for changing
EN/SYNC
switching frequency. For automatic start-up, connect EN pin to VIN by proper EN
resistor divider as Figure 2 shows.
Feedback. An external resistor divider from the output to GND, tapped to the FB
pin, sets the output voltage. To prevent current limit run away during a short
FB
circuit fault condition the frequency fold-back comparator lowers the oscillator
frequency when the FB voltage is below 500mV.
Bias Supply. Decouple with 0.1F~0.22F cap. And the capacitance should be
VCC
no more than 0.22F
System Ground. This pin is the reference ground of the regulated output voltage.
GND,
For this reason care must be taken in PCB layout. Suggested to be connected to
Exposed Pad
GND with copper and vias.
IN
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2011 MPS. All Rights Reserved.
0.2
745
0.15
740
735
5.5
0.1
0.05
730
725
720
-0.05
715
710
-0.1
4.5
-0.15
705
3.5
-0.2
700
5
10
15
20
25
Peak Current vs
Duty Cycle
10
15
20
100
OUTPUT VOLTAGE (V)
6.6
6.4
6.2
6
5.8
5.6
5.4
5.2
5
Dmax Limit
10
1
Minimum on time Limit
0.1
0 10 20 30 40 50 60 70 80 90100
Line Regulation
0.2
10
15
10
15
20
25
Load Regulation
Operating Range
6.8
PEAK CURRENT (A)
25
20
25
0.1
V IN=4.5V
0.05
0
VIN=12V
V IN=21V
-0.05
-0.1
-0.15
-0.2
0
50
0.15
40
Io=0A
0.1
0.05
30
0
Io=2A
-0.05
-0.1
20
Io=4A
10
-0.15
-0.2
0
10
15
20
25
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2011 MPS. All Rights Reserved.
Efficiency
Efficiency
VOUT=1.8V
VOUT=1.2V
100
100
V IN=4.5V
90
80
80
70
EFFICIENCY (%)
EFFICIENCY (%)
V IN=4.5V
90
V IN=12V
60
V IN=21V
50
40
30
20
10
V IN=12V
70
60
50
V IN=21V
40
30
20
10
0
0 0.5
1 1.5
2 2.5
3 3.5
0 0.5
EFFICIENCY (%)
EFFICIENCY (%)
VOUT=3.3V
80
V IN=12V
50
40
30
20
10
V IN=4.5V
V IN=12V
70
60
50
V IN=21V
40
30
20
10
0
0 0.5
1 1.5
2 2.5
3 3.5
90
V IN=21V
70
60
100
V IN=4.5V
80
3 3.5
Efficiency
VOUT=2.5V
90
2 2.5
Efficiency
100
1 1.5
0 0.5
1 1.5
2 2.5
3 3.5
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2011 MPS. All Rights Reserved.
VOUT
1V/div
VOUT
1V/div
VOUT
1V/div
VSW
10V/div
VSW
10V/div
VSW
10V/div
VIN
10V/div
IINDUCTOR
5A/div
IINDUCTOR
5A/div
IINDUCTOR
5A/div
Short Recovery
2ms/div
4ms/div
10ms/div
Enable Startup
without Load
Enable Startup
with 4A Load
VOUT
1V/div
VOUT
1V/div
VOUT
1V/div
VSW
10V/div
VSW
10V/div
VSW
10V/div
VIN
10V/div
VEN
5V/div
VEN
5V/div
IINDUCTOR
5A/div
IINDUCTOR
5A/div
IINDUCTOR
5A/div
4ms/div
10ms/div
IOUT=4A
IOUT=4A
VIN/AC
100mV/div
VOUT/AC
20mV/div
10ms/div
VSW
5V/div
VSW
5V/div
IINDUCTOR
5A/div
ILOAD
2A/div
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MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
2011 MPS. All Rights Reserved.
BLOCK DIAGRAM
IN
+
VCC
Regulator
VCC
Current Sense
Amplifer
BOOST
Regulator
Oscillator
BST
HS
Driver
LOGIC
M1
SW
Reference
1MEG
LS
Driver
400K
+
+
Error Amplifier
M2
+
PWM Comparator
LS ILIM
Comparator
50pF
FB
Current Limit
Comparator
1pF
EN/SYNC
VCC
GND
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MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
2011 MPS. All Rights Reserved.
OPERATION
The MP8709 is a high frequency synchronous
rectified step-down switch mode converter with
built in internal power MOSFETs. It offers a very
compact solution to achieve 4A continuous
output current over a wide input supply range
with excellent load and line regulation.
The MP8709 operates in a fixed frequency, peak
current control mode to regulate the output
voltage. A PWM cycle is initiated by the internal
clock. The integrated high-side power MOSFET
is turned on and remains on until its current
reaches the value set by the COMP voltage.
When the power switch is off, it remains off until
the next clock cycle starts. If, in 90% of one PWM
period, the current in the power MOSFET does
not reach the COMP set current value, the power
MOSFET will be forced to turn off
Internal Regulator
Most of the internal circuitries are powered from
the 5V internal regulator. This regulator takes the
VIN input and operates in the full VIN range.
When VIN is greater than 5.0V, the output of the
regulator is in full regulation. When VIN is lower
than 5.0V, the output decreases, a 0.1uF ceramic
capacitor for decoupling purpose is required.
Error Amplifier
The error amplifier compares the FB pin voltage
with the internal 0.805V reference (REF) and
outputs a current proportional to the difference
between the two. This output current is then used
to charge or discharge the internal compensation
network to form the COMP voltage, which is used
to control the power MOSFET current. The
optimized
internal
compensation
network
minimizes the external component counts and
simplifies the control loop design.
Enable/Sync Control
EN/Sync is a digital control pin that turns the
regulator on and off. Drive EN high to turn on the
regulator, drive it low to turn it off. There is an
internal 1MEG resistor from EN/Sync to GND
thus EN/Sync can be floated to shut down the
chip.
1) Enabled by external logic H/L signal
VIN_START = VEN_RISING
Where VEN_RISING is 1.3V
VIN_STOP = VEN-FALLING
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MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
2011 MPS. All Rights Reserved.
SW
Thermal Shutdown
MP8709 Rev. 1.01
12/14/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
2011 MPS. All Rights Reserved.
10
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider is used to set the
output voltage (see Typical Application on page
1). The feedback resistor R1 also sets the
feedback loop bandwidth with the internal
compensation capacitor (see Typical Application
on page 1). Choose R1 to be around 40.2k for
optimal transient response. R2 is then given by:
R2 =
VOUT
1
VFB
R1
Rt
VOUT
R2
R1
(k)
4.99
4.99
4.99
4.99
10
10
10
R2
(k)
16.5
10.2
5.76
4.02
4.75
3.24
1.91
Rt
(k)
56
56
47
47
30
20
15
L
COUT
(H) (F, Ceramic)
1-4.7
47
1-4.7
47
1-4.7
47
1-4.7
47
1-4.7
47
1-4.7
47
1-4.7
47
Note:
The above feedback resistor table applies to a specific load
capacitor condition as shown in the table 1. Other capacitive loading
conditions will require different values.
R1
L=
I L
2
VOUT VOUT
1
VIN
VIN
ILOAD
2
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2011 MPS. All Rights Reserved.
11
ILOAD
V
V
OUT 1 OUT
fS C1 VIN
VIN
VOUT
V
1 OUT
f S L
VIN
V
1 OUT
VIN
L C2
VOUT
8 fS
3)
4)
5)
6)
R ESR +
C
2
S
VOUT =
2)
GND
C2
R
2
ON/OFF
EN
BST
FB
SW
VCC
SW
GND
IN
L1
C1
Top Layer
VOUT
V
1 OUT
fS L
VIN
R ESR
Bottom Layer
Figure 4PCB Layout
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2011 MPS. All Rights Reserved.
12
VOUT
>65%
VIN
MP8709
SW
COUT
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2011 MPS. All Rights Reserved.
13
PACKAGE INFORMATION
SOIC8E (EXPOSED PAD)
0.189(4.80)
0.197(5.00)
0.124(3.15)
0.136(3.45)
0.150(3.80)
0.157(4.00)
PIN 1 ID
0.228(5.80)
0.244(6.20)
0.089(2.26)
0.101(2.56)
TOP VIEW
BOTTOM VIEW
0.013(0.33)
0.020(0.51)
0.0075(0.19)
0.0098(0.25)
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0.050(1.27)
0.024(0.61)
0o-8o
0.016(0.41)
0.050(1.27)
0.063(1.60)
DETAIL "A"
0.103(2.62)
0.138(3.51)
0.213(5.40)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP8709 Rev. 1.01
12/14/2011
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
2011 MPS. All Rights Reserved.
14